Σε αυτήν την εργασία περιγράφεται αναλυτικά ένα κύκλωμα ανάγνωσης για ηλεκτροχημικό βιοαισθητήρα, καθώς και η κατάλληλη τροποποίησή του ώστε να μπορεί να χρησιμοποιηθεί σε σύστημα χωρητικού βιοαισθητήρα. Βασικός στόχος και στις δύο περιπτώσεις είναι η συμβατότητα των κυκλωμάτων με πλήρως ολοκληρωμένα βιοχημικά μικροσυστήματα, με έμφαση στη μικρή επιφάνεια ολοκλήρωσης και τη χαμηλή κατανάλωση. Κεντρικό στοιχείο των δύο υλοποιήσεων αποτελεί ο χωρητικός ενισχυτής διαντίστασης ο οποίος αναλαμβάνει το ρόλο της μετατροπής της χρήσιμης πληροφορίας, που είναι ένα ρεύμα, σε μία τάση. Αυτή η τάση στη συνέχεια μπορεί να δοθεί για ψηφιακή επεξεργασία, αφού περάσει από έναν ADC . Τα δύο κυκλώματα σχεδιάσθηκαν σε τεχνολογία CMOS της TSMC των 90nm και εμφάνισαν στις εξομοιώσεις ικανοποιητικά χαμηλό θόρυβο. Το κύκλωμα του ηλεκτροχημικού βιοαισθητήρα παρουσίασε καλή γραμμικότητα για ρεύματα από 10nA έως 10uA, ενώ το αντίστοιχο του χωρητικού βιοαισθητήρα είναι δυνατό να μετρήσει χωρητικότητες με μέγιστη απόκλιση 3%. / This paper presents a readout circuit for electrochemical biosensors and the appropriate modification of the circuit to make it compatible with capacitive biosensors. The main goal is to ensure compatibility of the circuits with fully integrated biochemical microsystems and therefore emphasis is placed on achieving small area and low consumption. The fundamental part of the circuits is a Capacitive Transimpedance Amplifier that is responsible for converting the current signal to a voltage. That voltage can then be passed forward to digital processing with the use of an ADC. Both circuits were designed using 90nm TSMC CMOS technology and showed low noise in simulations. The electrochemical biosensor readout circuit achieves good linearity in a range of 10nA to 10uA, while the capacitive biosensor readout circuit is capable of measuring capacitances with a 3% error.

This thesis consists of two topics. A frequency-shift readout circuit is integrated for the rapid IgE measurement biomedical system in the first half. Secondly, we present a ROM-less DDFS (direct digital frequency synthesis) using a non-equal division parabolic polynomial interpolation method, which is used as the frequency generator in the measurement system. The first topic investigates the IgE concentration measurement system and realizes the readout circuit using TSMC 1P6M 0.18 £gm CMOS technology. We integrate the flexural plate wave (FPW) sensor chips and an ASIC comprising control block, digital to analog convertor (DAC), OTA-C oscillators, amplifiers, peak detectors, registers, and a subtractor. By taking advantages of the characteristics that the central frequencies of the loaded FPW sensors will be shifted, sine waves with various frequencies are generated and swept through one pair of FPW sensors. The frequency difference of these sensors is then readout to get concentration by look-up table. The second topic investigates the division method of a quarter sine wave to improve the spurious free dynamic range (SFDR) and realizes a ROM-less DDFS which is used as the frequency generator in the mentioned IgE measurement system. The proposed non-equal division parabolic polynomial interpolation method will generate a complete sine wave by a quarter of a sine digital signal owing to the symmetry. We combine the quasi-linear interpolation and an offset adjustment to derive the quarter sine wave digital signals. The proposed method not only reduces the absolute error between ideal sine wave and generated sine wave, it also improves SFDR.

Micromachined accelerometers have found large attention in recent years due to their low-cost and small size. There are extensive studies with different approaches to implement accelerometers with increased performance for a number of military and industrial applications, such as guidance control of missiles, active suspension control in automobiles, and various consumer electronics devices. This thesis reports the development of various capacitive micromachined accelerometers and various integrated CMOS readout circuits that can be hybrid-connected to accelerometers to implement low-cost accelerometer systems. Various micromachined accelerometer prototypes are designed and optimized with the finite element (FEM) simulation program, COVENTORWARE, considering a simple 3-mask surface micromachining process, where electroplated nickel is used as the structural layer. There are 8 different accelerometer prototypes with a total of 65 different structures that are fabricated and tested. These accelerometer structures occupy areas ranging from 0.2 mm2 to 0.9 mm2 and provide sensitivities in the range of 1-69 fF/g. Various capacitive readout circuits for micromachined accelerometers are designed and fabricated using the AMS 0.8 &micro / m n-well CMOS process, including a single-ended and a fully-differential switched-capacitor readout circuits that can operate in both open-loop and close-loop. Using the same process, a buffer circuit with 2.26fF input capacitance is also implemented to be used with micromachined gyroscopes. A single-ended readout circuit is hybrid connected to a fabricated accelerometer to implement an open-loop accelerometer system, which occupies an area less than 1 cm2 and weighs less than 5 gr. The system operation is verified with various tests, which show that the system has a voltage sensitivity of 15.7 mV/g, a nonlinearity of 0.29 %, a noise floor of 487 Hz &micro / g , and a bias instability of 13.9 mg, while dissipating less than 20 mW power from a 5 V supply. The system presented in this research is the first accelerometer system developed in Turkey, and this research is a part of the study to implement a national inertial measurement unit composed of low-cost micromachined accelerometers and gyroscopes.

This thesis presents the development of high resolution, wide dynamic range sigma-delta type readout circuits for capacitive MEMS accelerometers. Designed readout circuit employs fully differential closed loop structure with digital output, achieving high oversampling ratio and high resolution. The simulations of the readout circuit together with the accelerometer sensor are performed using the models constructed in Cadence and Matlab Simulink environments. The simulations verified the stability and proper operation of the accelerometer system. The sigma-delta readout circuit is implemented using XFab 0.6 &micro / m CMOS process. Readout circuit is combined with Silicon-On-Glass (SOG) and Dissolved Wafer Process (DWP) accelerometers. Both open loop and closed loop tests of the accelerometer system are performed. Open loop test results showed high sensitivity up to 8.1 V/g and low noise level of 4.8 &micro / g/&amp / #61654 / Hz. Closed loop circuit is implemented on a PCB together with the external filtering and decimation electronics, providing 16-bit digital output at 800 Hz sampling rate. High acceleration tests showed &plusmn / 18.5 g of linear acceleration range with high linearity, using DWP accelerometers. The noise tests in closed loop mode are performed using Allan variance technique, by acquiring the digital data. Allan variance tests provided 86 &micro / g/&amp / #61654 / Hz of noise level and 74 &micro / g of bias drift. Temperature sensitivity tests of the readout circuit in closed loop mode is also performed, which resulted in 44 mg/&ordm / C of temperature dependency. Two different types of new adaptive sigma-delta readout circuits are designed in order to improve the resolution of the systems by higher frequency operation. The two circuits both change the acceleration range of operation of the system, according to the level of acceleration. One of the adaptive circuits uses variation of feedback time, while the other circuit uses multi-bit feedback method. The simulation results showed micro-g level noise in closed loop mode without the addition of the mechanical noise of the sensor.

Micromachining technologies enabled the use of miniaturized transducers in many high technology sensing systems. These transducers have many advantages like small-size, low-cost and high-reliability. One of the applications micro-machined transducers are used is inertial navigation systems, where the exact position of a moving frame is continuously monitored by tracking the linear and angular motions of the frame. Other than navigation applications, inertial sensors are used in health and military applications as well as consumer electronics. Today accelerometers capable of measuring accelerations from 0.5g-1g range up to several thousand g&rsquo / s are commercially available in the market which have been fabricated using micromachining technologies. The aim of this research is to develop such a state-of-the-art micro-machined accelerometer system, whose performance is expected to reach tactical-grade level. In order to achieve these performance values a MATLAB algorithm is developed to optimize the accelerometer performances in the desired levels. Expected performance parameters of the designed accelerometer structures are extracted from the simulations done by both Coventorware finite element modeling tool and MATLAB. Designed structures are then fabricated with silicon-on-glass, dissolved wafer and dissolved epitaxial wafer processes. These fabrication results are compared and it is observed that highest yield accelerometers are fabricated with the SOG process. But these accelerometers could not be able to satisfy tactical grade performance parameters. Best performances are obtained with DWP, but due to high internal stress, yield of the sensors were very low. DEWP increased the yield of this process from 2-3% to 45-50% but the expected operation range of the designs dropped to &plusmn / 12.5g range. Using the fabricated accelerometers in DEWP a three axial accelerometer package is prepared and tests results proved that this three axial accelerometer system was satisfying the tactical grade requirements. In addition to these a three axial monolithic accelerometer fabrication technique is proposed and sensors are designed which are suitable for this process. Best performances achieved with single axis accelerometers were 153&micro / g/&radic / Hz noise floor, 50&micro / g bias drift, 0.38% non-linearity and a maximum operation range of 33.5g which has the higher dynamic range among its counterparts in the literature. Performance results achieved with the three axes accelerometer were ~150&micro / g bias drift, &lt / 200&micro / g/&radic / Hz noise density, ~0.4% non-linearity with higher than &plusmn / 10g operation range.

abstract: High speed image sensors are used as a diagnostic tool to analyze high speed processes for industrial, automotive, defense and biomedical application. The high fame rate of these sensors, capture a series of images that enables the viewer to understand and analyze the high speed phenomena. However, the pixel readout circuits designed for these sensors with a high frame rate (100fps to 1 Mfps) have a very low fill factor which are less than 58%. For high speed operation, the exposure time is less and (or) the light intensity incident on the image sensor is less. This makes it difficult for the sensor to detect faint light signals and gives a lower limit on the signal levels being detected by the sensor. Moreover, the leakage paths in the pixel readout circuit also sets a limit on the signal level being detected. Therefore, the fill factor of the pixel should be maximized and the leakage currents in the readout circuits should be minimized. This thesis work presents the design of the pixel readout circuit suitable for high speed and low light imaging application. The circuit is an improvement to the 6T pixel readout architecture. The designed readout circuit minimizes the leakage currents in the circuit and detects light producing a signal level of 350µV at the cathode of the photodiode. A novel layout technique is used for the pixel, which improves the fill factor of the pixel to 64.625%. The read out circuit designed is an integral part of high speed image sensor, which is fabricated using a 0.18 µm CMOS technology with the die size of 3.1mm x 3.4 mm, the pixel size of 20µm x 20 µm, number of pixel of 96 x 96 and four 10-bit pipelined ADC’s. The image sensor achieves a high frame rate of 10508 fps and readout speed of 96 M pixels / sec. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2016

Energy efficiency is a key requirement for wireless sensor nodes, biomedical implants, and wearable devices. The energy consumption of the sensor node needs to be minimized to avoid battery replacement, or even better, to enable the device to survive on energy harvested from the ambient. Capacitive sensors do not consume static power; thus, they are attractive from an energy efficiency perspective. In addition, they can be employed in a wide range of sensing applications. However, the sensor readout circuit–i.e., the capacitance-to-digital converter (CDC)–can be the dominant source of energy consumption in the system. Thus, the development of energy-efficient CDCs is crucial to minimizing the energy consumption of capacitive sensor nodes. In the first part of this dissertation, we propose several energy-efficient CDC architectures for low-energy sensor nodes. First, we propose a digitally-controlled coarsefine multislope CDC that employs both current and frequency scaling to achieve significant improvement in energy efficiency. Second, we analyze the limitations of successive approximation (SAR) CDC, and we address these limitations by proposing a robust parasitic-insensitive opamp-based SAR CDC. Third, we propose an inverter-based SAR CDC that achieves an energy efficiency figure-of-merit (FoM) of 31fJ/Step, which is the best energy efficiency FoM reported to date. Fourth, we propose a differential SAR CDC with quasi-dynamic operation to maintain excellent energy efficiency for a scalable sample rate. In the second part of this dissertation, we study the matching properties of small integrated capacitors, which are an integral component of energy-efficient CDCs. Despite conventional wisdom, we experimentally illustrate that the mismatch of small capacitors can be directly measured, and we report mismatch measurements for subfemtofarad integrated capacitors. We also correct the common misconception that lateral capacitors match better than vertical capacitors, and we identify the conditions that make one implementation preferable. In the third and last part of this dissertation, we investigate the potential of novel metal-organic framework (MOF) thin films in capacitive gas sensing. We provide sensitivity-based optimization and simple fabrication flow for capacitive interdigitated electrodes. We use a custom flexible gas sensor test setup that is designed and built in-house to characterize MOF-based capacitive gas sensors.