published_or_final_version / Physics / Master / Master of Philosophy

published_or_final_version / Physics / Doctoral / Doctor of Philosophy

Continued scaling of CMOS devices with Si and SixGe1-x down to 22 nm design node or beyond will require the formation of ever shallower and more abrupt junctions with higher doping levels in order to manage the short channel effects. With the increasing importance of surface proximity and stress effects, the lateral diffusion in gate-extension overlap region strongly influences both threshold voltage roll-off degradation and DIBL increase by requiring an optimized abruptness and diffusion for better device performance. Therefore, the detailed understanding of defect-dopant interactions in the disordered and/or strained systems is essential to develop a predictive kinetic model for the evolution of dopant concentration and electrical activation profiles. Our density functional theory calculations provide the guidance for experimental designs to realize ultra-shallow junction formation required for future generations of nano-scale CMOS devices. Few systematic studies in epitaxially-grown SixGe1-x channel CMOS have been reported. The physical mechanisms of boron diffusion in strained SixGe1-x/Si heterojunction layers with different SixGe1-x layer thicknesses and Ge content (>50%) are addressed, especially with high temperature annealing. In addition, the effects of the fluorine incorporated during BF2 implant on boron diffusion are investigated to provide more insight into short channel device design. In this study, we investigate how short channel margins are affected by Ge mole fraction and SixGe1-x layer thickness in a compressively strained SixGe1-x/Si heterojunction PMOS with high temperature annealing. Series resistance characterization in S/D extension region and gate oxide interface trap characterization for Si, SixGe1-x, and Ge nMOSFETs are done. TCAD device simulation is also performed to evaluate which distributions of interface traps will significantly affect the electrical characteristics such as flatband voltage (VFB) shift and threshold voltage (Vth) shift based on capacitance-voltage (CV) and current-voltage (IV) curves. n+/p and p+/n diode structures are studied in order to decouple the electrical characteristics from the gated-diode (GD) MOSFETs. With the extraction of S/D series resistance from various channel lengths, possible reasons for performance degradation in SixGe1-x and Ge nMOSFETs, based on simulations, are proposed. / text

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Mo-Si thin films have proven applications in semiconductor devices and x-ray optics. Since their performance in these applications is extremely sensitive to interface roughness, it is important to understand the nucleation and growth mechanisms which affect the microscopic interface structure. Investigations of the initial stages of interface formation in the Mo-Si system were carried out by depositing fractional-monolayer Mo films onto Si(100)-(2x1) and Si(111)-(7x7) surfaces using Molecular Beam Epitaxy (MBE) with feedbackcontrolled electron-beam evaporation, and by characterizing these ultra-thin Mo films using in situ Reflection High-Energy Electron Diffraction (RHEED), LowEnergy Electron Diffraction (LEED), Auger Electron Spectroscopy (AES), and xray Photoelectron Spectroscopy (XPS). Continuous growth of multiple Mo coverages on a single Si wafer was accomplished with a technique developed for these experiments, involving a moveable substrate shutter. The coverages were corrected for the deposition profile (due to growth chamber geometry) with ex situ Rutherford Backscattering Spectroscopy (RBS) data and computer modelling. The growth mode was determined using Auger intensity measurements. In order to correct for the time dependence of the Auger intensities due to trace surface contamination and instrumental drift, a technique was developed which used Auger measurements on bulk Si and Mo to further normalize the intensity data for the fractional-monolayer coverages of Mo. The AES results in this dissertation show that for relatively slow Mo deposition (i.e. rates of approximately 0.05 Angstroms per second) onto either (100) or (111) Si substrates maintained at low temperatures (i.e. 100 °C), the first atomic monolayer of Mo is deposited in a non-layer-by-layer fashion, implying interdiffusion and/or agglomeration of the Mo overlayer. The LEED and RHEED results on similar samples show that the Mo layer is non-crystalline, i.e. there is no long-range periodicity. In addition, the deposition of Mo destroys the periodicity of the underlying Si atoms. For these deposition conditions, both the growth mode and the lack of crystallinity are independent of Si surface crystal structure.

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Isotropic and anisotropic etching have been used in silicon processing for the past few decades. However, optimization and adaptation of anisotropic etching to standard I.C. fabrication is a more recent technology. This paper describes new methods for process and material optimization in Orientation and Concentration dependent etching of the (1 0 0) plane in silicon. Furthermore, methods of oxide and nitride pinhole detection in (1 0 0) planes in silicon are presented. New mask alignment techniques to obtain an accurate etch front termination in silicon are also shown.

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