Notre recherche est particulièrement centrée sur le Sipo-SD, principale organisation de police allemande chargée de la répression de la Résistance. L’idée commune d’une « Gestapo », unique organisation allemande en charge de la répression de la Résistance, s’avère en réalité très sommaire. Une des questions centrale est de savoir comment la Gestapo s’inscrit dans l’antenne du Sipo-SD de Marseille. Nous prêterons tout l’attention sur la place de la Wehrmacht et, le rôle joué par l’Abwehr, la Feldgendarmerie. L’analyse de la 8ᵉ compagnie de la division Brandebourg et de la Geheim Feld Polizei (GFP) apportera un éclairage nouveau sur le dispositif répressif. L’examen du kommando de la section VI du consulat général d’Allemagne ou du Sonderkommando AS contribuera à une connaissance plus fine des acteurs. On ne peut traiter de la répression de la Résistance sans s’interroger sur la place de la Milice, la principale force répressive du régime de Vichy dans ce dispositif. Nous poursuivrons par l’étude du personnel du KDS de Marseille. Les auxiliaires français du Sipo-SD n’ont pas jamais fait l’objet d’une étude rigoureuse, ce que nous tenterons de faire pour Marseille. Quel est l’apport du PPF au Sipo-SD ? Enfin, nous terminerons en mettant l’accent sur les grandes opérations conduites par le KDS contre la Résistance marseillaise et régionale au cours de la période paroxystique de la répression de l’été 1944. L’opération Mercenary, les affaires Catilina et Antoine permettront d’analyser comment fonctionne la répression allemande dans la période qui précède la Libération et où elle atteint son plus haut niveau de violence. / Our research is particularly centered on Sipo-SD, main organization of German police in charge of the repression of the Resistance. The common idea of a "Gestapo", an unique German organization in charge of the repression of the Resistance, turns out in reality very basic. One of the questions power plants is to know how the Gestapo joins in the office of Sipo-SD of Marseille. We shall pay quite particularly the attention on the place of the Wehrmacht within this device, the role played by Abwehr, Feldgendarmerie. The analysis of the 8th company of the division Brandenburg and of the Geheim Feld Polizei (GFP) will give a new perspective on the repressive device. The examination of the Kommando squad of the section VI of the general consulate of Germany or Sonderkommando AS will contribute to a finer knowledge of the actors of the plan. We cannot deal with the repression of the resistance without wondering about the place of the Milice, the main repressive strength of the regime of Vichy in this device. We shall continue by the study of the staff of the KDS of Marseille. But the French auxiliaries of the Sipo-SD were never the object of a rigorous study, what we shall try to make for Marseille. Finally, we shall end by emphasizing the big operations led by the KDS against the Resistance from Marseille and regional during the paroxystic period of the repression of the summer, 1944. The operation Mercenary, the affairs Catilina and Antoine shall allow to analyze how works the German repression for the period which precedes the liberation and where it reaches its highest level of violence.

Mixed-signal processing systems especially data converters can be reliably tested at high frequencies using on-chip testing schemes based on memory. In this thesis, an on-chip testing strategy based on shift registers/memory (2 k bits) has been proposed for digital-to-analog converters (DACs) operating at 5 GHz. The proposed design uses word length of 8 bits in order to test DAC at high speed of 5 GHz. The proposed testing strategy has been designed in standard 65 nm CMOS technology with additional requirement of 1-V supply. This design has been implemented using Cadence IC design environment. The additional advantage of the proposed testing strategy is that it requires lower number of I/O pins and avoids the large number of high speed I/O pads. It therefore also solves the problem of the bandwidth limitation that is associated with I/O transmission paths. The design of the on-chip tester based on memory contains no analog block and is implemented entirely in digital domain. In the proposed design, low frequency of 1 MHz has been used outside the chip to load the data into the memory during the write mode. During the read mode, the frequency of 625 MHz is used to read the data from the memory. A multiplexing system is used to reuse the stored data during read mode to test the intended functionality and performance. In order to convert the parallel data into serial data at high frequency at the memory output, serializer has been used. By using the frequencies of 1.25 GHz and 2.5 GHz, the serializer speeds up the data from the lower frequency of 625 MHz to the highest frequency of 5 GHz in order to test DAC at 5 GHz.