Recent trend of minimization in microprocessors has introduced increasing self-heating effects in FinFET and MOSFET transistors. To study these self-heating effects, we developed self-consistent 3D models of FinFET and MOSFET basic logic gates, and simulated steady-state thermal transport for the worst heating case scenario. Incorporating size-dependent effective thermal conductivity of thin films instead of bulk values, these simulations provide a more accurate prediction of temperature rise in the logic gates. Results of our simulations predict higher temperature rise in FinFETs, compared to MOSFETs. Existence of buried oxide layer and confined geometry of FinFET structure are determined to be the most contributing to this higher temperature rise. To connect the results of our simulations to higher scale simulations, we proposed an equivalent thermal conductivity for each basic logic gate. These values were tested and found to be independent of the magnitude of chosen boundary conditions, as well as heat generation rate.

Recent trend of minimization in microprocessors has introduced increasing self-heating effects in FinFET and MOSFET transistors. To study these self-heating effects, we developed self-consistent 3D models of FinFET and MOSFET basic logic gates, and simulated steady-state thermal transport for the worst heating case scenario. Incorporating size-dependent effective thermal conductivity of thin films instead of bulk values, these simulations provide a more accurate prediction of temperature rise in the logic gates. Results of our simulations predict higher temperature rise in FinFETs, compared to MOSFETs. Existence of buried oxide layer and confined geometry of FinFET structure are determined to be the most contributing to this higher temperature rise. To connect the results of our simulations to higher scale simulations, we proposed an equivalent thermal conductivity for each basic logic gate. These values were tested and found to be independent of the magnitude of chosen boundary conditions, as well as heat generation rate.

abstract: Self-heating degrades the performance of devices in advanced technology nodes. Understanding of self-heating effects is necessary to improve device performance. Heat generation in these devices occurs at nanometer scales but heat transfer is a microscopic phenomena. Hence a multi-scale modeling approach is required to study the self-heating effects. A state of the art Monte Carlo device simulator and the commercially available Giga 3D tool from Silvaco are used in our study to understand the self heating effects. The Monte Carlo device simulator solves the electrical transport and heat generation for nanometer length scales accurately while the Giga 3D tool solves for thermal transport over micrometer length scales. The approach used is to understand the self-heating effects in a test device structure, composed of a heater and a sensor, fabricated and characterized by IMEC. The heater is the Device Under Test(DUT) and the sensor is used as a probe. Therefore, the heater is biased in the saturation region and the sensor is biased in the sub-threshold regime. Both are planar MOSFETs of gate length equal to 22 nm. The simulated I-V characteristics of the sensor match with the experimental behavior at lower applied drain voltages but differ at higher applied biases. The self-heating model assumes that the heat transport within the device follows Energy Balance model which may not be accurate. To properly study heat transport within the device, a state of the art Monte Carlo device simulator is necessary. In this regard, the Phonon Monte Carlo(PMC) simulator is developed. Phonons are treated as quasi particles that carry heat energy. Like electrons, phonons obey a corresponding Boltzmann Transport Equation(BTE) which can be used to study their transport. The direct solution of the BTE for phonons is possible, but it is difficult to incorporate all scattering mechanisms. In the Monte Carlo based solution method, it is easier to incorporate different relevant scattering mechanisms. Although the Monte Carlo method is computationally intensive, it provides good insight into the physical nature of the transport problem. Hence Monte Carlo based techniques are used in the present work for studying phonon transport. Monte Carlo simulations require calculating the scattering rates for different scattering processes. In the present work, scattering rates for three phonon interactions are calculated from different approaches presented in the literature. Optical phonons are also included in the transport problem. Finally, the temperature dependence of thermal conductivity for silicon is calculated in the range from 100K to 900K and is compared to available experimental data. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2016

abstract: This work is focused on modeling the reliability concerns in GaN HEMT technology. The two main reliability concerns in GaN HEMTs are electromechanical coupling and current collapse. A theoretical model was developed to model the piezoelectric polarization charge dependence on the applied gate voltage. As the sheet electron density in the channel increases, the influence of electromechanical coupling reduces as the electric field in the comprising layers reduces. A Monte Carlo device simulator that implements the theoretical model was developed to model the transport in GaN HEMTs. It is observed that with the coupled formulation, the drain current degradation in the device varies from 2%-18% depending on the gate voltage. Degradation reduces with the increase in the gate voltage due to the increase in the electron gas density in the channel. The output and transfer characteristics match very well with the experimental data. An electro-thermal device simulator was developed coupling the Monte Caro-Poisson solver with the energy balance solver for acoustic and optical phonons. An output current degradation of around 2-3 % at a drain voltage of 5V due to self-heating was observed. It was also observed that the electrostatics near the gate to drain region of the device changes due to the hot spot created in the device from self heating. This produces an electric field in the direction of accelerating the electrons from the channel to surface states. This will aid to the current collapse phenomenon in the device. Thus, the electric field in the gate to drain region is very critical for reliable performance of the device. Simulations emulating the charging of the surface states were also performed and matched well with experimental data. Methods to improve the reliability performance of the device were also investigated in this work. A shield electrode biased at source potential was used to reduce the electric field in the gate to drain extension region. The hot spot position was moved away from the critical gate to drain region towards the drain as the shield electrode length and dielectric thickness were being altered. / Dissertation/Thesis / Ph.D. Electrical Engineering 2013

abstract: The goal of this research work is to develop a particle-based device simulator for modeling strained silicon devices. Two separate modules had to be developed for that purpose: A generic bulk Monte Carlo simulation code which in the long-time limit solves the Boltzmann transport equation for electrons; and an extension to this code that solves for the bulk properties of strained silicon. One scattering table is needed for conventional silicon, whereas, because of the strain breaking the symmetry of the system, three scattering tables are needed for modeling strained silicon material. Simulation results for the average drift velocity and the average electron energy are in close agreement with published data. A Monte Carlo device simulation tool has also been employed to integrate the effects of self-heating into device simulation for Silicon on Insulator devices. The effects of different types of materials for buried oxide layers have been studied. Sapphire, Aluminum Nitride (AlN), Silicon dioxide (SiO2) and Diamond have been used as target materials of interest in the analysis and the effects of varying insulator layer thickness have also been investigated. It was observed that although AlN exhibits the best isothermal behavior, diamond is the best choice when thermal effects are accounted for. / Dissertation/Thesis / M.S. Electrical Engineering 2013

abstract: Combining the rapid development of semiconductor technologies, miniaturization of integrated circuits (ICs), and scaling down the device size is trending towards faster, cheaper, and more reliable components for low-power integrated circuits. Most research and development relate to efficiency, structure, materials, and performance. However, the thermal problem is also created and becomes more critical with shrinking device dimensions and increased integration densities, such that it affects the device performance and leads to degradation and damage. At the nanometer scale, the self-heating effect (SHE) is one of the main factors to degrade devices. Therefore, tracking and quantifying the SHE is important for reliability and efficiency issues. In this dissertation, engineers design two identical and closely spaced 40nm gate length silicon-on-insulator (SOI) n-channel metal-oxide-semiconductor-field-effect transistors (NMOSFETs) that share a common source with the same active silicon region. One of the MOSFETs acts as a heater to heat-up the active region, while the other one is a thermometer to evaluate the SHE and local temperature changes. The thermometer provides a method to calibrate the numerical models of self-heating and track the heat flow. Moreover, it also involves a trap-rich SOI wafer technology, in which a trap-rich layer, with higher resistivity and lower thermal conductivity compared to conventional bulk silicon substrates. The trap-rich SOI substrates can reduce the cross-talk and minimize the power consumption to increase the system performance. In particular, it offers a solution to radio frequency integrated circuits (RFICs) which require fast switching and low leakage. In high power amplifier (PA) applications, Watt-level PAs operates at less than 50% efficiency because of temperature limitations. The author uses experimental measurements of the local temperature changes, combined with simulations to examine the heat flow and temperature distribution. The approach may be useful to build a self-test application, because it can quantify the temperature changes by putting one or multiple NMOSFET thermometers around a complementary metal-oxide-semiconductor (CMOS) power amplifier, while only adding minimum die area. It points to ways in which it can optimize the reliability of RFIC applications, which operate under high-temperature or high-power conditions to protect the device before it is overheated or damaged. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2020

Electronics industry has been developing at a tremendous rate for last five decades and currently is one of the biggest industries in the world. The key to the rapid growth of electronics industry is innovation that made possible the constant scaling of transistors with reduced cost and improved performance. Scaling transistors were simpler at the beginning, but currently as the gate length of transistors has reached few nanometers, different short channel effects have emerged and power density of transistors has also increased drastically, which made further scaling much more challenging. To study electro-thermal transport in these reduced dimensionality devices, continuum models are no longer sufficient. In this work, the electrical and thermal transport properties have been modeled by solving Boltzmann Transport Equation (BTE) for electrons and phonons, respectively, using the Monte Carlo (MC) technique. To solve BTE for the phonons, a coupled Molecular Mechanics-Monte Carlo approach is employed where phonon band-structure is obtained using the atomistic modified Valence Force Field (VFF) model and is coupled with a Monte Carlo Phonon Transport kernel which solves the BTE for phonons. The phonon-phonon scattering is modeled in relaxation time approximation (RTA) using Holland’s formalism. Diffusive boundary scattering for phonons has been modeled using the Beckmann-Kirchhoff (B-K) surface roughness scattering model taking into account the effects of phonon wavelength, incident angles and degree of surface roughness. The effect of rough surface on longitudinal acoustic (LA) and transverse acoustic (TA) phonon branches has been studied with the help of the B-K model and it has been found that, at elevated temperatures, there is less backscattering to the LA branch due to rough surface. Effort has been made then to couple the developed phonon Monte Carlo transport simulator with an electron Monte Carlo transport simulator to study the origin and effects of self-heating in a nanoscale field-effect transistor (FET). In contrast to the widely used continuum model, where Fourier heat diffusion equation is usually solved to describe the thermal transport, the simulator developed in this dissertation treats both the electrons and the phonons at the particle level. Acoustic and intervalley g and f type electron-phonon scattering mechanisms are considered and the resulting local temperature modification has been used to bridge the electron and phonon transport paths. Phonon transport at the oxide-silicon interface has been modeled using the Diffuse Mismatch (DM) model, whereas, the phonons in the oxide have been described using the Debye model and temperature and frequency dependent relaxation time. The simulator is then benchmarked and used to study the electron-phonon transport processes in a FinFET device with a gate length of 18 nm, channel width of 4 nm, and a fin height of 8 nm. Preliminary results show that there can be a current degradation of as high as ~9.56% due to self-heating effect. Also, temperature in the entire channel region could rise due to self-heating. The maximum temperature rise in the channel region is found to be ~30K.

Cette thèse s’inscrit dans le domaine de la fatigue des matériaux composites. Elle consiste à estimer les performances en fatigue d’un matériau composite thermoplastique tissé, en fibres de carbone et matrice PA66, par des essais d’auto-échauffement. Suite à une caractérisation de l’endommagement du matériau sous chargement monotone par un suivi acoustique, thermique et optique, une campagne d’essais de fatigue est réalisée sur deux configurations du matériau, à 0° et à 45°. Plusieurs méthodes de modélisation de la courbe S-N sont proposées, afin de déterminer la limite de fatigue du matériau. Il est montré que l’estimation de cette limite et de son intervalle de confiance est rendue difficile par la forte dispersion des données expérimentales. Des essais d’auto-échauffement sont alors réalisés, consistant à appliquer un chargement de fatigue sur un nombre de cycles limité, en incrémentant la contrainte maximale appliquée palier après palier. Des outils de traitement du signal sont développés afin de déterminer une contrainte seuil et son intervalle de confiance à partir de laquelle l’échauffement s’accélère. Cependant, cette contrainte seuil reste conservative par rapport à la limite de fatigue.Une autre approche est alors développée, consistant à suivre les amplitudes du signal thermique. De nouveaux outils de traitement du signal sont développés, dans le but de réaliser des cartographies de l’éprouvette à partir des amplitudes des harmoniques. Il est alors montré qu’il est possible d’obtenir les mêmes courbes que les courbes d’auto-échauffement en réalisant un suivi des amplitudes des harmoniques, et ce pour une centaine de cycles seulement. Un nouveau protocole d’essai d’auto-échauffement est alors mis en place, fondé sur une centaine de paliers de quelques centaines de cycles seulement, permettant d’aboutir à un suivi des harmoniques avec des courbes finales quasi-continues en un minimum de temps. / This thesis is part of the study on the fatigue of composite materials. It consists in estimating the fatigue performance of a thermoplastic composite woven material, made of carbon fibres and PA66 matrix, by self-heating tests. Following a characterization of the damage to the material under monotonous loading by acoustic, thermal and optical monitoring, a fatigue test campaign is carried out on two material configurations, at 0° and 45°. Several methods for modelling the S-N curve are proposed to determine the fatigue limit of the material. It is shown that the estimation of this limit and its confidence interval is complicated by the large dispersion of experimental data. Self-heating tests are then carried out, consisting of applying a fatigue load over a limited number of cycles, increasing the maximum stress applied step by step. Signal processing tools are developed to determine a threshold stress and its confidence interval at which the heating accelerates. However, this threshold stress remains conservative in comparison to the fatigue limit. Another approach is then developed, consisting in monitoring the amplitudes of the thermal signal. New signal processing tools are being developed to map the specimen from the harmonic amplitudes. It is then shown that it is possible to obtain the same curves as the selfheating curves by monitoring the amplitudes of the harmonics, and this for only a hundred cycles. A new self-heating test protocol is then implemented, based on a hundred steps of only a few hundred cycles, allowing harmonics to be monitored with almost continuous final curves in a minimum of time.

La torréfaction est un procédé thermochimique qui, appliqué à la biomasse, permet d'améliorer les propriétés de ce matériau en tant que vecteur énergétique. Il s'opère entre 250 et 300°C sous atmosphère inerte. Dans le contexte énergétique actuel, l'augmentation des volumes de matières torréfiées produites, transportées et stockées est annoncée pour la décennie à venir. Ce développement à l'échelle industrielle soulève la problématique de l'auto-échauffement et des risques qui lui sont associés. Dans ce travail, une approche multi-échelles a été mise en oeuvre pour étudier le comportement du bois torréfié en présence d'oxygène. Des expériences ont été réalisées à l'échelle du milligramme, à celle d'une sphère de bois torréfié et à celle d'un lit de plaquettes de bois torréfié. Les réactions et l'auto-échauffement généré à l'échelle de la sphère ont été modélisés. Les résultats du modèle présentent une bonne adéquation avec les résultats expérimentaux. Quelle que soit l'échelle considérée, il a été montré que le bois sévèrement torréfié était plus sensible à l'auto-échauffement et à l'auto-combustion que le bois doucement torréfié. Il a également été confirmé que le suivi des gaz émis pourrait être un bon indicateur de la présence d'un auto-échauffement dans un lit de biomasse torréfiée. / Torrefaction is a thermochemical process which, applied to biomass, increases the fuel properties of this material. It operates between 250 and 300°C in an atmosphere depleted of oxygen. Considering the actual energetic context, the large scale development of the torrefied market is expected to the decade to come. This scale-up rises self-heating issue and its associated risks. In this work, a multiscale approach has been used to study the torrefied wood behavior when it gets into contact with oxygen The reactions have been studied at the milligram scale, self-heating has been generated for a unique torrefied wood sphere and self-heating at the reactor scale has been studied to better represent industrial conditions. Experiences have been done at all of these scales. Moreover, a modeled has been proposed to describe the reactions and the self-heating generated at the particle scale. Numerical results show good agreement with experiments. Furthermore, whatever the scale considered, it has been shown that the severely torrefied wood is more prone to self-heating than the mildly torrefied wood. It was also confirmed that continuous emitted gases monitoring could be a good indicator to detect and thus prevent a self-heating of a torrefied biomass bed.

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