Power devices play key roles in the power electronics applications. In order for the power electronics designers to fully utilize the performance advantages of power devices, compact power device models are needed in the circuit simulator (Saber, P-spice, etc.). Therefore, it is very important to get accurate device models. However, there are many challenges due to the development of new power devices with new internal structure and new semiconductor materials (SiC, GaN, etc.). In this dissertation, enhanced power diode model is presented with an improvement in the reverse blocking region. In the current power diode model in the Saber circuit simulator, an empirical approach was used to describe the low-bias reverse blocking region by introducing an effect called "conduction loss," a parameter that causes a linear relationship between the device voltage and current at low bias voltages with no physics meaning. Furthermore, this term is not sufficient to accurately describe the changes to the device characteristics as the junction temperature is varied. In the enhanced model, an analytical temperature dependent model for the reverse blocking characteristics has been developed for Schottky/JBS diodes by including the thermionic-emission mechanism in the low-bias range. The newly derived model equations have been implemented in Saber circuit simulator using MAST language. An automated parameter extraction software package developed for constructing silicon (Si) and silicon carbide (SiC) power diode models, which is called DIode Model Parameter extrACtion Tools (DIMPACT). This software tool extracts the data necessary to establish a library of power diode component models and provides a method for quantitatively comparing between different types of devices and establishing performance metrics for device development. This dissertation also presents a new Saber-compatible approach for modeling the inter-electrode capacitances of the Si CoolMOSTM transistor. This new approach accurately describes all three inter-electrode capacitances (i.e., gate-drain, gate-source, and drain-source capacitances) for the full operating range of the device. The model is derived using the actual charge distribution within the device rather than assuming a lumped charge or one-dimensional charge distribution. The comparison between the simulated data with the measured results validates the accuracy of the new physical model. / Ph. D.

In recent years, the SiC power semiconductor has emerged as an attractive alternative that pushes the limitations of junction temperature, power rating, and switching frequency of Si devices. These advanced properties will lead converters to higher power density. However, the reliability of the SiC semiconductor is still under investigation, and at the same time, the standard Si device packages do not meet the requirement of high temperature operation. In order to take full advantage of SiC semiconductor devices, high density, high temperature device packaging needs to be developed. In this dissertation, a high temperature wirebond package for multi-chip phase-leg power module using SiC devices was designed, developed, fabricated and tested. The details of the material selection and thermo-mechanical reliability evaluation are described. High temperature power test shows that the presented package can perform well at the high junction temperature. In order to increase the power density, reduce the parasitic parameters, and enhance the electrical, thermo-mechanical performance over wirebond packages, planar package is utilized to better take advantages of SiC device. This dissertation proposed a novel package, in which the interconnections can be formed on small dimensional pads and enclosed pads that may baffle the regular solder based connection in other planar packages. Electrical and thermo-mechanical tests of the prototype module demonstrate the functionality and reliability of the presented planar packaging methodology. In this dissertation, together with the design example, the manual module layout design and automatic module layout design process are also presented. Furthermore, a systematic optimal design process and parametric study of the heatsink-fan cooling system by applying the analytical model is described. This dissertation also established a systematic testing procedure which can rapidly detect defects and reduce the risk in high temperature packaging testing. Finally, a wirebond module and a planar module are designed for 175 ºC junction temperature and 250 ºC junction temperatures. All the key concepts and ideas developed in this work are implemented in the prototype module development and then verified by the experimental results. / Ph. D.

The development of high power density three-phase ac converter has been a hot topic in power electronics area due to the increasing needs in applications like electric vehicle, aircraft and aerospace, where light weight and/or low volume is usually a must. Many challenges exist due to the complicated correlations in a three-phase power converter system. In addition, with the emerging SiC device technology the operating frequency of the converter can be potentially pushed to the range from tens of kHz to hundreds of kHz at higher voltage and higher power conditions. The extended frequency range brings opportunities to further improve the power density of the converter. Technologies based on existing devices need to be revisited. In this dissertation, a systematic methodology to analyze and design the high power density three-phase ac converter is developed. All the key factors of the converter design are explored from the high density standpoint. Firstly, the criteria for the passive filter selection are derived and the relationship between the switching frequency and the size of the EMI filter is investigated. A function integration concept as well as the physical design approach is proposed. Secondly, a topology evaluation method is presented, which provides the insight into the relationships between the system constraints, operating conditions and design variables. Four topologies are then compared with the proposed approach culminating with a favored topology under the given conditions. Thirdly, a novel average model is developed for the selected topology, and used for devising a carrier-based control approach with simple calculation and good regulation performance. Fourthly, the converter failure mode operation and corresponding protection approaches are discussed and developed. Finally, a 10 kW three-phase ac/ac converter is built with the SiC devices. All the key concepts and ideas developed in this work are implemented in this hardware system and then verified by the experimental results. / Ph. D.

This dissertation aims at designing a three-phase voltage source inverter based on the SiC devices and mainly the SiC-MOSFET. The designed inverter offers a possibility to drive the power inverter with a very high efficiency, which can reach up to 99% for 16 kW rated power. The design is dedicated to the electric vehicle application, and it aims at • Providing a comparative study on some of the current discrete SiC devices in terms of the total losses and the thermal conductivity. In addition, a behavioral study of the effective channel mobility with temperature variation in the SiC MOSFET will be investigated. • Designing a gate driver which fits with the driving requirements of the SiC-MOSFET and provides a trade-off between the switching losses and the EMI behavior. • Designing a three-phase voltage source inverter with 16 kW rated power; the design includes minimizing the inverter losses and extracts the EMI model of the power inverter by considering the effects of the parasitic parameters; moreover a short guideline for selecting the heat-sink based on the static network is introduced. • Proposing a new and simplified carried-based PWM, this will reduce the harmonics in the output waveforms and enhance the utilization of the DC-link voltage. • Proposing a new strategy for compensating the dead-time effect in carrier based-PWM and to find out the proper dead-time level in VSI based on SiC –MOSFET. • Designing faults diagnosis and protection circuits in order to protect the power inverter from the common faults; overcurrent, short-circuit, overvoltage, and overtemperature faults.

L'objectif du projet CONCIGI-HT (CONvertisseur alternatif-continu Compact à Isolement Galvanique Intégré Haute Tension) est d'augmenter le rendement des chaînes de traction tout en réduisant la masse et le volume de la fonction de conversion Alternatif/Continu. Pour cela, l'ensemble transformateur basse fréquence - redresseur est remplacé par une structure multi-convertisseurs, directement connectée à la caténaire haute tension et intégrant des transformateurs fonctionnant en moyenne fréquence (plusieurs kHz). Cette thèse concerne plus particulièrement la caractérisation et la mise en œuvre de composants semi-conducteurs haute tension dans des structures de conversion statiques à étage intermédiaire moyenne fréquence. L'étude est effectuée sur la base d'une chaîne de traction de 2 MW fonctionnant sur un réseau 25 kV/50 Hz. Le premier chapitre présente l'état de l'art de l'Automotrice à Grande Vitesse (AGV) récemment produite par ALSTOM. C'est la chaîne de traction de cet engin qui sert de référence pour l'étude des nouvelles topologies à transformateur moyenne fréquence. Le deuxième chapitre décrit tout d'abord la structure d'une chaîne de traction classique et présente ensuite deux topologies multicellulaires à transformateur moyenne fréquence applicables en traction électrique ferroviaire (la structure indirecte à redresseur de courant MLI et convertisseur DC/DC à résonance ainsi que la topologie directe associant des convertisseurs duaux). Les avantages et inconvénients de ces topologies sont mis en évidence. Le troisième chapitre concerne la mise en œuvre et la caractérisation en commutation douce de composants Silicium 6,5 kV dans les deux topologies présentées précédemment. Deux bancs de test, représentant un étage élémentaire de conversion, ainsi que des allumeurs spécifiques dédiés à la commutation douce, ont été réalisés. Ils permettent l'étude des semi-conducteurs en régime permanent dans des conditions nominales de fonctionnement (3,6 kV / 100 A). Le quatrième chapitre présente la mise en œuvre et la caractérisation de composants en carbure de silicium (SiC). Pour cela des modules de puissance à base de puces 10 kV (MOSFET et Diodes) ont été réalisés. Les résultats expérimentaux, obtenus sur les bancs de test réalisés au chapitre précédent, mettent en évidence une réduction significative des pertes et démontrent la viabilité de la topologie à convertisseurs duaux pour une application en 25 kV/50 Hz. La conclusion présente un premier design d'un bloc élémentaire et les gains en masse et volume ainsi que les économies d'énergies qui pourront être obtenus par rapport à une structure classique. / The objective of the CONCIGI-HT project (Compact AC/DC converter with Integrated High Voltage Galvanic Insulation) is to increase the efficiency of traction drives while reducing the mass and volume of the AC/DC conversion. To do that, the part low-frequency transformer - rectifier is replaced by a multi-converter topology, directly connected to the high voltage power supply and incorporating medium frequency transformers (several kHz). This thesis relates more particularly to the characterization and implementation of high voltage semiconductors in conversion topologies with intermediate medium frequency link. The study is performed on the basis of a traction drive of 2 MW operating on a 25 kV/50 Hz power supply. The first chapter presents the state of the art of the Automotrice à Grande Vitesse (AGV) recently produced by ALSTOM. The traction drive of this vehicle is used as a reference for the study of new topologies with medium frequency transformer. The second chapter first describes the structure of a conventional traction drive and then presents two multicellular topologies with medium frequency transformer applicable to railway traction (the indirect structure with PWM rectifier and DC/DC resonant converter and the direct topology combining dual converters). The advantages and disadvantages of these topologies are highlighted. The third chapter deals with the implementation and soft switching characterization of 6.5 kV Silicon components in both topologies presented above. Two test benches, representing a basic conversion stage, as well as specific drivers dedicated to the soft switching, has been made. They allow the study of semiconductors in nominal operating conditions (3.6 kV / 100 A). The fourth chapter presents the implementation and characterization of silicon carbide components (SiC). For this, power modules based on 10 kV chips (MOSFET and Diodes) have been achieved. The experimental results obtained on test benches made in the previous chapter, show a significant reduction in losses and demonstrate the viability of the dual converter topology for a 25 kV/50 Hz application. The conclusion presents the first design of an elementary block and gains in mass and volume as well as the energy savings that can be achieved compared to a conventional structure.

This dissertation aims at designing a three-phase voltage source inverter based on the SiC devices and mainly the SiC-MOSFET. The designed inverter offers a possibility to drive the power inverter with a very high efficiency, which can reach up to 99% for 16 kW rated power. The design is dedicated to the electric vehicle application, and it aims at • Providing a comparative study on some of the current discrete SiC devices in terms of the total losses and the thermal conductivity. In addition, a behavioral study of the effective channel mobility with temperature variation in the SiC MOSFET will be investigated. • Designing a gate driver which fits with the driving requirements of the SiC-MOSFET and provides a trade-off between the switching losses and the EMI behavior. • Designing a three-phase voltage source inverter with 16 kW rated power; the design includes minimizing the inverter losses and extracts the EMI model of the power inverter by considering the effects of the parasitic parameters; moreover a short guideline for selecting the heat-sink based on the static network is introduced. • Proposing a new and simplified carried-based PWM, this will reduce the harmonics in the output waveforms and enhance the utilization of the DC-link voltage. • Proposing a new strategy for compensating the dead-time effect in carrier based-PWM and to find out the proper dead-time level in VSI based on SiC –MOSFET. • Designing faults diagnosis and protection circuits in order to protect the power inverter from the common faults; overcurrent, short-circuit, overvoltage, and overtemperature faults.