Thesis (Ph. D.)--University of Missouri-Columbia, 2001. / Typescript. Vita. Includes bibliographical references (leaves 107-109). Also available on the Internet.

Thesis (M.A.)--University of Central Florida, 2009. / Adviser: Arlen Chase. Includes bibliographical references (p. 60-68).

Thesis (Ph. D.)--University of Missouri-Columbia, 2001. / Typescript. Vita. Includes bibliographical references (leaves 107-109). Also available on the Internet.

Thesis (M.Sc.(Epidemiology))--University of Pretoria, 2003. / Also available online.

Thesis (M.S.)--University of North Carolina at Wilmington, 2003. / Includes bibliographical references (leaves : 48-51).

Purpose: This work systematically reviews the extant academic management literature on supply networks. It specifically examines how network configurations and network governance mechanisms influence each other in supply networks. Design: 125 analytical and empirical studies were identified using an evidence-based approach to review the literature mainly published between 1985 and 2012. Synthesis: Drawing on a multi-disciplinary theoretical foundation, this work develops an integrative framework to identify three distinct yet interdependent themes that characterize the study of supply networks: a) Network Configurations (structures and relationships); b) Network Governance Mechanisms (formal and informal); and c) The Interplay between Network Configurations and Network Governance Mechanisms. Findings: Network configurations and network governance mechanisms mutually influence each other and cannot be considered in isolation. Formal and informal governance mechanisms provide better control when used as complements rather than as substitutes. The choice of governance mechanism depends on the nature of exchange; role of management; desired level of control; level of flexibility in formal contracts; and complementary role of formal and informal governance mechanism. Research implications: This nascent field has thematic and methodological research opportunities for academics. Comparative network analysis using longitudinal case studies offers a rich area for further study. Practical Implications: The complexity surrounding the conflicting roles of managers at the organisation and network levels poses a significant challenge during the development and implementation stage of strategic network policies. Originality/value: This review reveals that formal and informal governance mechanisms provide better control when used as complements rather than as substitutes.

The thesis develops a coherent and comprehensive supply chain management framework for managing health care goods provided as humanitarian assistance in complex political emergencies. The objective of the research is improving the effectiveness and efficiency of logistics services which enable humanitarian organizations to reduce suffering, morbidity, disability and mortality of populations affected by armed conflicts. The framework is deduced from models and concepts developed for commercial logistics and supply chain management by considering the objectives and constraints of humanitarian organizations, the context in which they work as well as the characteristics of health care goods. For the logistics processes of item selection, sourcing, storage, transport and customer service frameworks are developed at the levels of supply network design, supply chain planning and supply chain operations. For each category, decision criteria are proposed according to the phase of the crisis, the distance from the crisis area as well as the criticality of health care goods. The framework allows humanitarian organizations to develop strategic, tactical as well as operational plans for providing logistical support to specific humanitarian assistance programmes within their constraints and in the context of the respective complex political emergency. (author's abstract)

As process technologies continue their rapid advancement, transistor features are shrinking to almost unimaginable sizes. Some dimensions can be measured at the atomic level. One consequence of these smaller devices is that they have become more susceptible to deviations from nominal than previous process nodes. To illustrate, as few as one hundred atoms determine how much voltage is needed to turn a transistor on and off. With over two billion transistors on a single chip, it is easy to imagine how even the tiniest of variations can affect many transistors throughout the entire chip. To compensate for these deviations, chip designers add margin to their designs. Even more margin is then added for increased safety. All of this margin leads to chips that are slower than a nominal design would be. At the other end of the spectrum, these same deviations might result in chips that are faster than needed. However, faster is not always better, as these faster chips usually require more power. Even worse, these deviations sometimes produce chips that are both slower and use more power than a nominal design. TuneChip is designed to mitigate the effects of these process variations by speeding up areas of a chip that need to run faster while at the same time reducing power in parts of a chip that are operating faster than needed. TuneChip attacks the variation problem by changing the voltage on small areas of the chip in response to the type of variation for that particular area. Since voltage has a strong relationship to the speed of a chip, TuneChip can increase the speed of areas that need to go faster. At the same time, TuneChip can decrease the speed of other areas on the chip that are too fast. Even more important than speed for current designs, though, is power. Changing the voltage has a quadratic relationship with the amount of power consumed by that device. Specifically, a 10% reduction in supply voltage yields a 20% reduction in energy. Moreover, it is not only battery powered devices that benefit from reduced energy consumption; some high performance designs are limited by how much they can cool the chip. Cost-effective cooling technology is not scaling at anywhere near the same rate as transistor geometries. Reducing a chip’s power consumption also reduces excess heat. In order to selectively change the voltage of specific areas of the design, TuneChip starts by partitioning the chip into smaller blocks. A dual voltage design style with two voltage grids spans the entire chip. In order to best react to variations particular to an individual chip, each block is assigned a supply voltage only after manufacturing. First, the chip is tested at high voltage and high power in order to verify the correct functionality of that chip. If the chip passes its functionality testing, each individual block is tested to determine how fast it is operating. Blocks that need to run faster are configured to connect to the high supply voltage grid, and blocks that are able to run slower are configured to connect to the low supply voltage grid. The configurable block supply voltage connection is accomplished with pmos pass transistors that act like switches. By having only one pmos pass transistor switch turned on at a time, each block has a choice of two supply voltages. / text

published_or_final_version / Politics and Public Administration / Master / Master of Public Administration

published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy