Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.

Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.

Thesis (M.S.)--Oregon State University, 2008. / Printout. Includes bibliographical references (leaves 67-72). Also available on the World Wide Web.

Thesis (Ph. D.)--Ohio State University, 2007. / Title from first page of PDF file. Includes bibliographical references (p. 116-123).

abstract: The object of this study is to investigate and improve the performance/stability of the flexible thin film transistors (TFTs) and to study the properties of metal oxide transparent conductive oxides for wide range of flexible electronic applications. Initially, a study has been done to improve the conductivity of ITO (indium tin oxide) films on PEN (polyethylene naphthalate) by inserting a thin layer of silver layer between two ITO layers. The multilayer with an optimum Ag mid-layer thickness, of 8 nm, exhibited excellent photopic average transmittance (~ 88 %), resistivity (~ 2.7 × 10-5 µ-cm.) and has the best Hackee figure of merit (41.0 × 10-3 Ω-1). The electrical conduction is dominated by two different scattering mechanisms depending on the thickness of the Ag mid-layer. Optical transmission is explained by scattering losses and absorption of light due to inter-band electronic transitions. A systematic study was carried out to improve the performance/stability of the TFTs on PEN. The performance and stability of a-Si:H and a-IZO (amorphous indium zinc oxide) TFTs were improved by performing a systematic low temperature (150 °C) anneals for extended times. For 96 hours annealed a-Si:H TFTs, the sub-threshold slope and off-current were reduced by a factor ~ 3 and by 2 orders of magnitude, respectively when compared to unannealed a-Si:H TFTs. For a-IZO TFTs, 48 hours of annealing is found to be the optimum time for the best performance and elevated temperature stability. These devices exhibit saturation mobility varying between 4.5-5.5 cm2/V-s, ION/IOFF ratio was 106 and a sub-threshold swing variation of 1-1.25 V/decade. An in-depth study on the mechanical and electromechanical stress response on the electrical properties of the a-IZO TFTs has also been investigated. Finally, the a-Si:H TFTs were exposed to gamma radiation to examine their radiation resistance. The interface trap density (Nit) values range from 5 to 6 × 1011 cm-2 for only electrical stress bias case. For "irradiation only" case, the Nit value increases from 5×1011 cm-2 to 2×1012 cm-2 after 3 hours of gamma radiation exposure, whereas it increases from 5×1011 cm-2 to 4×1012 cm-2 for "combined gamma and electrical stress". / Dissertation/Thesis / Ph.D. Materials Science and Engineering 2011

Nas últimas décadas, o interesse na eletrônica flexível tem aumentado. Sistemas que apresentam benefícios, tais como: baixo custo, melhor desempenho, transparência, confiabilidade e melhores credenciais ecológicas, estão sendo extensivamente pesquisados por vários grupos. Os transistores de filmes-finos possuem potencial para alcançarem essas características. Dispositivos baseados em óxido de zinco (ZnO) tem atraído pesquisadores devido as suas propriedades elétricas, sensoriais e ópticas. Neste trabalho, nanopartículas de ZnO foram utilizadas como semicondutor ativo e cross-linked PVP (polivinilfenol) e PECVD-SiO2 (plasma enhanced chemical vapor deposition silicon dioxide) como dielétricos de porta para integrar transistores de filmes-finos. Este processo de integração tem por objetivo os pré-requisitos de baixo custo e baixa temperatura (<200°C). Por esta razão, a utilização de técnicas de integração simples, como o spin-coating ou a técnica de sidewall-etchback, foram utilizadas. Infelizmente, existem problemas relacionados à confiabilidade em dispositivos baseados em ZnO, entre eles a degradação no tempo ou a histerese. Após uma investigação experimental da histerese na característica de transferência, um modelo qualitativo para o comportamento observado é proposto. Observou-se que a direção da histerese é afetada pela variação da temperatura quando o dielétrico polimérico é usado. Baseando-se na caracterização dos transistores, a polarização do PVP, as armadilhas na superfície das nanopartículas e na interface com o dielétrico, bem como a liberação de moléculas de oxigênio da superfície das nanopartículas foram atribuídas como as principais causas da histerese. Além disso, uma flutuação discreta da corrente é observada em testes de estresse devido à captura e liberação de portadores em determinados caminhos de corrente no transistor, semelhante a random telegraph signal (RTS), relatado em MOSFET nanométricos. Este resultado suporta o hipotético mecanismo de transporte de elétrons (caminhos de percolação) em filmes compostos por ZnO nanoparticulado. / During the last decades, the interest in flexible electronics has arisen. Systems that present benefits such as low cost, improved performance, transparency, reliability and better environmental credential are being extensively researched by several groups. Thin-film transistors (TFT) have good potential concerning these technologies. Therefore, zinc oxide (ZnO) based devices have been attracting researchers for its electrical, sensory and optical properties. In this work, ZnO nanoparticles were used to integrate thin-film transistors, in which cross-linked PVP (Poly(4-vinylphenol)) and PECVD-SiO2 (plasma enhanced chemical vapor deposition silicon dioxide) were used as gate dielectric layer. The complete integration process targets low cost and low temperature requirements (< 200°C). For this reason, simple process techniques as spin-coating or sidewall-etchback were used. Unfortunately, there are different reliability concerns in ZnO devices, among them aging or hysteresis. An experimental investigation of the hysteresis in the transfer characteristic is performed, and a qualitative model for the observed behavior is proposed. It was observed that the hysteresis direction is affected by temperature variation when the polymeric dielectric is used. The PVP bulk polarization, the traps in nanoparticles and at the polymeric dielectric interface, as well as the desorption of oxygen molecules in the surface of the nanoparticles, were attributed as the main cause of the hysteretic behavior. Moreover, capture and release of charge carriers by traps at determined current paths in the transistor lead to discrete current fluctuations in stress tests, similar to random telegraph signal (RTS) reported in nanoscale MOSFET. This result supports the hypothesis of charge transport mechanism (percolation paths) in nanoparticulate ZnO.

Nas últimas décadas, o interesse na eletrônica flexível tem aumentado. Sistemas que apresentam benefícios, tais como: baixo custo, melhor desempenho, transparência, confiabilidade e melhores credenciais ecológicas, estão sendo extensivamente pesquisados por vários grupos. Os transistores de filmes-finos possuem potencial para alcançarem essas características. Dispositivos baseados em óxido de zinco (ZnO) tem atraído pesquisadores devido as suas propriedades elétricas, sensoriais e ópticas. Neste trabalho, nanopartículas de ZnO foram utilizadas como semicondutor ativo e cross-linked PVP (polivinilfenol) e PECVD-SiO2 (plasma enhanced chemical vapor deposition silicon dioxide) como dielétricos de porta para integrar transistores de filmes-finos. Este processo de integração tem por objetivo os pré-requisitos de baixo custo e baixa temperatura (<200°C). Por esta razão, a utilização de técnicas de integração simples, como o spin-coating ou a técnica de sidewall-etchback, foram utilizadas. Infelizmente, existem problemas relacionados à confiabilidade em dispositivos baseados em ZnO, entre eles a degradação no tempo ou a histerese. Após uma investigação experimental da histerese na característica de transferência, um modelo qualitativo para o comportamento observado é proposto. Observou-se que a direção da histerese é afetada pela variação da temperatura quando o dielétrico polimérico é usado. Baseando-se na caracterização dos transistores, a polarização do PVP, as armadilhas na superfície das nanopartículas e na interface com o dielétrico, bem como a liberação de moléculas de oxigênio da superfície das nanopartículas foram atribuídas como as principais causas da histerese. Além disso, uma flutuação discreta da corrente é observada em testes de estresse devido à captura e liberação de portadores em determinados caminhos de corrente no transistor, semelhante a random telegraph signal (RTS), relatado em MOSFET nanométricos. Este resultado suporta o hipotético mecanismo de transporte de elétrons (caminhos de percolação) em filmes compostos por ZnO nanoparticulado. / During the last decades, the interest in flexible electronics has arisen. Systems that present benefits such as low cost, improved performance, transparency, reliability and better environmental credential are being extensively researched by several groups. Thin-film transistors (TFT) have good potential concerning these technologies. Therefore, zinc oxide (ZnO) based devices have been attracting researchers for its electrical, sensory and optical properties. In this work, ZnO nanoparticles were used to integrate thin-film transistors, in which cross-linked PVP (Poly(4-vinylphenol)) and PECVD-SiO2 (plasma enhanced chemical vapor deposition silicon dioxide) were used as gate dielectric layer. The complete integration process targets low cost and low temperature requirements (< 200°C). For this reason, simple process techniques as spin-coating or sidewall-etchback were used. Unfortunately, there are different reliability concerns in ZnO devices, among them aging or hysteresis. An experimental investigation of the hysteresis in the transfer characteristic is performed, and a qualitative model for the observed behavior is proposed. It was observed that the hysteresis direction is affected by temperature variation when the polymeric dielectric is used. The PVP bulk polarization, the traps in nanoparticles and at the polymeric dielectric interface, as well as the desorption of oxygen molecules in the surface of the nanoparticles, were attributed as the main cause of the hysteretic behavior. Moreover, capture and release of charge carriers by traps at determined current paths in the transistor lead to discrete current fluctuations in stress tests, similar to random telegraph signal (RTS) reported in nanoscale MOSFET. This result supports the hypothesis of charge transport mechanism (percolation paths) in nanoparticulate ZnO.

abstract: This thesis work mainly examined the stability and reliability issues of amorphous Indium Gallium Zinc Oxide (a-IGZO) thin film transistors under bias-illumination stress. Amorphous hydrogenated silicon has been the dominating material used in thin film transistors as a channel layer. However with the advent of modern high performance display technologies, it is required to have devices with better current carrying capability and better reproducibility. This brings the idea of new material for channel layer of these devices. Researchers have tried poly silicon materials, organic materials and amorphous mixed oxide materials as a replacement to conventional amorphous silicon layer. Due to its low price and easy manufacturing process, amorphous mixed oxide thin film transistors have become a viable option to replace the conventional ones in order to achieve high performance display circuits. But with new materials emerging, comes the challenge of reliability and stability issues associated with it. Performance measurement under bias stress and bias-illumination stress have been reported previously. This work proposes novel post processing low temperature long time annealing in optimum ambient in order to annihilate or reduce the defects and vacancies associated with amorphous material which lead to the instability or even the failure of the devices. Thin film transistors of a-IGZO has been tested for standalone illumination stress and bias-illumination stress before and after annealing. HP 4155B semiconductor parameter analyzer has been used to stress the devices and measure the output characteristics and transfer characteristics of the devices. Extra attention has been given about the effect of forming gas annealing on a-IGZO thin film. a-IGZO thin film deposited on silicon substrate has been tested for resistivity, mobility and carrier concentration before and after annealing in various ambient. Elastic Recoil Detection has been performed on the films to measure the amount of hydrogen atoms present in the film. Moreover, the circuit parameters of the thin film transistors has been extracted to verify the physical phenomenon responsible for the instability and failure of the devices. Parameters like channel resistance, carrier mobility, power factor has been extracted and variation of these parameters has been observed before and after the stress. / Dissertation/Thesis / M.S. Electrical Engineering 2013

No description available.

Transparent oxide electronics have emerged as promising materials to shape the future of electronics. While several n-type oxides have been already studied and demonstrated feasibility to be used as active materials in thin film transistors, high performance p-type oxides have remained elusive. This dissertation is devoted to the study of transparent p-type oxide semiconductor tin monoxide and its use in the fabrication of field effect devices. A complete study on the deposition of tin monoxide thin films by direct current reactive magnetron sputtering is performed. Carrier density, carrier mobility and conductivity are studied over a set of deposition conditions where p-type conduction is observed. Density functional theory simulations are performed in order to elucidate the effect of native defects on carrier mobility. The findings on the electrical properties of SnO thin films are then translated to the fabrication of thin films transistors. The low processing temperature of tin monoxide thin films below 200 oC is shown advantageous for the fabrication of fully transparent and flexible thin film transistors. After careful device engineering, including post deposition annealing temperature, gate dielectric material, semiconductor thickness and source and drain electrodes material, thin film transistors with record device performance are demonstrated, achieving a field effect mobility >6.7 cm2V-1s-1. Device performance is further improved to reach a field effect mobility of 10.8 cm2V-1s-1 in SnO nanowire field effect transistors fabricated from the sputtered SnO thin films and patterned by electron beam lithography. Downscaling device dimension to nano scale is shown beneficial for SnO field effect devices not only by achieving a higher hole mobility but enhancing the overall device performance including better threshold voltage, subthreshold swing and lower number of interfacial defects. Use of p-type semiconductors in nonvolatile memory applications is then demonstrated by the fabrication of hybrid ferroelectric field effect transistors composed of organic ferroelectric layer polyvinylidene fluoride trifluoroethylene and inorganic p-type semiconductor tin monoxide. Both rigid and flexible devices are demonstrated, showing the advantages of low temperature oxides over polymer semiconductors by achieving much better performance, such as order of magnitude higher hole mobility.