De nombreuses applications ont émergées ses dernières années pour les gammes de fréquences millimétriques (le radar, l’imagerie, les communications inter-satellitaire ou à faible distance/haut débits,…). Pour ce type d’applications, le silicium est longtemps resté en retrait, du fait de ses performances limitées par rapport aux composants III-V. Dans le contexte du projet Européen DotFive, plusieurs entreprises et laboratoires (STMicroelectronics, Infineon, IMEC, IHP, Dresden University,….) ont pour ambition la production de composants en technologie silicium proposant des fréquences maximales supérieures à 0.5 THz d’ici à 2013. Dans ce contexte STMicroelectronics a récemment publié des résultats sur des composants montrant une fréquence FMAX> 400 GHz, l’état de l’art se situant aujourd’hui à 0.5 THz (toujours dans le contexte du projet DotFive). Le silicium semble donc aujourd’hui en bonne voie pour rattraper son retard et répondre aux besoins pour les applications millimétriques. L’intérêt du Silicium étant principalement de pouvoir proposer des applications grand public, bas coût et de pouvoir intégrer les fonctions digitales et RF sur une même puce. Toutefois, les performances de cette technologie, notamment dans le domaine du non linéaire sont peu connue en gamme millimétrique. Pour pouvoir étudier ces performances, il est nécessaire d’avoir les bancs de mesures en gamme millimétrique. L’I.E.M.N. et STMicroelectronics n’étant équipés dans le domaine non linéaire que jusque 40 GHz (18 GHz pour STMicroelectronics). La problématique de cette thèse consistera donc à repousser les limites de la mesure de puissance jusqu’à 200 GHz.D’abord, un banc de mesure load-pull en bande W (75 GHz-110 GHz) sera mis en place. L’extraction du paramètre S11 en non linéaire permettra d’obtenir une très bonne précision du banc. Du fait de l’indisponibilité de tuners précis et offrant une bonne répétabilité en bande G (140 GHz-220 GHz) et des pertes importantes des sondes dans cette même bande de fréquence, l’utilisation de tuners intégrés sera envisagée, permettant ainsi de générer de forts coefficients de réflexion en sortie du dispositif. Ces tuners d’impédance devront répondre à un cahier des charge définit en terme de couverture et de linéarité. De plus, la difficulté de trouver des systèmes de mesure de puissance rapide et précis dans cette bande de fréquence nous amènera à développer un prototype de détection en utilisant une technologie III-V. Puis, l’ensemble des bancs étant mis en place, les performances des composants seront étudiées et les principales limitations physiques (thermique, ionisation,…) intervenant sur la puissance seront évaluées grâce à des mesures allant du DC jusque 200 GHz. Nous verrons que cette technologie offre une densité de puissance très intéressante et permettra ainsi de répondre à de nombreuses applications. C’est travaux de thèse sont réalisés dans le cadre d’une thèse CIFRE avec l’IEMN et STMicroelectronics. / Many applications are emerging at millimeter wave frequencies (radar, imaging, satellite or point to point communications). The ‘DotFive’ project gather industries and laboratories working in microelectronics field (STMicroelectronics, Infineon, IMEC, IHP, Dresden University,.) with the aim to product silicon devices with fMAX>500 GHz for year 2013. In this context, STMicroelectronics recently published results on SiGe HBT showing fMAX>400 GHz. The state of the art in this field is 0.5 THz (Dotfive). Thanks to these high performances, silicon technology seems to be a good challenger for millimeter wave applications. Main advantages of this technology are its ability to propose low cost production and the capability to integrate digital and radiofrequency applications on a single chip. However, non linear performances of the silicon technology have never been studied at millimeter wave frequencies. To this aim, non linear test bench are needed. Before this PhD, I.E.M.N. and STMicroelectronics were limited to 40 GHz. Thus, the goal of this thesis focus on the development of load pull test bench up to 220 GHz. First a W band (75 GHz-110 GHz) load pull test bench has been developed. The main innovation is the ability to extract non linear S11 parameter, in order to obtain an extremely high precision. Then, a G band load pull test bench has been developed with integrated impedance tuner for load impedance variation. The use of integrated impedance tuner was justified by unavailability of external tuner and the high probe losses at these frequencies. The designed integrated tuners have to respect fixed specifications for covered smith chart area and linearity. Due to the difficulty to find fast power measurement devices, we also developed a diode detector on III-V technology.These previously developed test bench allow studies on non linear behavior of CMOS and BiCMOS devices and on the mains physical effects (thermal effect, breakdown,…) which limit power performances from DC to 200 GHz. We will see that BiCMOS technology offer state of the art power density measured at 94 GHz. Finally, integration of a complete load pull test bench on silicon wafer is envisaged. This work have been done for the common laboratory I.E.M.N./STMicroelectronics.

With the increasing demand for high quality TV service, digital television (DTV) is replacing the conventional analog television. DTV tuner is one of the most critical blocks of the DTV receiver system; it down-converts the desired DTV RF channel to baseband or a low intermediate frequency with enough quality. This research is mainly focused on the analysis and realization of low-cost low-power front-ends for ATSC terrestrial DTV and DVB-H mobile DTV tuner systems. For the design of the ATSC terrestrial tuner, a novel double quadrature tuner architecture, which can not only minimize the tuner power consumption but also achieve the fully integration, has been proposed. A double quadrature down-converter has been designed and fabricated with TSMC 0.35µm CMOS technology; the measurement results verified the proposed concepts. For the mobile DTV tuner, a zero-IF architecture is used and it can achieve the DVB-H specifications with less than 200mW power consumption. In the implementation of the mobile DVB-H tuner, a novel RF variable gain amplifier (RFVGA) and a low flicker noise current-mode passive mixer have been proposed. The proposed RFVGA achieves high dynamic range and robust input impedance matching performance, which is the main design challenge for the traditional implementations. The current-mode passive mixer achieves high-gain, low noise (especially low flicker noise) and high-linearity (over 10dBm IIP3) with low power supplies; it is believed that this is a promising topology for low voltage high dynamic range mixer applications. The RFVGA has been fabricated in TSMC 0.18µm CMOS technology and the measurement results agree well with the theoretical ones.

This thesis consists of two parts. The first part includes design and implementation of an RF tuner module for DVB-T receiver applications. The RF tuner module adopts single-conversion architecture and has a variable gain range of more than 60 dB. After improving the tracking filter characteristics, the module can achieve an image rejection of 60 dB. The second part is focused on DVB-T RF specification test for the implemented RF tuner module. This test uses the instruments accepted by DVB association to perform the standard measurement procedure. The measured sensitivity of the module is about -86 dBm, which has good ability to receive DVB-T signal in practical environment.

International Telemetering Conference Proceedings / October 17-20, 1994 / Town & Country Hotel and Conference Center, San Diego, California / With the increased concerns for reducing cost and improving reliability in today's telemetry systems, many users are employing simulation and automation to guarantee reliable telemetry systems operation. This places an increased demand on the remote capabilities of the equipment used in the telemetry system. Furthermore, emphasis has been placed on the ability to decrease the space and power consumption of the telemetry system to facilitate transportability of the a single telemetry system to multiple sites. Finally, today's telemetry systems demand that all equipment provide multiple functions to provide the maximum performance for the lowest system cost.

This research aims to design a dual-conversion tuner RFIC for DVB-H applications with EDA tools. In order to have good understanding of the EDA tools used, both time-domain and frequency-domain simulation techniques are studied and discussed in this thesis. The designed tuner RFIC is implemented by a TSMC 0.35£gm SiGe BiCMOS process. The parasitic effects from PCB interconnects are also considered in this work. We use 3-D quasi-static EM simulation tool to extract the parasitic elements for PCB interconnects, and co-simulate these parasitic elements with RFICs using circuit simulation tool. The implemented tuner RFIC integrates most key components into a single chip, including the variable-gain low noise amplifier, up-converting mixer, intermediate-frequency amplifier, and down-converting mixer. Under QPSK modulation test, the designed tuner RFIC shows a wide dynamic range with good protection ratio. In addition, it has a low power consumption and thus is suitable for use in portable digital TV equipments.

This degree work deals with the design and implementation of an automatic antenna tuner for short-wave transmitters. The device works within the short-wave range in (1.5 MHz - 30 MHz) band according to the selection of the given frequency. Its principle is that the tuner has a small range of adapted impedances, but it is usually sufficient for fine tuning of most deviations in the system of antenna 50 - feeder 50 - transceiver outlet 50 . It is also equipped with memories which the settings for the individual bands or frequency segments are stored into. Then the transition from one band to another is quick, easy and, first of all, safe, which is a great advantage. In automatic mode, a SWR limit from which the tuner should start to tune can be set. Interconnection with a TRX is not necessary in a fully automatic mode, the device tunes automatically after keying if the set limit of SWR has been exceeded. The automatic tuning is very quick with this device, if the antenna being tuned is not stored in the memory the tuning lasts ca 0.5 - 6 s, if the tuner uses the memory. It could be said that the work with the tuner is without problems, it is possible to learn to control it in a short time. The tuner is small and light. The result of the whole project is a compact device controlled by the user by means of push buttons.

L’évolution des technologies silicium rend aujourd’hui possible le développement de nombreuses applications dans les domaines millimétriques tels que pour les systèmes de communication à très haut débit. Cette évolution se caractérise par une croissance des performances en fréquence des transistors disponibles dans ces technologies et nécessite la mise en place d’outils de mesure performants pour valider la modélisation et l’optimisation technologique de ces dispositifs. La caractérisation load-pull est une méthode incontournable pour modéliser le comportement en fort signal des transistors. En bande G [140-220 GHz], l’environnement de mesure classiquement disponible n’a plus les performances requises pour ce type de caractérisation compte tenu des pertes dans les accès au dispositif sous test. Ce travail de thèse a pour objectif de lever ce verrou en proposant de réaliser, en technologie BiCMOS 55 nm de STMicroelectronics, un banc load-pull entièrement intégré sur silicium afin d’être au plus près du dispositif à caractériser. Le mémoire est articulé autour de quatre chapitres. Le premier chapitre présente l’état de l’art de l’instrumentation actuellement disponible pour la caractérisation en puissance aux fréquences millimétriques et leurs limitations. Le second chapitre détaille la conception et la caractérisation des blocs constituant le banc intégré : le tuner et la source MMW de puissance. Le troisième chapitre décrit la réalisation et les performances du détecteur de puissance. Enfin, le quatrième chapitre présente le banc complet et son application à la caractérisation en bande G d’un dispositif bipolaire disponible dans la technologie BiCMOS 55 nm. / The evolution of silicon technologies now makes possible the development of many applications in the millimeter areas such as high speed communication systems. The evolution of these silicon technologies is characterized by the increase of the transistor performances with the frequency that requires the development of efficient radiofrequency measurement tools for accurate modeling of active components or the optimization of integrated circuits. In this framework, the load-pull characterization is an essential method to model the behavior of transistors in nonlinear region. In the G Band, the classical measurement environment typically available has not the required performance for this kind of characterization due to the losses in the accesses to the device under test. The aim of this thesis is to lift this lock by offering, in the STMicroelectronics BiCMOS 55 nm technology, a fully integrated load-pull characterization bench on silicon in order to be as close as possible to the device to characterize. The thesis manuscript is divided into four chapters. The first chapter presents the state of the art of the currently available instrumentation for power characterization at millimeter wave frequencies band and their limitations, which leads to the G band characterization bench specifications. The second chapter details the design and characterization of the mains blocks constituting the integrated bench: the tuner and the mmw power source. The third chapter present the design and characterization of the power detector. Finally, the fourth chapter presents the complete bench and its application with the G band load-pull characterization of a transistor bipolar device.

This thesis is composed of three parts. The first part surveys the literature on RF architecture and semiconductor process technology in the DVB-H tuner applications. The RFIC design considerations are also discussed. In the second part, the DVB-H tuner RFIC design using TSMC 0.18£gm RF CMOS technology is presented. Discussions between simulated and measured results of each circuit stage are also included. In the third part, the RFIC testing results for CW and DVB-H input signals are demonstrated. For a QPSK signal with 8MHz bandwidth and 7/8 code rate, the sensitivity of the RFIC can reach -87dBm. The adjacent channel protection ratio can meet the specification. The chip power consumption is 70.2mW, and the chip size is 1.96 mm2.

This thesis consists of two parts. Part one includes the design procedure and implementation of the building blocks for an RF tuner module used in the Digital Video Broadcasting ¡V Terrestrial ¡]DVB-T¡^system. It contains the comparison of several RF tuner architectures, frequency planning, and link-budget analysis. Measurement results for the designed tuner operating in the frequency range from 50 to 860 MHz show that the maximum power gain ranges from 49 to 57.6 dB. The entire range for gain control is over 60 dB. In the maximum gain state, the noise figure ranges form 6.8 to 11.5 dB, the output third-order interception point¡]OIP3¡^ranges from 11.7 to 13.8 dBm, and the image rejection is over 50 dB. By applying the simplified single-carrier modulation signals, the tuner can pass the DVB-T system specifications with respect to the adjacent-channel and overlapping-channel protection ratios. In part two, an RFIC design for low-noise variable-gain amplifier that can be used in the RF front end of DVB-T system is presented. It operates from 100 to 900 MHz and dissipates 59.4 mW under a 3.3-V power supply. In the maximum gain state, measurement results for this RFIC show that the noise figure is less than 4 dB, the maximum gain is more than 14 dB, and the OIP3 is about 6.8dBm. The entire gain control range is over 40 dB.

This thesis presents the theory, design, fabrication, and measurement results of novel reconfigurable impedance tuner, phase shifter, and vector modulators using the RF MEMS technology. The presented circuits are based on triple stub topology, and it is shown both theoretically and experimentally in this thesis that it is possible to control the insertion phase and amplitude of the input signal simultaneously using this topology. The presented circuits are implemented using an in-house, surface micromachining fabrication process developed at METU, namely METU RF MEMS Fabrication Process, which is implemented using six masks on quartz substrates. The RF MEMS impedance tuner is designed to operate in 6-20 GHz frequency band, and it covers the Smith Chart with 1331 impedance points. The measurement results of 729 impedance points of the fabricated impedance tuner show that a wide Smith Chart coverage is obtained in the entire band. The RF MEMS phase shifter is designed to cover 0-360 degrees range 10 degree steps at 15 GHz center frequency. The measurement results of the fabricated phase shifter show that the average phase error is 1.7 degrees, the average insertion loss is -3.1 dB, and the average return loss is -19.3 dB for the measured 21 phase states. The phase shifter can also work up to 30 GHz and 40 GHz with average insertion losses of -5 dB and -8 dB, respectively. The designed RF MEMS vector modulator operates in 22.5-27.5 GHz band, and it has 3 amplitude and 8 phase states. The measurement results of the fabricated vector modulator show that the amplitude error is 0.5 dB, the phase error is 4 degrees, and the return loss is -15 dB on average among the 24 measured states at each of 22.5, 25, and 27.5 GHz frequencies.