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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

A hierarchical approach to effective test generation for VHDL behavioral models /

Rao, Sanat R., January 1993 (has links)
Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1993. / Vita. Abstract. Includes bibliographical references (leaves 147-149). Also available via the Internet.
32

The semantics of VHDL with VAL and HOL towards practical verification tools /

Van Tassel, John P. January 1900 (has links)
Thesis (M.A.)--Wright State University, 1990. / Cover title. "June 1990." Includes bibliographical references.
33

Implementace OFDM v obvodu FPGA / OFDM implementation in FPGA

Horák, Martin January 2008 (has links)
The thesis is focused on designing OFDM modem, which should be implemented into the FPGA device. The advantages of using OFDM signals in order to provide high baud rates together with high multipath immunity has provoked a mass expansion into media systems such as DSL, DVB, Wi-Fi, WLAN, etc. . Thanks to this technology we can quarantee high modulation rates with minimal negative disturbance eects. The rst part is dedicated to characterise OFDM signals, their generation and the algorithm producing the OFDM which is implemented in DSP devices. For the purpose of using the fastest algorithm, the Fast Fourier Transform using Cooley-Tukey algorithm was shown. Before we can implement OFDM modem into the FPGA device, we have to simulate its correct function. Because there is no OFDM analyser available at our departement, its necessary to prove its correct function by simulations. Therefore a large part of this thesis is focused on simulations using Matlab and ModelSim, in order to show comparison between the theoretical, and simulated results. Between the theoretical and practical simulations there is a part which shows the brief characteristics of available FPGA devices. Detailed view is presented just for the Virtex II device, which the implementation is made for. As a suitable FPGA device, we have chosen Virtex II XC2V1000 which is available for students. In the last part the measured results were shown to prove the corect function of the modem. Programming the FPGA using VHDL language is realized in the software ISE Xilinx (distributed in Xilinx software support). All programmed scrits and data used in this thesis are included on distributed media.
34

THE PERFORMANCE EVALUATION OF VHDL-AMS SIMULATORS BY CREATING LARGE, SCALABLE VHDL-AMS MODELS

BAPAT, SACHIN VASUDEO 23 September 2002 (has links)
No description available.
35

EXPLOITING A MULTI-LEVEL MODELING TECHNIQUE WITH APPLICATION TO THE ANALYSIS OF A SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER

BHOOPATHY, MANIVANNAN January 2005 (has links)
No description available.
36

A COMPARATIVE STUDY OF COMPRESSING ALGORITHMS TO REDUCE THE OUTPUT FILE SIZE GENERATED FROM A VHDL-AMS SIMULATOR

KALLOOR, BIJOY 03 April 2006 (has links)
No description available.
37

Development of Web-Based Educational Modules for Developing VHDL Models of Digital Systems

Song, Weihong 27 August 1997 (has links)
Hardware description languages (HDLs) such as VHDL have made it possible for circuit and board designs to be done without resorting to paper, allowing computers to manage the design database and automate the translation between various representations of the system. Although VHDL modeling can provide a bonanza of benefits, VHDL models must be used effectively to reduce overall development costs. Air Force acquisition specialist for such agencies as the U.S. Air Force must be able to manage the development of VHDL models to ensure that the models delivered meet both their immediate and their future needs. In this research study, effort has been made to explain the many facets and advantages of VHDL and the use of VHDL in various stages of the acquisition process. The RASSP design concepts, such as top-down design, reuse and the model year concepts and integrated design environment, are introduced. Different abstraction levels from written specification to gate level in the design process are explained. Design techniques, such as modular design, reuse and sharing of designs, multiple abstraction level simulation and mixed data type simulation, and design trade-offs, are illustrated. The Sobel edge detection system is used as our case study to illustrate multiple abstraction levels and their use in the acquisition process. The methodology of developing an easy access, low-cost and effective VHDL education and guidance materials for Air Force acquisition and maintenance specialists is explained. The primary focus of this thesis is to develop a World Wide Web (WWW) based educational module for the acquisition process. / Master of Science
38

Digital Filter Design and Synthesis Using High-level Modeling Tools

Jackson, Brian Aliston 11 July 1999 (has links)
The purpose of this thesis is to formulate a technically sound approach to designing Infinite Impulse Response (IIR) digital filters using high-level modeling tools. High-level modeling tools provide the ability to build and simulate ideal models. Once proper validation is complete on these ideal models, the user can then migrate to lower levels of abstraction until an actual real world model is designed. High-level modeling tools are the epitome of the top-down design concept in which design first takes place with the basic functional knowledge of a system. With each level of abstraction, validation is performed. High-level modeling tools are used throughout industry and their application is continually growing especially in the DSP area where many modes of communications are expanding. High-level modeling tools and validation significantly address this complex expansion by utilizing an ideal representation of a complicated network. / Master of Science
39

IMPLEMENTATION AND PERFORMANCE OF A HIGHSPEED, VHDL-BASED, MULTI-MODE ARTM DEMODULATOR

Hill, Terrance, Geoghegan, Mark, Hutzel, Kevin 10 1900 (has links)
International Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, California / Legacy telemetry systems, although widely deployed, are being severely taxed to support the high data rate requirements of advanced aircraft and missile platforms. Increasing data rates, in conjunction with loss of spectrum have created a need to use available spectrum more efficiently. In response to this, new modulation techniques have been developed which offer more data capacity in the same operating bandwidth. Demodulation of these new waveforms is a computationally challenging task, especially at high data rates. This paper describes the design, implementation and performance of a high-speed, multi-mode demodulator for the Advanced Range Telemetry (ARTM) program which meets these challenges.
40

Development of a Flexible FPGA-Based Platform for Flight Control System Research

DeMott, Robert 08 December 2010 (has links)
This work is part of ongoing research conducted at Virginia Commonwealth University relating to unmanned aerial vehicles. The primary objective of this thesis was to develop a flexible, high-performance autopilot platform in order to facilitate research on advanced flight control algorithms. A dual FPGA-based system architecture utilizing a stacked, multi-board design was created to meet this goal. Processing tasks were split between the two FPGA devices, allowing for improved system timing and increased throughput. A combination of analog and digital filtering techniques were employed in the new system, resulting in enhanced sensor accuracy and precision compared to the previous generation autopilot system. Several important improvements to the safety and reliability of the overall system were also achieved.

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