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Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this wide-bandgap is the high critical electric field of Ga2O3, which is estimated to be from 5 MV/cm to 9 MV/cm. This allows a higher Baliga’s figure of merit (BFOM), i.e., unipolar Ga2O3 devices potentially possess a smaller specific on-resistance (Ron,sp) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). This prospect makes Ga2O3 devices promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. It is also a building block for many advanced power transistors. Hence, the study of Ga2O3 SBDs is expected to pave the way for developing a series of Ga2O3 power devices. In this work, a vertical β-Ga2O3 SBD with a novel edge termination, which is the small-angle beveled field plate (SABFP), is fabricated on thinned Ga2O3 substrates. This SABFP structure decreases the peak electric field (Epeak) at the triple point when the Ga2O3 SBD is reverse biased, resulting in a BV of 1.1 kV and an Epeak of 3.5 MV/cm. This device demonstrates a BFOM of 0.6 GW/cm2, which is among the highest in β-Ga2O3 power devices and is comparable to the state-of-the-art vertical GaN SBDs. The high-temperature characteristics of Ga2O3 SBDs with a 45o beveled angle sidewall edge termination are studied at temperatures up to 600 K. As compared to the state-of-the-art SiC and GaN SBDs with a similar blocking voltage, the vertical Ga2O3 SBDs are capable of operating at higher temperatures and show a smaller leakage current increase with temperature. The leakage current mechanisms were also revealed at various temperatures and reverse biases. A new fabrication method of a dielectric field plate and Ga2O3 mesa of a medium angle (10o~30o) is achieved by controlling the adhesion between the photoresist (PR) and the dielectric surface. As compared to the small-angle termination, this medium-angle edge termination can allow a superior yield and uniformity in device fabrication, at the same time maintaining the major functionalities of beveled edge termination. Good surface morphology of the field plates and Ga2O3 mesa of the medium angle 10o~30o sidewall angle is verified by atomic force microscopy. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the solder joint. The metal finish on the anode and cathode has been optimized for silver sintering. Large-area, packaged Ga2O3 SBDs with an anode size of 3×3 mm2 are prototyped. They show a forward current of over 5 A, a current on/off ratio of ~109, and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device. / M.S. / Power electronics is the processing of electric energy using solid-state electronics. It is ubiquitously used in consumer electronics, data centers, electric vehicles, electricity grids, and renewable energy systems. Advanced power device technologies are paramount to improving the performance of power electronic systems. Power device design centers on the concurrent realization of low on-resistance (RON), high breakdown voltage (BV), and small turn-on/turn-off power losses. The performance of power devices hinges on semiconductor material properties. Over the last several years, power devices based on wide-bandgap semiconductors like Silicon Carbide (SiC) and Gallium Nitride (GaN) have enabled tremendous performance advancements in power electronic systems. Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), SiC, and GaN. As a benefit of this wide bandgap, the theoretical performance of Ga2O3 devices is superior to the Si, SiC, and GaN counterparts. Hence, Ga2O3 devices are regarded as promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows a small forward voltage and a fast switching speed; thus, it is extensively utilized in power electronics systems. It is also a building block for many advanced power transistors. First, a vertical β-Ga2O3 SBD with a novel edge termination is fabricated. This edge termination structure reduces the peak electric field (Epeak) in the device and enhances the BV. The fabricated device shows one of the highest figure of merits in β-Ga2O3 power devices. Next, the high-temperature characteristics of the fabricated Ga2O3 SBDs are studied at temperatures up to 600 K. The leakage current mechanisms were also revealed at various temperatures and reverse biases. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the conventional solder joint. The packaged Ga2O3 SBDs show a forward current of over 5 A and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device.

Surge-energy robustness is essential for power devices in many applications such as automotive powertrains and electricity grids. While Si and SiC MOSFETs can dissipate surge energy via avalanche, the GaN high-electron-mobility transistor (HEMT) has no avalanche capability and withstands surge energy by its overvoltage capability. However, a comprehensive study into the surge-energy robustness of the cascode GaN HEMT, a composite device made of a GaN HEMT and a Si metal-oxide-semiconductor field-effect-transistor (MOSFET), is still lacking. This work fills this gap by investigating the failure and degradation of 650-V-rated cascode GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests. The cascode was found to withstand surge energy by the overvoltage capability of the GaN HEMT, accompanied by an avalanche in the Si MOSFET. In single-event UIS tests, the cascode failed in the GaN HEMT at a peak overvoltage of 1.4~1.7 kV, which is statistically lower than the device's static breakdown voltage (1.8~2.2 kV). In repetitive UIS tests, the device failure boundary was found to be frequency-dependent. At 100 kHz, the failure boundary (~1.3 kV) was even lower than the single-event UIS boundary. After 1 million cycles of 1.25-kV UIS stresses, devices showed significant but recoverable parametric shifts. Physics-based device simulation and modeling were then performed to understand the circuit test results. The electron trapping in the buffer layer of the GaN HEMT can explain all the above failure and degradation behaviors in the GaN HEMT and the resulted change in its dynamic breakdown voltage. Moreover, the GaN buffer trapping is believed to be assisted by the Si MOSFET avalanche. An analytical model was also developed to extract the charges and losses produced in the Si avalanche in a UIS cycle. These results provide new insights into the surge-energy and overvoltage robustness of cascode GaN HEMTs. / M.S. / Power conversion technologies are now inseparable in industrial and commercial applications with widespread solar panels, laptops, data centers, and electric vehicles. Power devices are the critical components of power conversion systems. Since the introduction of Si power metal-oxide-semiconductor field-effect-transistor (MOSFET) in the mid-1970s, it has become the go-to device that enables efficient and reliable power conversion. After decades of practice on Si MOSFET, the device performance has reached the theoretical limit of the Si material. The recent introduction of wide-bandgap (WBG) power transistors, represented by silicon carbide (SiC) and gallium nitride (GaN) devices with superior figures of merits, opens the door for faster and more efficient power systems. To exploit the benefits of WBG devices, researchers need to evaluate the reliability and robustness of these devices comprehensively. The work presented here provides a study on the robustness of one mainstream GaN power transistor – the cascode GaN high-electron-mobility transistor (HEMT). This robustness test replicates the surge events in power electronics systems and exams their impact on power devices. Over the years, people have thoroughly investigated the surge-energy robustness of Si MOSFETs and concluded that Si MOSFETs are very robust against these surge events thanks to the avalanche mechanism. However, GaN HEMTs lack p-n junction structures between the two major electrodes, leading to the lack of avalanche ability. Instead, GaN HEMTs rely on the overvoltage capability to sustain the surge energy. For the first time, this work evaluates the surge-energy and overvoltage ruggedness of cascode GaN HEMTs, a major player in the GaN power device market. By analyzing the device failure mechanism and degradation behaviors, this research work provides insight into the weakness of these devices for both device designers and application engineers.

Wide-bandgap gallium nitride (GaN) high electron mobility transistors (HEMTs) are gaining increased adoption in applications like mobile electronics and data centers. Benefitting from the high channel mobility and the high breakdown field of GaN, GaN power HEMTs enable low specific on-resistance and small capacitance and thus become attractive for high-frequency applications. In addition, most commercial GaN power HEMTs are fabricated on Si substrates up to 8 inches, allowing for a remarkable cost advantage. However, a by-product of the low-cost GaN-on-Si wafer (and conductive Si substrate) is the high voltage drop and high electric field (E-field) in the GaN buffer layers and transition layers sandwiched between the GaN channel and Si substrate. To boost the vertical blocking capability and minimize the leakage current, the GaN buffer layer is usually doped with carbon or iron, which can introduce complex carrier traps. This can further lead to the dynamic shifts of various parameters in GaN-on-Si HEMTs, which can cause their stability and robustness issues in practical circuit operations. This dissertation work studies the robustness and stability of GaN power HEMTs in dynamic power switching. The structures of most GaN power devices are fundamentally different from Si or Silicon Carbide (SiC) power devices, leading to numerous open questions on GaN power device robustness and stability. Simple equipment-level static characterization may not reflect the real device characteristics in circuit-level operation. Based on the relevance between the stress condition and the device's safe operating area (SOA), this dissertation is divided into two parts. In each part, two representative GaN power devices, the standalone GaN HEMT, and the GaN-Si cascode HEMT, are studied. The dissertation's first half discusses the GaN HEMT behavior outside of SOA, with a focus on the robustness of GaN HEMTs in overvoltage power switching. This focus is motivated by the lack of avalanche capability of GaN HEMTs, which is a unique device physics distinct from SiC/Si power transistors. Instead of withstanding the surge energy through avalanching, GaN HEMTs rely on their high breakdown voltage margin to withstand the surge energy, which can trigger new degradation and failure mechanisms. Therefore, investigating the GaN HEMTs' robustness in overvoltage switching is of great interest. The robustness study begins with a standalone depletion-mode (D-mode) MIS (Metal-Insulator-Semiconductor) HEMT in an overvoltage hard-switching. The device is found to show a decreased threshold voltage and increased saturation current after stress. These parametric shifts increase as switching cycles increase but reach a saturation point before one million cycles. The root cause is believed to be the impact-ionization-generated holes trapped underneath the insulated gate. This is verified by the physics-based TCAD (Technology Computer-Aided Design) simulation. After the stress, MIS-HEMT cannot fully recover naturally. Applying at positive gate-to-source bias (VGS) is found to be able to accelerate the threshold voltage recovery but not the saturation current recovery, while a 50-V substrate bias is shown to fully recover both parameters. These findings provide new insight into the hole trapping/de-trapping dynamics and the benefits of substrate voltage control in GaN MIS-HEMTs. Then, a cascode GaN HEMT, which contains a D-mode GaN MIS-HEMT and an enhancement-mode (E-mode) Si MOSFET, is studied similarly in overvoltage stress produced by an inductive switching circuit. Parametric shifts are found in cascode GaN HEMTs, including the unstable breakdown voltage and increased on-resistance. The crosstalk between Si MOSFET and GaN HEMT is believed to account for these parametric shifts. A decapsulated device is developed based on the commercial part to monitor the Si MOSFET behavior. Si MOSFET is found to avalanche during the overvoltage switching. The parametric shifts are believed to be due to the avalanche-generated electrons, which are injected into the GaN HEMTs and trapped in the GaN buffer layer. These electron traps alter the E-field distribution of the GaN HEMT and induce parametric shifts. The second half of the dissertation focuses on the GaN HEMT's stability inside the SOA, with a focus on the non-ideal power loss generated in high-frequency switching. The output capacitance (COSS) loss has recently been found to be the dominant loss in soft switching, which is the loss associated with GaN HEMT's COSS when it is charged and discharged. This process should be lossless for an ideal capacitor, but GaN HEMT experiences a hysteresis COSS loss during each charging-discharging cycle due to the COSS instability in dynamic power switching. The COSS loss study starts with an accurate and easy-to-implement test platform, which is proven to have good robustness and repeatability. The measured COSS loss of different types of GaN HEMTs is modeled, followed by the investigation of the COSS loss origin. TCAD simulation reveals the fundamental role of trappings in the cause of COSS loss in standalone GaN HEMTs. For the cascode GaN HEMT, two additional loss mechanisms are involved as compared to the standalone GaN HEMTs: Si avalanche energy loss and GaN early turn-on loss. This makes cascode GaN HEMT experiences much higher COSS loss than standalone GaN HEMTs. The COSS loss of cascode GaN HEMT is quantitively analyzed, and a mitigation strategy is proposed for suppressing the COSS loss of cascode GaN HEMTs. Then, a circuit-level method is proposed to reduce the COSS loss of standalone GaN HEMT by dynamically tuning the substrate bias, which is verified with a standalone D-mode GaN HEMT. The Si substrate bias can follow the drain voltage in a certain ratio by tuning the capacitance ratio between the drain, substrate, and source. It is found that with a substrate bias of 1/4 to 1/2 of the drain voltage, the COSS loss can be reduced by 86%. This result removes a critical roadblock for deploying GaN HEMTs in high-frequency, soft-switching applications. Finally, the COSS loss of similarly rated Si and SiC power transistors is characterized using the developed test platform. The capability of the setup is further broadened to testing power diodes. Some similarities and distinctions are found in the COSS loss behavior between GaN HEMTs and Si/SiC devices. Also, an EDISS validation process is provided for the UIS-based method in an operating class-E converter, verifying the effectiveness and accuracy of the proposed method. This provides important references for selecting the optimal power devices for high-frequency applications. / Doctor of Philosophy / Gallium Nitride (GaN) high electron mobility transistors (HEMTs) are reshaping the power electronics field. They have become increasingly popular in many applications like smartphones, electric vehicles, and data centers. They offer smaller on-resistance and can handle higher voltages compared to traditional silicon-based devices. GaN transistors are built on large-diameter silicon substrates, making them cost-effective but can lead to unique stability and robustness issues. This dissertation investigates the stability and robustness of GaN power HEMTs in high-voltage and high-frequency power switching. Based on the relevance of the studied stress to the device safe-operating-area, the discussion is divided into two parts: The first part looks at how GaN transistors handle situations where they are pushed beyond their safe operating limits, such as during power surges and overvoltage events. These transistors are found to experience changes in their electrical properties after being stressed, which might affect their performance across their lifetime. In addition to unveiling the physics and evolution of such parametric shifts, this work also discovers ways to recover the device parameters and maintain the device functionality. The second part of the research focuses on the stability and non-ideal power loss of GaN transistors within their safe operating area. The high-frequency soft-switching application is being investigated, as it has become a common trend for future power electronics. The study reveals that GaN transistors can produce additional power loss due to the intrinsic electrical instabilities. In addition to unveiling the key impact factors and physics of this loss, this work also develops device designs to suppress this non-ideal power loss significantly, improving the device efficiency in high-frequency applications. Overall, this work provides valuable insights into improving the robustness and efficiency of GaN transistors, which provide guidelines and insights for GaN designers and users to achieve optimal device and system performance.

Due to the concerns regarding increasing fuel cost and air pollution, plug-in electric vehicles (PEVs) are drawing more and more attention. PEVs have a rechargeable battery that can be restored to full charge by plugging to an external electrical source. However, the commercialization of the PEV is impeded by the demands of a lightweight, compact, yet efficient on-board charger system. Since the state-of-the-art Level 2 on-board charger products are largely silicon (Si)-based, they operate at less than 100 kHz switching frequency, resulting in a low power density at 3-12 W/in3, as well as an efficiency no more than 92 - 94% Advanced power semiconductor devices have consistently proven to be a major force in pushing the progressive development of power conversion technology. The emerging wide bandgap (WBG) material based power semiconductor devices are considered as game changing devices which can exceed the limit of Si and be used to pursue groundbreaking high frequency, high efficiency, and high power density power conversion. Using wide bandgap devices, a novel two-stage on-board charger system architecture is proposed at first. The first stage, employing an interleaved bridgeless totem-pole AC/DC in critical conduction mode (CRM) to realize zero voltage switching (ZVS), is operated at over 300 kHz. A bi-directional CLLC resonant converter operating at 500 kHz is chosen for the second stage. Instead of using the conventional fixed 400 V DC-link voltage, a variable DC-link voltage concept is proposed to improve the efficiency within the entire battery voltage range. 1.2 kV SiC devices are adopted for the AC/DC stage and the primary side of DC/DC stage while 650 V GaN devices are used for the secondary side of the DC/DC stage. In addition, a two-stage combined control strategy is adopted to eliminate the double line frequency ripple generated by the AC/DC stage. The much higher operating frequency of wide bandgap devices also provides us the opportunity to use PCB winding based magnetics due to the reduced voltage-second. Compared with conventional litz-wire based transformer. The manufacture process is greatly simplified and the parasitic is much easier to control. In addition, the resonant inductors are integrated into the PCB transformer so that the total number of magnetic components is reduced. A transformer loss model based on finite element analysis is built and used to optimize the transformer loss and volume to get the best performance under high frequency operation. Due to the larger inter-winding capacitor of PCB winding transformer, common mode noise becomes a severe issue. A symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed. By utilizing the two transformer cells, the common mode current is cancelled within the transformers and the total system common mode noise can be suppressed. In order to charge the battery faster, the single-phase on-board charger concept is extended to a higher power level. By using the three-phase interleaved CLLC resonant converter, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding transformer in single phase is also extended to the three phase. Due to the interleaving between each phase, further integration is achieved and the transformer size is further reduced. / PHD / Plug-in electric vehicles (PEVs) are drawing more and more attention due to the advantages of energy saving, low CO₂ emission and cost effective in the long run. The power source of PEVs is a high voltage DC rechargeable battery that can be restored to full charge by plugging to an external electrical source, during which the battery charger plays an essential role by converting the grid AC voltage to the required battery DC voltage. Silicon based power semiconductor devices have been dominating the market over the past several decades and achieved numerous outstanding performances. As they almost reach their theatrical limit, the progress to purse the high-efficiency, high-density and high-reliability power conversion also slows down. On this avenue, the emerging wide bandgap (WBG) material based power semiconductor devices are envisioned as the game changer: they can help increase the switching frequency by a factor of ten compared with their silicon counterparts while keeping the same efficiency, resulting in a small size, lightweight yet high efficiency power converter. With WBG devices, magnetics benefit the most from the high switching frequency. Higher switching speed means less energy to store during one switching cycle. Consequently, the size of the magnetic component can be greatly reduced. In addition, the reduced number of turns provides the opportunity to adopt print circuit board as windings. Compared with the conventional litz-wire based magnetics, planar magnetics not only can effectively reduce the converter size, but also offer improved reliability through automated manufacturing process with repeatable parasitics. This dissertation is dedicated to address the key high-frequency oriented challenges of adopting WBG devices (including both SiC and GaN) and integrated PCB winding magnetics in the battery charger applications. First, a novel two-stage on-board charger system architecture is proposed. The first stage employs an interleaved bridgeless totem-pole AC/DC with zero voltage switching, and a bi-directional CLLC resonant converter is chosen for the second stage. Second, a PCB winding based transformer with integrated resonant inductors is designed, so that the total number of magnetic components is reduced and the manufacturability is greatly improved. A transformer loss model based on finite element analysis is built and employed to optimize the transformer loss and volume to get the best performance under high frequency operations. In addition, a symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed to solve the common noise issue brought by the large parasitic capacitance in PCB winding magnetics. By utilizing the two transformer cells, the common mode current is cancelled within the transformers, and the total system common mode noise can be suppressed. Finally, the single-phase on-board charger concept is extended to a higher power level to charge the battery faster. By utilizing the three-phase interleaved CLLC resonant converter as DC/DC stage, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding magnetic in single phase is also extended to the three phase. Due to the interleaving between the three phase, further integration is achieved and the transformer size is further reduced.

Rapidly-increasing medium-voltage power electronics applications in emerging industry systems, including electrical ships, more electric aircraft, and microgrids, have emphasized the critical need for highly energy-efficient, reliable, and fast switching devices. As a result, Wide-Bandgap (WBG) devices have gained considerable interest over conventional silicon-based switches in recent years. For example, emerging WBG devices have unlocked new dimensions for modern motor drive systems with increased efficiency, switching frequency, and superior power density. Commercially-developed WBG devices such as Silicon Carbide (SiC) and Gallium Nitride (GaN) offer promising opportunities to meet those pressing requirements. However, the fast switching operation of WBG devices may cause substantially increased EMI emissions in medium-voltage applications, which can decrease the overall system’s performance or merits of power converters. This will be particularly an issue in a system where electric ground is unavailable, such as an electric ship, as a large Electro-Magnetic Interference current will be circulating within the system. The EMI in the WBG switch module will be emitted up to 500 MHz. This is the near radio-frequency (RF) band whose impact had not been clearly understood or properly analyzed in the power electronics field until recently. With new and critical challenges in recent years, to reliably adopt WBG devices in emerging power systems, there has been significant effort to improve electromagnetic compatibility (EMC) with new EMI mitigation techniques that comply with existing standards, including International Special Committee on Radio Interference (CISPR), Federal Communications Commission (FCC), Department of Defense (DOD), International Electro-Technical Commission (IEC), etc. This research investigates the common-mode EMI in networked power electronics-enabled power systems. Common-mode EMI phase information is a vital degree of freedom in EMI study that has not been considered in the state of the art. The EMI phase information reduces EMI without implementing any active or passive filter circuit. An effective and less complex method is introduced to reduce EMI in power electronics network. The work includes developing hybrid filter with passive and virtual filter. Including virtual filter reduces the passive common mode choke weight and volume significantly. Finally, a simplified switching node capacitance characterization technique for packaged WBG SiC has been introduced.

Power semiconductor device, as a significant contributor to power electronics industry, plays an indispensable role in energy conversion applications including electric vehicles, data centers, consumer electronics, power grids, etc. The evolution of power semiconductor materials has progressed from traditional silicon (Si) to wide-bandgap materials including silicon carbide (SiC) and gallium nitride (GaN). Benefitting from the wide bandgap, high electron mobility and good thermal conductivity of GaN, GaN-based power devices can achieve fast switching speed, high breakdown voltage, and small on-resistance. They have been deployed in numerous power electronics applications, outperforming the Si and SiC counterparts. Nevertheless, despite their inherent advantages, the commercialization of GaN devices, particularly high-electron-mobility transistors (HEMTs), has predominantly been confined to the low-voltage domain of typically below 650 volts. This limitation blocks GaN HEMTs for medium- and high-voltage applications such as electric vehicles, renewable energy processing, and power grids, which have a total market size over USD$15 billion. The challenge for GaN HEMTs to reach high-voltage applications arises primarily from the highly non-uniform electric field (E-field) distribution within the device structure, predisposing the device to premature breakdown and limiting its operational voltage range. Consequently, the quest for higher voltage capabilities in GaN HEMTs requires the fundamental understanding and effective mitigation of this non-uniform E-field distribution. In this work, the p-type GaN-based Reduced Surface Field (RESURF) structure is proposed to balance the net charge in the two-dimensional-electron gas (2DEG) channel in GaN HEMT. This design enables a uniform distribution of E-field, enabling the voltage upscaling in GaN HEMT up to 10,000 V (i.e., 10 kV), which is the milestone voltage class in unipolar power devices for high-power applications. The first part of this thesis introduces the history, background and mechanism of power semiconductor devices and provides solid reasons for GaN as a competitive participant in power electronics industry. It covers a basic introduction about GaN HEMT devices and their commercialization status and states the challenges GaN HEMTs are facing when dealing with mass production. An innovative RESURF structure is introduced to overcome the existing trade-off between on-resistance and breakdown voltage, and to achieve superior overall performance that would be beneficial for GaN HEMT to upscale the voltage classes. Secondly, the development of a 10 kV unidirectional GaN HEMTs is discussed in detail. An optimized fabrication process flow, including etching, metal deposition, contact formation and dielectric passivation, is established. The RESURF structure is formed through a two-step chlorine-based etching process, with an innovative introduction of sulfur hexafluoride (SF6) that enables a self-termination etch stop onto the AlGaN surface without damage to the 2DEG channel beneath. A controlled slow etch recipe has been developed as well, aiming for large-scale manufacturing with improved yields. A detailed analysis of the on-state and off-state I-V characterization of devices with various RESURF thickness and length provides an insight into the device breakdown mechanism, which has been verified with physics-based technology computer-aided design (TCAD) simulation. The third part of this work demonstrates a 3.3-kV monolithic bidirectional switch (MBDS), which a novel device concept that can significantly simplify the circuit design in alternative current (AC) power conversion. A symmetrical p-GaN junction termination extension (JTE) design is proposed for electric field management, and the lateral conduction of this GaN-based MBDS enables a state-of-the-art high-voltage bidirectional switch with low on-resistance, achieving considerable performance advantage compared to the conventional bidirectional switch implemented by discrete devices. In summary, this research work covers the design, fabrication, characterization, simulation, and breakdown mechanism analysis of GaN-based unidirectional and bidirectional transistors for multi-kilovolt power conversion applications. The extended p-GaN configuration (RESURF for unidirectional devices and JTE for bidirectional devices) offers a spatially-distributed E-field management, enhancing the breakdown voltage scaling capability of GaN HEMTs to exploit the full material advantages of GaN. / Master of Science / Power semiconductor device, as a significant contributor to power electronics industry, plays an indispensable role in energy conversion applications including electric vehicles, data centers, consumer electronics, power grids. The evolution of power semiconductor materials has progressed from traditional silicon (Si) to wide-bandgap materials including silicon carbide (SiC) and gallium nitride (GaN). Benefitting from the wide bandgap, high electron mobility, and good thermal conductivity of GaN, GaN-based power devices can achieve fast switching speed, high breakdown voltage and small on-resistance. They have been deployed in numerous power electronics applications, outperforming the Si and SiC counterparts. Nevertheless, despite their inherent advantages, the commercialization of GaN devices, particularly high-electron-mobility transistors (HEMTs), has predominantly been confined to the low-voltage domain of typically below 650 volts. This limitation prevents GaN HEMTs from the entry into several critical markets such as renewable energy processing and power grids. In this work, an innovative Reduced Surface Field (RESURF) structure is proposed to enable a uniform distribution of electric field inside the device structure, which would be particularly advantageous for voltage upscaling in GaN HEMTs. This device design enables the demonstration of high-voltage GaN HEMTs up to 10,000 V, the milestone volage class for power devices in medium- and high-voltage applications. The first part of this thesis introduces the history, background, and physics of power semiconductor devices and provides solid reason for GaN as a competitive participant in power electronics industry. Secondly, the development of a 10-kV unidirectional GaN HEMTs is discussed in detail. An optimized fabrication process flow, including etching, metal deposition, contact formation and dielectric passivation, is provided. The breakdown mechanism is also unveiled, which will be verified with physics-based device simulations in future works. The third part of this work demonstrates a 3.3-kV monolithic bidirectional switch (MBDS), a novel device concept for alternative current (AC) power conversion. A symmetrical p-GaN junction termination extension (JTE) design is proposed for electric field management, achieving the highest voltage reported among the MBDS devices. This device can facilitate the development of new circuit topologies in AC power conversion. In summary, this research work covers the design, fabrication, characterization, simulation, and breakdown mechanism analysis of GaN-based unidirectional and bidirectional transistors, achieving an unprecedented breakdown voltage upscaling capability in GaN HEMTs. The p-GaN configuration (RESURF for unidirectional devices and JTE for bidirectional devices) offers a spatially-distributed electric field management, enhancing the breakdown voltage scaling capability of GaN HEMTs to exploit the full material advantages of GaN.

A mesure que les demandes dans le domaine de l'électronique de puissance tendent vers des conditions de plus en plus extrêmes (forte densité de puissance, haute fréquence, haute température,…), l'évolution des systèmes de traitement de l'énergie électrique se heurte aux limites physiques du silicium. Une nouvelle approche basée sur l'utilisation des matériaux semi-conducteurs grand gap permettra de lever ces limites. Parmi ces matériaux, le diamant possède les propriétés les plus intéressantes pour l'électronique de puissance: champ de rupture et conductivité thermique exceptionnels, grandes mobilités des porteurs électriques, possibilité de fonctionnement à haute température… Les récents progrès dans la synthèse du diamant par des méthodes de dépôt en phase vapeur (CVD) permettent d'obtenir des substrats de caractéristiques cristallographiques compatibles avec l'exploitation de ces propriétés en électronique de puissance. Cependant, l'utilisation du diamant en tant que matériau électronique reste toutefois délicate à ce jour du fait de la grande difficulté de trouver des dopants convenables (en particulier les donneurs) dans le diamant. En outre, certaines propriétés du diamant telles que sa dureté extrême et son inertie chimique, faisant de lui un matériau unique, posent aussi des difficultés dans son utilisation technologique. L'objectif de ces travaux de thèse a été dans un premier temps d'évaluer les bénéfices que pourrait apporter le diamant en électronique de puissance ainsi que l'état de l'art de sa synthèse par dépôt en phase vapeur. Ensuite, différentes étapes technologiques nécessaires à la fabrication de composants sur diamant ont été étudiées: Gravure RIE, dépôt de contacts électriques. Enfin, ces travaux ont été illustrés par la réalisation et la caractérisation de diodes Schottky, dispositifs élémentaires de l'électronique de puissance. Les résultats obtenus permettent d'établir un bilan des verrous scientifiques et technologiques qu'il reste à relever pour une exploitation industrielle de la filière diamant. / As applications in the field of power electronics tend toward more extreme conditions (high power density, high frequency, high temperature ...), evolution of electric power treatment systems comes up against physical limits of silicon, the main semiconductor material used in electronic industry for over 50 years. A new approach based on the use of wide bandgap semiconductor materials will permit to overcome those limits. Among these materials, diamond is a very attractive material for power electronics switch devices due to its exceptional properties: high electric breakdown field, high carriers mobilities, exceptional thermal conductivity, high temperature operating possibility... However, the use of diamond as an electronic material is still very problematic due to the difficulty in the synthesis of high electronic grade CVD diamond and to find suitable dopants (in particular donors) in diamond. Besides, some of the unique properties of diamond, such as its extreme hardness and chemical inertness that make it an attractive material also cause difficulties in its application. Nevertheless, recent progress in the field of chemical vapor deposition (CVD) synthesis of diamond allow the study of the technological steps (RIE etching, ohmic and Schottky contacts, passivation,...) necessary for future diamond power devices processing. This is the aim of this thesis. In a first section, the uniqueness of diamond, the promise it bears as a potential material for specific electronic devices and the difficulties related to its application were reviewed. Then, the different technological steps required for power switching devices processing were studied: RIE etching, Ohmic and Schottky contacts. Finally, these works were illustrated by carrying out and electrical characterizations of Schottky Barrier Diodes. The achieved results allow us to make a summary of scientific and technological locks that remain for an industrial exploitation of diamond in power electronic switch devices field.

abstract: Wide bandgap (WBG) semiconductors GaN (3.4 eV), Ga2O3 (4.8 eV) and AlN (6.2 eV), have gained considerable interests for energy-efficient optoelectronic and electronic applications in solid-state lighting, photovoltaics, power conversion, and so on. They can offer unique device performance compared with traditional semiconductors such as Si. Efficient GaN based light-emitting diodes (LEDs) have increasingly displaced incandescent and fluorescent bulbs as the new major light sources for lighting and display. In addition, due to their large bandgap and high critical electrical field, WBG semiconductors are also ideal candidates for efficient power conversion. In this dissertation, two types of devices are demonstrated: optoelectronic and electronic devices. Commercial polar c-plane LEDs suffer from reduced efficiency with increasing current densities, knowns as “efficiency droop”, while nonpolar/semipolar LEDs exhibit a very low efficiency droop. A modified ABC model with weak phase space filling effects is proposed to explain the low droop performance, providing insights for designing droop-free LEDs. The other emerging optoelectronics is nonpolar/semipolar III-nitride intersubband transition (ISBT) based photodetectors in terahertz and far infrared regime due to the large optical phonon energy and band offset, and the potential of room-temperature operation. ISBT properties are systematically studied for devices with different structures parameters. In terms of electronic devices, vertical GaN p-n diodes and Schottky barrier diodes (SBDs) with high breakdown voltages are homoepitaxially grown on GaN bulk substrates with much reduced defect densities and improved device performance. The advantages of the vertical structure over the lateral structure are multifold: smaller chip area, larger current, less sensitivity to surface states, better scalability, and smaller current dispersion. Three methods are proposed to boost the device performances: thick buffer layer design, hydrogen-plasma based edge termination technique, and multiple drift layer design. In addition, newly emerged Ga2O3 and AlN power electronics may outperform GaN devices. Because of the highly anisotropic crystal structure of Ga2O3, anisotropic electrical properties have been observed in Ga2O3 electronics. The first 1-kV-class AlN SBDs are demonstrated on cost-effective sapphire substrates. Several future topics are also proposed including selective-area doping in GaN power devices, vertical AlN power devices, and (Al,Ga,In)2O3 materials and devices. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2019

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