The trend towards more and all-electric apparatuses and more electrification will lead to higher electrical demand. Increases in electrical power demand can be provided by either higher currents or higher voltages. Due to "weight" and "voltage" drop, a raise in the current is not preferred; so, "higher voltages" are being considered. Another trend is to reduce the size and weight of apparatuses. Combined, these two trends result in the high voltage, high power density concept. It is expected that by 2030, 80% of all electric power will flow through "power electronics systems". In regards to the high voltage, high power density concept described above, "wide bandgap (WBG) power modules" made from materials such as "SiC and GaN (and, soon, Ga2O3 and diamond)", which can endure "higher voltages" and "currents" rather than "Si-based modules", are considered to be the most promising solution to reducing the size and weight of "power conversion systems". In addition to the trend towards higher "blocking voltage", volume reduction has been targeted for WBG devices. The blocking voltage is the breakdown voltage capability of the device, and volume reduction translates into power density increase. This leads to extremely high electric field stress, E, of extremely nonuniform type within the module, leading to a higher possibility of "partial discharge (PD)" and, in turn, insulation degradation and, eventually, breakdown of the module. Unless the discussed high E issue is satisfactorily addressed and solved, realizing next-generation high power density WBG power modules that can properly operate will not be possible. Contributions and innovations of this Ph.D. work are as follows. i) Novel electric field grading techniques including (a) various geometrical techniques, (b) applying "nonlinear field-dependent conductivity (FDC) materials" to high E regions, and (c) combination of (a) and (b), are developed; ii) A criterion for the electric stress intensity based upon accurate dimensions of a power device package and its "PD measurement" is presented; iii) Guidelines for the electrical insulation design of next-generation high voltage (up to 30 kV), high power density "WBG power modules" as both the "one-minute insulation" and PD tests according to the standard IEC 61287-1 are introduced; iv) Influence of temperature up to 250°C and frequency up to 1 MHz on E distribution and electric field grading methods mentioned in i) is studied; and v) A coupled thermal and electrical (electrothermal) model is developed to obtain thermal distribution within the module precisely. All models and simulations are developed and carried out in COMSOL Multiphysics. / Doctor of Philosophy / In power engineering, power conversion term means converting electric energy from one form to another such as converting between AC and DC, changing the magnitude or frequency of AC or DC voltage or current, or some combination of these. The main components of a power electronic conversion system are power semiconductor devices acted as switches. A power module provides the physical containment and package for several power semiconductor devices. There is a trend towards the manufacturing of electrification apparatuses with higher power density, which means handling higher power per unit volume, leading to less weight and size of apparatuses for a given power. This is the case for power modules as well. Conventional "silicon (Si)-based semiconductor technology" cannot handle the power levels and switching frequencies required by "next-generation" utility applications. In this regard, "wide bandgap (WBG) semiconductor materials", such as "silicon carbide (SiC)"," gallium nitride (GaN)", and, soon, "gallium oxide" and "diamond" are capable of higher switching frequencies and higher voltages, while providing for lower switching losses, better thermal conductivities, and the ability to withstand higher operating temperatures. Regarding the high power density concept mentioned above, the challenge here, now and in the future, is to design compact WBG-based modules. To this end, the extremely nonuniform high electric field stress within the power module caused by the aforementioned trend and emerging WBG semiconductor switches should be graded and mitigated to prevent partial discharges that can eventually lead to breakdown of the module. In this Ph.D. work, new electric field grading methods including various geometrical techniques combined with applying nonlinear field-dependent conductivity (FDC) materials to high field regions are introduced and developed through simulation results obtained from the models developed in this thesis.

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Advances in wide-bandgap semiconductor devices have increased the allowable operating temperature of power electronic systems. High-temperature devices can benefit applications such as renewable energy, electric vehicles, and space-based power electronics that currently require bulky cooling systems for silicon power devices. Cooling systems can typically be reduced in size or removed by adopting wide-bandgap semiconductor devices, such as silicon carbide. However, to do this, semiconductor device packaging with high reliability at high temperatures is necessary. Transient liquid phase (TLP) die-attach has shown in literature to be a promising bonding technique for this packaging need. In this work TLP has been comprehensively investigated and characterized to assess its viability for high-temperature power electronics applications. The reliability and durability of TLP die-attach was extensively investigated utilizing electrical resistivity measurement as an indicator of material diffusion in gold-indium TLP samples. Criteria of ensuring diffusive stability were also developed. Samples were fabricated by material deposition on glass substrates with variant Au–In compositions but identical barrier layers. They were stressed with thermal cycling to simulate their operating conditions then characterized and compared. Excess indium content in the die-attach was shown to have poor reliability due to material diffusion through barrier layers while samples containing suitable indium content proved reliable throughout the thermal cycling process. This was confirmed by electrical resistivity measurement, EDS, FIB, and SEM characterization. Thermal and mechanical characterization of TLP die-attached samples was also performed to gain a newfound understanding of the relationship between TLP design parameters and die-attach properties. Samples with a SiC diode chip TLP bonded to a copper metalized silicon nitride iv substrate were made using several different values of fabrication parameters such as gold and indium thickness, Au–In ratio, and bonding pressure. The TLP bonds were then characterized for die-attach voiding, shear strength, and thermal impedance. It was found that TLP die-attach offers high average shear force strength of 22.0 kgf and a low average thermal impedance of 0.35 K/W from the device junction to the substrate. The influence of various fabrication parameters on the bond characteristics were also compared, providing information necessary for implementing TLP die-attach into power electronic modules for high-temperature applications. The outcome of the investigation on TLP bonding techniques was incorporated into a new power module design utilizing TLP bonding. A full half-bridge inverter power module for low-power space applications has been designed and analyzed with extensive finite element thermomechanical modeling. In summary, TLP die-attach has investigated to confirm its reliability and to understand how to design effective TLP bonds, this information has been used to design a new high-temperature power electronic module.

The thesis focuses on designing and characterizing SiC 3.3 kV Diffused Metal-Oxide Semiconductor Field-Effect Transistor (DMOSFET)s with a Ron that is significantly lower than that of current commercial devices. The On-state resistance and breakdown voltage are then adjusted by adding a Super-Junction structure. Because of the pillar structure below the p-base area, the depletion will occur both vertically and horizontally and keeps the electric field distribution throughout the drift layer constant. The Super Junction Metal-Oxide Semiconductor Field-Effect Transistor (SJ MOSFET) has a good advantage compared to DMOSFETs. Due to its capacity to tolerate higher breakdown voltages and the fact that it does not require an increase in cell pitch to reach higher voltages, the Super-Junction approach is now the subject of effective research as compared to IGBTs and DMOSFETs. Silicon Carbide , a material with a wide bandgap that facilitates high temperature operation, high blocking voltage, high current flow and high switching frequency, is used to construct the device. In order to maintain a consistent electric field throughout the device, the concentration of the n and p pillars was chosen with a good charge balance between them. The outcomes of designing and simulating a DMOSFET, a Semi-SJ MOSFET, and a Full SJ MOSFET are compared in this research. The semi SJ device resulted in a Ron of 18.4 mΩcm2 and a Vb of 4.1 kV. The full SJ device reached a Ron of 12.4 mΩcm2 and a breakdown voltage of 4.2 kV. One optimized device was chosen from the semi SJ devices and used in several TCAD simulations, and the outcomes were evaluated based on the JFET width, pillar thickness, and charge imbalance between the p and n pillars. In this study, the device was also modelled for 6.5 kV and 10 kV SiC blocking voltage capabilities; the findings are also discussed. / Denna uppsats fokuserar på att utveckla och karakterisera 3.3 kV kiselkarbidbaserade DMOSFET-transistorer med betydligt lägre framspänningsfall jämfört med kommersiella halvledarkomponenter. Framspänningsfallet och spärrspänningen modifieras genom att använda en pelarliknande halvledarstruktur i drift regionen, dvs. en super-junction [SJ] struktur. På grund av pelarstrukturen under p-bas området, uppträder utarmningsområdet av laddningsbärare både vertikalt och horisontellt och ger ett konstant elektriskt fält genom drift-regionen. Super-junction transistorer har flera fördelar jämfört med komponenter i DMOSFET struktur. På grund av sin kapacitet att motstå högre spärrspänningar och genom att strukturen inte behöver en större enhetscellbredd för att nå högre spärrspänning, så är just nu super-junction strukturer i stort forskningsfokus jämfört med IGBT och DMOSFET komponenter. Kiselkarbid, ett material med ett brett bandgap, möjliggör komponenter för höga temperaturer, höga spärrspänningar, höga elektriska strömmar, samt höga växlingsfrekvenser, har använts för att bygga de undersökta komponenterna. För att generera ett konstant elektriskt fält över drift-regionen, så har dopningsnivåerna för n- och p- pelarna valts för att hålla en bra laddningsbalans mellan dem. Simuleringsresultaten av dessa komponentstrukturer, DMOSFET, halv-SJ MOSFET, och hel-SJ MOSFET är jämförda i detta projekt. Halv-SJ MOSFET transistorn resulterade i ett framspänningsfall på 18.4 mΩcm2 och når en spärrspänning av 4.1 kV. Hel-SJ MOSFET strukturen uppnår ett framspänningsfall på 12.4 mΩcm2 och med spärrspänning av 4.2 kV. En optimerad halv-SJ struktur valdes ut för att genomföra ytterligare TCAD simuleringsstudier om effekterna av JFET bredd, pelartjocklek, samt laddningsobalans mellan n- och p- pelarna. I den här studien simulerades även komponentstrukturer för 6.5 kV och 10 kV spärrspänningsklasser; även dessa resultat diskuteras i rapporten.

Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability of more complex circuits requires the use of simulators and device models to describe the behavior of constituent devices. SPICE Gummel Poon (SGP) is one such model that describes the behavior of the BJT devices. It is simpler as compared to the other models because of its relatively small number of parameters. A simple semi-empirical DC compact model has been successfully developed for low voltage applications SiC BJTs. The model is based on a temperature dependent SiC-SGP model. Studies over the temperature dependences for the SGP parameters have been performed. The SGP parameters have been extracted and some have been optimized over a wide temperature range and they have been compared with the measured data. The accuracy of the developed compact model based on these parameters has been proven by comparing it with the measured data as well. A fairly accurate performance at the required working conditions and correlation with the measured results of the SiC compact model has been achieved.

Enhancing performance of power electronics converters has always been an interesting topic in the power electronics community. Over the years, researchers and engineers are developing new high performance component, novel converter topologies, smart control methods and optimal design procedures to improve the efficiency, power density, reliability and reducing the cost. Besides pursuing high performance, researchers and engineers are striving to modularize the power electronics converters, which provides redundancy, flexibility and standardization to the end users. The trend of modularization has been seen in photovoltaic inverters, telecommunication power supplies, and recently, HVDC applications. A systematic optimal design approach for modular power converters is developed in this dissertation. The converters are developed for aerospace applications where there are stringent requirement on converter form factor, loss dissipation, thermal management and electromagnetic interference (EMI) performance. This work proposed an optimal design approach to maximize the nominal power of the power converters considering all the constraints, which fully reveals the power processing potential. Specifically, this work studied three-phase active front-end converter, three-phase isolated ac/dc converter and inverter. The key models (with special attention paid to semiconductor switching loss model), detailed design procedures and key design considerations are elaborated. With the proposed design framework, influence of key design variables, e.g. converter topology, switching frequency, etc. is thoroughly studied. Besides optimal design procedure, control issues in paralleling modular converters are discussed. A master-slave control architecture is used. The slave controllers not only follow the command broadcasted by the master controller, but also synchronize the high frequency clock to the master controller. The control architecture eliminates the communication between the slave controllers but keeps paralleled modules well synchronized, enabling a fully modularized design. Furthermore, the implementation issues of modularity are discussed. Although modularizing converters under form factor constraints adds flexibility to the system, it limits the design space by forbidding oversized components. This work studies the influence of the form factor by exploring the maximal nominal power of a double-sized converter module and comparing it with that of two paralleled modules. The tradeoff between modularity and performance is revealed by this study. Another implementation issue is related to EMI. Scaling up system capacity by paralleling converter modules induces EMI issues in both signal level and system level. This work investigates the mechanisms and provides solutions to the EMI problems. / Ph. D. / As penetration of power electronics technologies in electric power delivery keeps increasing, performance of power electronics converters becomes a key factor in energy delivery efficacy and sustainability. Enhancing performance of power electronics converters reduces footprint, energy waste and delivery cost, and ultimately, promoting a sustainable energy use. Over the years, researchers and engineers are developing new technologies, including high performance component, novel converter topologies, smart control methods and optimal design procedures to improve the efficiency, power density, reliability and reducing the cost of power electronics converters. Besides pursuing high performance, researchers and engineers are striving to modularize the power electronics converters, enabling power electronics converters to be used in a “plug-and-play” fashion. Modularization provides redundancy, flexibility and standardization to the end users. The trend of modularization has been seen in applications that process electric power from several Watts to Megawatts. This dissertation discusses the design framework for incorporating modularization into existing converter design procedure, synergically achieving performance optimization and modularity. A systematic optimal design approach for modular power converters is developed in this dissertation. The converters are developed for aerospace applications where there is stringent v requirement on converter dimensions, loss dissipation, and thermal management. Besides, to ensure stable operation of the onboard power system, filters comprising of inductors and capacitors are necessary to reduce the electromagnetic interference (EMI). Owning to the considerable weight and size of the inductors and capacitors, filter design is one of the key component in converter design. This work proposed an optimal design approach that synergically optimizes performance and promotes modularity while complying with the entire aerospace requirement. Specifically, this work studied three-phase active front-end converter, three-phase isolated ac/dc converter and three-phase inverter. The key models, detailed design procedures and key design considerations are elaborated. Experimental results validate the design framework and key models, and demonstrates cutting-edge converter performance. To enable a fully modularized design, control of modular converters, with focus on synchronizing the modular converters, is discussed. This work proposed a communication structure that minimizes communication resources and achieves seamless synchronization among multiple modular converters that operate in parallel. The communication scheme is demonstrated by experiments. Besides, the implementation issues of modularity are discussed. Although modularizing converters under form factor constraints adds flexibility to the system, it limits the design space by forbidding oversized components. This work studies the impact of modularity by comparing performance of a double-sized converter module with two paralleled modules. The tradeoff between modularity and performance is revealed by this study.