<p>As a power device material, SiC has gained remarkable attention to its high thermal conductivity and high breakdown electric field. SiC bipolar junction transistors (BJTs) are interesting for applications as power switch for 600 V-1200 V applications. The SiC BJT has potential for very low specific on-resistances and this together with high temperature operation makes it very suitable for applications with high power densities. One disadvantage of the BJT compared with MOSFETs and Insulated Gate Bipolar Transistors (IGBTs) is that the BJT requires a more complex drive circuit with higher power capability. For the SiC BJT to become competitive with field effect transistors, it is important to achieve high current gains to reduce the power required by the drive circuit. Although much progress in SiC BJTs has been made, SiC BJTs still have low common emitter current gain typically in the range 10-50. In this work, a record high current gain exceeding 60 has been demonstrated for a SiC BJT with a breakdown voltage of 1100 V. This result is attributed to an optimized device design, a stable device process and state-of-the-art epitaxial base and emitter layers.</p><p>A new technique to fabricate the extrinsic base using epitaxial regrowth of the extrinsic base layer was proposed. This technique allows fabrication of the highly doped region of the extrinsic base a few hundred nanometers from the intrinsic region. An important factor that made removal of the regrowth difficult was that epitaxial growth of very highly doped layers has a faster lateral than vertical growth rate and the thickness of the p+ layer therefore has a maximum close to the base-emitter sidewall. A remaining p+ regrowth spacer at the edge of the base-emitter junction is proposed to explain the low current gain.</p><p>Under high power operation, the SiC BJTs were strongly influenced by self-heating, which significantly limits the performance of device. The DC I-V characteristics of 4H-SiC BJTs have also been studied in the temperature range 25 °C to 300 °C. The DC current gain at 300 °C decreased 56 % compared to its value at 25 °C. Selfheating effects were quantified by extracting the junction temperature from DC measurements.</p><p>To form good ohmic contacts to both n-type and p-type SiC using the same metal is one important challenge for simplifying SiC Bipolar Junction Transistor (BJT) fabrication. Ohmic contact formation in the SiC BJT process was investigated using sputter deposition of titanium tungsten to both n-type and p-type followed by annealing at 950 oC. The contacts were characterized with linear transmission line method (LTLM) structures. The n+ emitter structure and the p+ base structure contact resistivity after 30 min annealing was 1.4 x 10-4 Ωcm2 and 3.7 x 10-4 Ωcm2, respectively. Results from high-resolution transmission electron microscopy (HRTEM), suggest that diffusion of Si and C atoms into the TiW layer and a reaction at the interface forming (Ti,W)C1-x are key factors for formation of ohmic contacts.</p>

Kyoto University (京都大学) / 0048 / 新制・課程博士 / 博士(工学) / 甲第14628号 / 工博第3096号 / 新制||工||1460(附属図書館) / 26980 / UT51-2009-D340 / 京都大学大学院工学研究科電子工学専攻 / (主査)教授 木本 恒暢, 教授 鈴木 実, 教授 藤田 静雄 / 学位規則第4条第1項該当

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Surge-energy robustness is essential for power devices in many applications such as automotive powertrains and electricity grids. While Si and SiC MOSFETs can dissipate surge energy via avalanche, the GaN high-electron-mobility transistor (HEMT) has no avalanche capability and withstands surge energy by its overvoltage capability. However, a comprehensive study into the surge-energy robustness of the cascode GaN HEMT, a composite device made of a GaN HEMT and a Si metal-oxide-semiconductor field-effect-transistor (MOSFET), is still lacking. This work fills this gap by investigating the failure and degradation of 650-V-rated cascode GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests. The cascode was found to withstand surge energy by the overvoltage capability of the GaN HEMT, accompanied by an avalanche in the Si MOSFET. In single-event UIS tests, the cascode failed in the GaN HEMT at a peak overvoltage of 1.4~1.7 kV, which is statistically lower than the device's static breakdown voltage (1.8~2.2 kV). In repetitive UIS tests, the device failure boundary was found to be frequency-dependent. At 100 kHz, the failure boundary (~1.3 kV) was even lower than the single-event UIS boundary. After 1 million cycles of 1.25-kV UIS stresses, devices showed significant but recoverable parametric shifts. Physics-based device simulation and modeling were then performed to understand the circuit test results. The electron trapping in the buffer layer of the GaN HEMT can explain all the above failure and degradation behaviors in the GaN HEMT and the resulted change in its dynamic breakdown voltage. Moreover, the GaN buffer trapping is believed to be assisted by the Si MOSFET avalanche. An analytical model was also developed to extract the charges and losses produced in the Si avalanche in a UIS cycle. These results provide new insights into the surge-energy and overvoltage robustness of cascode GaN HEMTs. / M.S. / Power conversion technologies are now inseparable in industrial and commercial applications with widespread solar panels, laptops, data centers, and electric vehicles. Power devices are the critical components of power conversion systems. Since the introduction of Si power metal-oxide-semiconductor field-effect-transistor (MOSFET) in the mid-1970s, it has become the go-to device that enables efficient and reliable power conversion. After decades of practice on Si MOSFET, the device performance has reached the theoretical limit of the Si material. The recent introduction of wide-bandgap (WBG) power transistors, represented by silicon carbide (SiC) and gallium nitride (GaN) devices with superior figures of merits, opens the door for faster and more efficient power systems. To exploit the benefits of WBG devices, researchers need to evaluate the reliability and robustness of these devices comprehensively. The work presented here provides a study on the robustness of one mainstream GaN power transistor – the cascode GaN high-electron-mobility transistor (HEMT). This robustness test replicates the surge events in power electronics systems and exams their impact on power devices. Over the years, people have thoroughly investigated the surge-energy robustness of Si MOSFETs and concluded that Si MOSFETs are very robust against these surge events thanks to the avalanche mechanism. However, GaN HEMTs lack p-n junction structures between the two major electrodes, leading to the lack of avalanche ability. Instead, GaN HEMTs rely on the overvoltage capability to sustain the surge energy. For the first time, this work evaluates the surge-energy and overvoltage ruggedness of cascode GaN HEMTs, a major player in the GaN power device market. By analyzing the device failure mechanism and degradation behaviors, this research work provides insight into the weakness of these devices for both device designers and application engineers.

The temperature dependent electrical characteristics of silicon carbide power transistors – 4H-SiC metal semiconductor field-effect transistors (MESFETs) and 4H-SiC bipolar junction transistors (BJTs) have been investigated through simulation and experimental approaches. Junction temperatures and temperature distributions in devices under large power densities have been estimated. The DC and RF performance of 4H-SiC RF Power MESFETs have been studied through two-dimensional electro-thermal simulations using commercial software MEDICI and ISE. The simulated characteristics of the transistors were compared with the measurement results. Performance degradation of transistors under self-heating and high operating temperatures have been analyzed in terms of gate and drain characteristics, power density, high frequency current gain and power gain. 3D thermal simulations have been performed for single and multi-finger MESFETs and the simulated junction temperatures and temperature profiles were compared with the results from electro-thermal simulations. The reduction in drain current caused by self-heating was found to be more prominent for transistors with more fingers and it imposes a limitation on both the output power and the power density (in W/mm) of multi-fingered large area devices. Thermal issues for design of high power multi-fingered SiC MESFETs were also investigated. A couple of useful ways to reduce the self-heating effects were discussed. Trap-induced performance instabilities of the devices were analyzed by carrying out DC, transient, and pulse measurements at room and elevated temperatures. Electrical characteristics of 4H-SiC BJTs have been measured. A reduction in current gain at elevated temperatures was observed. Based on the collector current-voltage diagram measured at three different ambient temperatures the junction temperature was extracted using the assumption that the current gain only depends on the temperature. Temperature measurements have been carried out for SiC BJTs. Thermal images of a device under operation were recorded using an infrared camera. 3D thermal simulations were conducted using FEMLAB. Both the simulations and the measurement showed a significant temperature increase in the vicinity of the device when operated at high power densities, thus causing the decrease of the DC current gain. The junction temperatures obtained from the thermal imaging, simulation and extraction agree well.

The superior characteristics of silicon carbide, compared with silicon, have suggested considering this material for the next generation of power semiconductor devices. Among the different power switches, the bipolar junction transistor (BJT) can provide a very low forward voltage drop, a high current capability and a fast switching speed. However, in order to compete on the market, it is crucial to a have high current gain and a breakdown voltage close to ideal. Moreover, the absence of conductivity modulation and long-term stability has to be solved. In this thesis, these topics are investigated comparing simulations and measurements. Initially, an efficient etched JTE has been simulated and fabricated. In agreement with the simulations, the fabricated diodes exhibit the highest BV of around 4.3 kV when a two-zone JTE is implemented. Furthermore, the simulations and measurements demonstrate a good agreement between the electric field distribution inside the device and the optical luminescence measured at breakdown. Additionally, an accurate model to simulate the forward characteristics of 4H-SiC BJTs is presented. In order to validate the model, the simulated current gains are compared with measurements at different temperatures and different base-emitter geometries. Moreover, the simulations and measurements of the on-resistance are compared at different base currents and different temperatures. This comparison, coupled with a detailed analysis of the carrier concentration inside the BJT, indicates that internal forward biasing of the base-collector junction limits the BJT to operate at high current density and low forward voltage drop simultaneously. In agreement with the measurements, a design with a highly-doped extrinsic base is proposed to alleviate this problem. In addition to the static characteristics, the comparison of measured and simulated switching waveforms demonstrates that the SiC BJT can provide fast switching speed when it acts as a unipolar device. This is crucial to have low power losses during transient. Finally, the long-term stability is investigated. It is observed that the electrical stress of the base-emitter diode produces current gain degradation; however, the degradation mechanisms are still unclear. In fact, the analysis of the measured Gummel plot suggests that the reduction of the carrier lifetime in the base-emitter region might be only one of the causes of this degradation. In addition, the current gain degradation due to ionizing radiation is investigated comparing the simulations and measurements. The simulations suggest that the creation of positive charge in the passivation layer can increase the base current; this increase is also observed in the electrical measurements. / QC 20120522

<p>The temperature dependent electrical characteristics of silicon carbide power transistors – 4H-SiC metal semiconductor field-effect transistors (MESFETs) and 4H-SiC bipolar junction transistors (BJTs) have been investigated through simulation and experimental approaches. Junction temperatures and temperature distributions in devices under large power densities have been estimated. </p><p>The DC and RF performance of 4H-SiC RF Power MESFETs have been studied through two-dimensional electro-thermal simulations using commercial software MEDICI and ISE. The simulated characteristics of the transistors were compared with the measurement results. Performance degradation of transistors under self-heating and high operating temperatures have been analyzed in terms of gate and drain characteristics, power density, high frequency current gain and power gain. 3D thermal simulations have been performed for single and multi-finger MESFETs and the simulated junction temperatures and temperature profiles were compared with the results from electro-thermal simulations. The reduction in drain current caused by self-heating was found to be more prominent for transistors with more fingers and it imposes a limitation on both the output power and the power density (in W/mm) of multi-fingered large area devices. Thermal issues for design of high power multi-fingered SiC MESFETs were also investigated. A couple of useful ways to reduce the self-heating effects were discussed. Trap-induced performance instabilities of the devices were analyzed by carrying out DC, transient, and pulse measurements at room and elevated temperatures. </p><p>Electrical characteristics of 4H-SiC BJTs have been measured. A reduction in current gain at elevated temperatures was observed. Based on the collector current-voltage diagram measured at three different ambient temperatures the junction temperature was extracted using the assumption that the current gain only depends on the temperature. Temperature measurements have been carried out for SiC BJTs. Thermal images of a device under operation were recorded using an infrared camera. 3D thermal simulations were conducted using FEMLAB. Both the simulations and the measurement showed a significant temperature increase in the vicinity of the device when operated at high power densities, thus causing the decrease of the DC current gain. The junction temperatures obtained from the thermal imaging, simulation and extraction agree well. </p>

This assignment was given by Nordic Semiconductor. In this project a radio frequency energy harvesting system able to harvest ambient power at 900 MHz (GSM) was simulated and designed. A Villard voltage multiplier, boost converter and power management circuit was implemented for the harvesting system. The intention was to implement a system which would give sufficient output power and voltage to supply a load (nRF52810) at all times. The nRF52810 is a power efficient multi protocol SoC made by Nordic Semiconductor. Since the power harvested by the antenna is of AC power, a recti er was needed. A Villard voltage multiplier was proposed as the most suitable application. It not only recti es the voltage, but the voltage doubles for every stage. A 2-stage Villard voltage multiplier was proposed with the advantage that in theory the output voltage should be four times higher in magnitude than the input voltage. There exists several other ways to boost a voltage, a voltage boost converter was combined with the Villard Voltage multiplier. According to calculations the boost converter should boost the voltage up to 2.3 V. Since the assumed power from the harvesting system may be lower than the power consumed by the load, a power managing circuit was also needed, which would avoid the load to drain the current from the storage element before the voltage level was sufficient. Different solutions for a power management circuit was proposed using different variations of MOSFETs. A real-life design was implemented, but the Villard voltage multiplier gave out a much lower e efficiency than expected from simulations. The output power of the VVM was too low to supply the load (nRF52810).

京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第22447号 / 工博第4708号 / 新制||工||1735(附属図書館) / 京都大学大学院工学研究科電子工学専攻 / (主査)教授 木本 恒暢, 教授 山田 啓文, 准教授 船戸 充 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

This Thesis „Emergency Button for Seniors“ is about suggestion of realization of system emergency signalization. The System consists of programmable digital watch with wireless interface and PC with software processing signals. Status signalization is created by phone message and figuration of dialog on monitor. There is used free software for realization. Operation system on PC is Linux (distribution Ubontu 11.04). For graphic transitional plane PC application is used cross-platform framework QT. For watch firmware is used C compiler MSP430-GCC, MSP debug v0,15 and firmware OpenChronos.