This thesis investigates techniques for prototyping and evaluation of medium voltage (MV) power module packages. Specific focus will be given to the utilization of silver sintering as a bonding method for high temperature, high density power modules. Nano-silver paste and preform will be examined in detail as enabling technologies for a new generation of power electronics. To accomplish this task, analysis and characterization of the metal-ceramic substrate and its structure is performed. First, finite element models are created to evaluate the fatigue behavior of the large area bonds in the substrate structure. Prototypes of these multi-layer substrates have also been fabricated and will be subjected to thermal cycling tests for experimental verification of the efficacy of their sintered silver bonds. Stacked direct-bonded aluminum (DBA) substrates have been found to withstand up to 1000 thermal cycles of –40 °C to 200 °C when attached with low pressure-assisted silver sintering. The thermal performance of 10 kV SiC power module utilizing multi-layer DBA substrates bonded with a large-area, low pressure-assisted sintered silver bond will also be examined to ensure the sintered bond is viable for the harsh operating conditions of MV modules. A junction-to-case thermal resistance of 0.142 °C/W is measured on a module prototype utilizing stacked DBA substrates. Finally, analysis of a double-sided cooling scheme enabled by large area sintering is simulated and prototyped to demonstrate a 6.5 kV package for a MV power device. Residual stress failures induced by a highly rigid structure have been examined and mitigated through implementation of a 5 MPa pressure-assisted, double-sided silver sintering approach. / Master of Science / Power modules are the building blocks of the electrical grid of the future. As society transitions to renewable energy to fight the crisis presented by climate change, the structure of the energy grid will have to change to accommodate the increase in solar, wind, geothermal, and other renewable sources of energy generation. A clean energy grid structure will contain ubiquitous opportunities to use power modules for medium-voltage (MV) applications, like managing the flow of electricity from solar panels and wind turbines to neighborhoods and office buildings. However, these MV power modules will need to be resilient to extreme temperature and electrical stresses inherent to these applications. Current technology must be improved in both performance and reliability to match the needs of this future grid. This thesis investigates, through both experiment and computer simulation, techniques for improving the reliability of MV power modules without sacrificing thermal or electrical performance. Techniques presented in this work have the potential to transform power modules, so they may operate at higher temperatures and efficiencies for a longer lifetime than the current state-of-the-art.

In modern power electronics systems there is a growing trend to replace discrete devices with integrated power electronic modules (IPEMs). In this way, several components can be replaced by a single component. By using prefabricated building blocks, the engineer simplifies the design process, reducing the total design cycle time and cost. By integrating only the necessary components to provide power switching, the end user has a pre-optimized building block with the flexibility to be used in a large variety of applications. Besides simplifying the design process, power modules should be designed in such a way as to improve the performance of the power converter. This begs the question as to how best to judge if one IPEM has better performance than another or better performance than its discrete counterpart. In analyzing a converter's performance, popular criteria include efficiency, power density, device stresses, and EMI. All of these criteria are strongly linked to the switching characteristics of the IPEM's power devices. This thesis is a comprehensive study of the requirements for obtaining and analyzing the switching characteristics of the IPEM's power devices. It outlines the important switching characteristics and the implications of each characteristic on converter performance. It deals with the relevant measurement issues, specifically addressing the minimum requirements, which sensors are most suitable, and problems leading to inaccurate data. A parametric study is conducted to determine the effects of several circuit and operating parameters on the switching characteristics. Using the resulting data and the knowledge from the measurement study, we can decide how to design the testbed layout, what operating conditions should be chosen for testing, and what effects of the tester must be decoupled to truly see the effects of IPEM design. The thesis concludes with the design of standard test equipment and procedures. / Master of Science

Power module design is needed for high system performance and reliability, especially in terms of high efficiency and high power density. Low parasitic impedance and thermal management is desired for the lower power loss and device stress. For power module with high efficiency and improved breakdown voltage, this thesis proposes a novel series-connected power MOSFETs module. Three IRF7832 MOSFETs (30 V breakdown voltage) in series are simulated in a chopper circuit. The drain-source voltage sharing in switching off-mode shows that the devices can share voltage within their breakdown ranges. The switching characteristics are studied, and the switching energy losses without parasitic inductance and with 5 nH parasitic inductances are 203.38 µJ and 316.49 µJ, respectively. The critical parasitic inductance is the one connecting the source of the upper MOSFET and the drain of the middle MOSFET. The switching energy loss due to critical parasitic inductance is about 44.4% of the total switching energy loss. The layout is designed for the double-substrates direct-bond module and wire-bonded module using direct-bond-copper (DBC) substrate. Based on layout dimensions and packaging materials, the packaging module's parasitic parameters are obtained using Ansoft® Q3D extractor. Using parasitic inductance values from simulation, the switching energy losses of direct-bond module and wire-bonded module are 296.18 µJ and 238.99 µJ, respectively. Thermal management is then studied using Ansoft® ePhysics. The MOSFET junction-to-air thermal resistances of the double-substrate direct-bond module and the single-substrate wire-bonded module are 33oC/W and 82oC/W, respectively. Hence, by comparing the direct-bond module with a wire-bonded power module, direct-bond module shows lower parasitic impedances and better thermal management. To test the breakdown voltage of series-connected power MOSFETs module, three TI DualCoolTM N-channel NexFET Power MOSFETs (25 V breakdown voltage) in series are assembled using flip-chip direct-bond technology. Three samples are assembled and the breakdown voltages are measured by using high-power curve tracer as 76 V, 82 V, and 72 V. The more accurate method for testing breakdown voltages by digital voltmeter obtains 77.51 V, 82.31 V, and 73.06 V. The series-connected power MOSFETs module shows compact volume, low parasitic impedances, thermal resistances and improved breakdown voltage. This power module has strong potential for use in applications that require minimized packaging size and parasitic inductance for high voltage, high switching frequency, and high efficiency. / Master of Science

The charge equalization for the battery power source with battery power modules (BPMs) in series is presented in the thesis. The bidirectional power converters in BPMs are able to serve as chargers with buck conversion during the charging stage. Even though connected in series, all modules can substantially be operated individually, retaining the advantages of independent operation, such as flexible control, easy protection, simple maintenance, and favorable battery power management. Investigation results indicate that automatic charge equalization is possible for the discontinuous conduction mode (DCM) operation. On the other hand, charge equalization can be achieved much faster by individually regulating the charging currents at the continuous conduction mode (CCM). According to the analyzed results, an equalization strategy is proposed to solve the charge imbalance problem by scheduling the individual battery current. Experiments are carried out to demonstrate the effectiveness of charge equalization.

This thesis studies the operating characteristics of the boost type battery power modules (BPMs) with series and parallel configurations. Under different operating conditions, the BPMs can be operated at the continuous conduction mode (CCM), the discontinuous conduction mode (DCM), or the hybrid mode with a combination of CCM and DCM. The current distribution and balance discharging among BPMs with different configurations are analyzed in detail. Experiments are carried out to demonstrate the analysis results. Finally, a circuit configuration with arrayed BPMs is proposed for adaptable management and maintenance of a battery power system.

This thesis investigates the discharging behavior of serial boost-type battery power modules (BPMs). Even though the BPMs are connected in series to cope with a higher output voltage, all batteries in the BPMs can substantially be operated individually so that can realize the balanced discharging control strategy. By which, the battery currents are scheduled in accordance with their state-of-charges (SOCs).A battery power system formed by 10 boost-type BPMs is built, in which a micro controller is used for detecting the loaded voltages, estimating the SOCs, and controlling the duty ratios of the power converters. Experimental results demonstrate the balanced discharging capability of the serial BPMs. In addition, fault tolerance mechanism is introduced to isolate fault or exhausted batteries and keep the system working with a reduced load.

In this thesis, we develop an automatic hardware synthesizer for multiplier-based arithmetic functions such as parallel multipliers/multiplier-accumulator/inner-product calculator. The synthesizer is divided into two major phases. In the first phase called pre-layout netlist generation, the synthesizer generates the gate-level verilog codes and the corresponding test fixture file for pre-layout simulation. The second phase, called layout-generation, is to produce the CIF file of final physical layout based on the gate-level netlist generated in the first phase. The thesis focuses on the first phase. The irregular connection of the Wallace tree in the parallel multiplier is optimized in order to reduce the overall delay and power. In addition to the conventional 3:2 couter that is usually included in standard cell library, our synthesizer can select other different compression elements that are full-custom designed using pass-transistor logic. We also propose several methods to partition the final addition part of the parallel multiplier into several regions in order to further reduce the critical path delay and the area cost. Thus, our multiplier generator combines the advantages of three basic design approaches: high-level synthesis, cell-based design and full-custom design along with area and power optimization.

This thesis presents a novel configuration of battery power by the outputs with serial connection of battery power modules (BPMs) for high voltage level loads. As compared to the conventional application of series-connected battery bank, this configuration operates the BPMs individually, and thus has the advantages of flexible control, convenient maintenance, and easily favorable battery management. The associated converter is equipped to a single battery pack, so that has lower component stresses leading to a higher circuit efficiency. The operation and the design of a lead-acid battery power with series boost-typed BPMs are illustrated. The operation and the design of the converter are illustrated. The control of the power converters is accomplished by a complex programmable logic device (CPLD). To improve the converter efficiency, the technique of synchronous rectification is introduced. For the BPMs designed for discontinuous conduction mode (DCM) operation, charge equalization can be automatically achieved under the same duty-ratio, but is adequate only for batteries with a small difference. On the other hand, charge equalization for the BPMs with continuous conduction mode (CCM) can easily be accomplished by regulating the duty-ratios of the converters.

Grâce aux propriétés physiques du matériau et à l'avancement de l'ingénierie et de la fabrication, les dispositifs semi-conducteurs à base de nitrure de gallium (GaN) sont des candidats prometteurs pour la conception des modules de puissance à haute fréquence, à haut rendement et donc à haute densité de puissance. Cependant, la commutation rapide des appareils GaN entraîne une vitesse de rotation élevée dans la tension de commutation (dV / dt) et le courant (dI / dt), combiné avec des éléments parasites inductifs (L) et capacitifs (C) dans le module de puissance, donne lieu à des tensions électromagnétiques le bruit d'interférence (EMI) dans une large gamme de fréquences. Cette thèse est axée sur l'influence sur les performances EMI de la conception des modules de puissance basés sur GaN et les approches d'optimisation. Afin d'étudier les problèmes susmentionnés, un module de puissance complet comprenant les appareils de puissance GaN et l'emballage du module doit être caractérisé et modélisé afin que les performances EMI puissent être reconstruites par simulation avec ces modèles. Les méthodes de modélisation d'un transistor de mobilité à haute électron (HEMT) et d'un module de puissance conçu par un laboratoire sont décrites respectivement aux chapitres I et II, La modélisation de l'appareil implique la partie statique et la partie dynamique, où le premier est modélisé pour représenter les caractéristiques IV avant et les conducteurs inverses en diodes inverses et ce dernier est modélisé pour représenter les capacités intrinsèques non linéairement dépendantes de la tension entre chaque paire de bornes . La méthode de modélisation est basée sur les caractéristiques extraites de la fiche technique et peut être mise à l'échelle de tous les e-mode GaN HEMT. La modélisation de l'emballage implique principalement l'extraction des capacités parasites entre le module et le radiateur et les inductances parasites entre le condensateur de liaison CC et les dispositifs d'alimentation. Les extractions sont traitées à la fois par calcul numérique avec logiciel ANSYS Q3D et mesure d'impédance avec un analyseur de réseau vectoriel E5061B. Les résultats de ces deux approches correspondent bien de l'un à l'autre. Une fois que le modèle complet du module de puissance basé sur GaN est construit, il est validé avec un test de commutation expérimental où les signaux de commutation simulés et les bruits EMI sont comparés aux mesurés respectivement aux chapitres III et IV. Le banc d'essai en dehors du module de puissance GaN est modélisé pour compléter le modèle de simulation complet. Les précautions de mesure sont également présentées. Les formes d'onde de commutation sont obtenues en double impulsion et en tests de commutation permanente et sont comparées aux simulations où elles sont correctement adaptées. La minimisation du dépassement de la tension de commutation en utilisant entre DC + et DC - les condensateurs dans le module CX est analysée et enfin la valeur du condensateur CX est recommandée dans différentes situations. Les bruits EMI sont mesurés en termes de courants de mode commun (CM) et de mode différentiel (DM) dans le réseau linéaire à impédance stabilisée (LISN) et sont comparés avec ceux simulés où ils sont correctement adaptés de 100 kHz à 30MHz. On analyse les chemins de propagation du bruit CM du module d'alimentation et de la charge de l'inducteur de résistance. Les effets des condensateurs dans le module CX et du CM filter ones CY sont étudiés. Enfin, la répartition des condensateurs de filtre dans différents endroits est étudiée par simulation. / Thanks to the material’s physical properties and the advancement in the engineering and manufacturing, power semiconductor devices based on Gallium Nitride (GaN) are promising candidates for high frequency, high efficiency and thus high power density power module design. However, GaN devices’ fast switching results in high slew rate in switching voltage (dV/dt) and current (dI/dt), combined with parasitic inductive (L) and capacitive (C) elements within the power module, gives rise to electromagnetic interference (EMI) noise in a wide frequency range. This dissertation is focused on the influence on EMI performance of the GaN based power module design and the optimization approaches.In order to study the aforementioned issues, an entire power module including the GaN power devices and the module’s packaging are to be characterized and modeled so that the EMI performances can be reconstructed by simulation with these models. The modeling methods of a commercial enhancement-mode (e-mode) GaN High-Electron-Mobility-Transistor (HEMT) and a lab-designed power module are discussed respectively in chapter I and II,• The device modeling involves the static part and the dynamic part, where the former is modeled to represent the forward I-V characteristics and the reverse diode-like conducting ones and the latter is modeled to represent the nonlinearly voltage dependent intrinsic capacitances between each pair of terminals. The modeling method is based on the characteristics extracted from datasheet and can be scaled to all e-mode GaN HEMT.• The packaging modeling involves mainly the extraction of the stray capacitances between the module and the heatsink and the parasitic inductances between the DC link capacitor and the power devices. The extractions are processed by both numerical calculation with software ANSYS Q3D and impedance measurement with a vector network analyzer E5061B. The results from these two approaches match well from one to the other.Once the full model of the GaN based power module is built, it is validated with experimental switching test where the simulated switching waveforms and the EMI noises are compared with the measured ones respectively in chapter III and IV. The test bench apart from the GaN power module is modeled to complete the full simulation model. The measurement precautions are presented as well.• The switching waveforms are obtained in double pulse and permanent switching tests and are compared to the simulated ones where they are correctly matched. The minimization of the switching voltage’s overshoot by using between DC+ and DC- the in-module capacitors CX is analyzed and finally the capacitor CX’s value is recommended in different situations.• The EMI noises are measured in terms of common mode (CM) and differential mode (DM) currents in the Line-Impedance-Stabilized-Network (LISN) and are compared with the simulated ones where they are correctly matched from 100 kHz up to 30MHz. The CM noise propagation paths from the power module and from the resistor-inductor load are analyzed. The effects of the in-module capacitors CX and the CM filter ones CY are studied. Finally the distribution of filter capacitors in different locations is studied by simulation.

This Ph.D. thesis carries out extensive and in-depth research on the packaging technology of silicon carbide (SiC) power modules, including new packaging structures, multi-physics modeling and optimal design methods for half-bridge power modules, manufacturing processes, and experimental validations. A new packaging scheme, the Silver-Sintered Molybdenum (SSM) packaging, is proposed in this thesis. It contains a molybdenum (Mo) -based insulated-metal-substrate (IMS) structure, nano-silver sintering die-attachments, and planar interconnections. This technology has the potential to increase the operating temperature of SiC power modules to above 200 degrees, and can greatly improve their lifetime. These advantages are verified by active power cycling and passive temperature cycling simulations. Analytical modeling methods for half-bridge power modules with the SSM packaging are also studied. A decoupled Fourier-based thermal model is introduced. This model considers the decoupling effect between different heat source regions and can give a three-dimensional analytical solution for the temperature field of a simplified half-bridge power module structure. In addition, based on the partial inductance model for rectangular busbars, an analytical stray inductance model for half-bridge power modules is also proposed. The accuracy of these two models is estimated by both numerical simulations and experiments. With the proposed analytical models, an optimal design method for half-bridge power modules with the SSM packaging is proposed in this study, which uses the particle swarm optimization algorithm. This method is successfully applied in the design of a prototype power module and is able to minimize the stray inductance and volume while maintaining desired junction temperatures. This thesis also introduces the manufacturing process of the prototype power module. Several new processes are proposed and validated, including a pressure-less nano-silver sintering process to bond SiC dies on Mo substrates, the formation of the Mo-based IMS structure, and the re-metallization of SiC dies. / Thesis / Doctor of Philosophy (PhD)