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L'augmentation de la capacité d'intégration des circuits a permis le développement des systèmes de plus en plus complexes. De cette complexité sont nés des besoins conséquents quant aux méthodes de conception et de vérification. Les outils de synthèse de haut-niveau (HLS) sont une des réponses à ces besoins. Les travaux présentés dans cette thèse ont pour cadre l'amélioration du processus de vérification des architectures matérielles synthétisées par HLS. En particulier, ils proposent une méthode pour la transformation des assertions booléennes spécifiées dans la description algorithmique d'une application en moniteurs matériels pour la simulation. Une deuxième méthode est proposée. Elle cible la synthèse automatique d'un gestionnaire d'erreurs matériel dont le rôle est d'archiver les erreurs survenant dans un circuit en fonctionnement réel, ainsi que leurs contextes d'exécution. / The fast growing complexity of hardware circuits, during the last three decades, has change devery step of their development cycle. Design methods evolved a lot, and this evolutionwas necessary to cope with an always shorter time-to-market, mainly driven by the internationalcompetition.An increased complexity also means more errors, harder to find corner-cases, and morelong and expensive simulations. The verification of hardware systems requires more andmore resources, and is the main cost factor of the whole development of a circuit. Since thecomplexity of any system increases, the cost of an error undetected until the foundry stepbecame prohibitive. Therefore, the verification process is divided between multiple stepsinvolved at every moment of the design process : comparison of models behavior, simulationof RTL descriptions, formal analysis of algorithms, assertions usage, etc. The verificationmethodologies evolved a lot, in order to follow the progress of design methods. Somemethods like the Assertion-Based Verification became so important that they are nowwidely adopted among the developers community, providing near-source error detection.Thus, the work described here aims at improving the assertion-based verification process,in order to offer a consequent timing improvment to designers. Two contributions aredetailed. The first one deals with the transformation of Boolean assertions found in algorithmicdescriptions into equivalent temporal assertions in the RTL description generatedby high-level synthesis (HLS) methodologies. Therefore, the assertions are usable duringthe simulation process of the generated architectures. The second contribution targets theverification of hardware systems in real-time. It details the synthesis process of a hardwareerror manager, which has to save and serialize the execution context when an error isdetected. Thus, it is easier to understand the cause of an error and to find its source. Theerrors and their contexts are serialized as reports in a memory readable by the system ordirectly by the designer. The behavior of a circuit can be analyzed without requiring anyprobe or integrated logic analyzer.

Au-delà de la formidable évolution en termes de complexité du circuit électronique en soi, son adoption et sa diffusion ont connu, au fil des dernières années, une explosion dans un très grand nombre de domaines distincts. Un système sur puce peut incorporer une combinaison de composants aux fonctionnalités très différentes. S'assurer du bon fonctionnement de chaque composant, et du système complet, est une tâche primordiale et épineuse. Dans ce contexte, l'Assertion-Based Verification (ABV) a considérablement gagné en popularité ces dernières années : il s'agit d'une démarche de vérification où des propriétés logico-temporelles, exprimées dans des langages tels que PSL ou SVA, spécifient le comportement attendu du design. Alors que la plupart des solutions d'ABV existantes se limitent au niveau transfert de registres (RTL), la contribution décrite dans cette thèse s'efforce de résoudre un certain nombre de limitations et vise ainsi une solution mature pour le niveau transactionnel (TLM) de SystemC. Une technique efficace de construction de moniteurs de surveillance à partir de propriétés PSL est proposée : cette technique, inspirée d'une approche originale existante pour le niveau RTL, est ici adaptée à SystemC TLM. Une méthode spécifique de surveillance des actions de communication à haut niveau d'abstraction est également détaillée. Les possibilités offertes par la technique présentée sont significativement étendues en proposant, pour les propriétés écrites en langage PSL, à la fois un support formel et une mise en oeuvre pratique pour des variables auxiliaires globales et locales, qui constituent un élément essentiel lors des spécifications à haut niveau d'abstraction. Tous ces concepts sont également implémentés dans un outil prototype. Afin d'illustrer l'intérêt de la solution proposée, diverses expérimentations sont effectuées avec des designs aux dimensions et complexités différentes. Les résultats obtenus permettent de souligner le fait que la méthode de vérification dynamique suggérée reste applicable pour des designs de taille réaliste. / Over the last years, the growing of electronic circuit complexity has experienced a tremendous evolution. Moreover, electronic circuits have become widespread elements in many different areas. This development leads to Systems-on-Chip incorporating a combination of components with highly heterogeneous features. Ensuring the correct behavior of each component, as well as validating the behavior of the whole system, is both a compelling and painful task. In this context, Assertion-Based Verification (ABV) has widely gained acceptance over the recent years : following this approach, temporal properties expressed using languages such as PSL or SVA specify the expected behavior of the design. While most existing ABV solutions are restricted to the register transfer level (RTL), the work of this thesis attempts to overcome some limitations by developing an actual ABV solution for the transaction level modeling (TLM) in SystemC. An effective technique for the construction of checker modules from PSL properties is proposed : this technique for SystemC TLM is inspired from a pioneering approach for RTL. A specific method for monitoring communication activities at a high level of abstraction is also described. The scope of the proposed technique is significantly improved by adding to PSL both a formal and a practical support for auxiliary global and local variables, which are compelling in higher level specifications. All these concepts are implemented in a prototype tool. In order to present the applicability of the proposed solution, we performed various experiments using designs of different sizes and complexities. The experimental results show that this dynamic verification methodology is also suitable for real-world designs.

Cette thèse constitue la première étude générale de la modalité en néo-égyptien. Le chapitre introductif (p. 5-43) est consacré [1] à la définition de ce premier état de langue de légyptien de la seconde phase ; cette définition a permis la délimitation dun corpus servant dassise empirique à létude (la répartition du corpus en fonction de critères chronologiques et géographiques, de la nature du support et des "Textsorten" a donné la possibilité de pondérer et dobjectiver les analyses proposées pour chaque expression de la modalité). Ensuite, [2] un cadre théorique général pour létude de la langue est discuté. Le corps du travail se divise en trois parties consacrées respectivement : [1] à une définition générale de la notion de modalité (cela afin de déterminer les media expressifs qui relèvent de son étude en néo-égyptien) ainsi quà létablissement dun modèle sémantique à la fois économique, cohérent et correspondant aux données typologiques (p. 44-115) ; [2] à létude des modalités radicales (i.e. les modalités déontiques et bouliques en envisageant les relations quelles entretiennent avec le domaine axiologique ; p. 116-341) ; [3] à lexamen des modalités assertives (p. 342-446) : [a] analyse des formes de complémentation, en ce compris les liens entre intégration syntaxique, variation de lassertivité et degré de manipulation, [b] étude de limpact des auxiliaires dénonciation sur le degré dassertivité dune proposition, [c] critique des théories existantes concernant les moyens expressifs du discours indirect en néo-égyptien. Les conclusions (p. 447-466) sont accompagnées de propositions prospectives devant permettre [1] de rendre le modèle défendu applicable à létude des complexes conditionnels, [2] dintégrer la dimension énonciative dans lanalyse des relations interpersonnelles, [3] de proposer une approche globale des media expressifs de la causalité et de la finalité.

This thesis describes the Omnibus language and its supporting framework of tools. Omnibus is an object-oriented language which is superficially similar to the Java programming language but uses value semantics for objects and incorporates a behavioural interface specification language. Specifications are defined in terms of a subset of the query functions of the classes for which a frame-condition logic is provided. The language is well suited to the specification of modelling types and can also be used to write implementations. An overview of the language is presented and then specific aspects such as subtleties in the frame-condition logic, the implementation of value semantics and the role of equality are discussed. The challenges of reference semantics are also discussed. The Omnibus language is supported by an integrated verification tool which provides support for three assertion-based verification approaches: run-time assertion checking, extended static checking and full formal verification. The different approaches provide different balances between rigour and ease of use. The Omnibus tool allows these approaches to be used together in different parts of the same project. Guidelines are presented in order to help users avoid conflicts when using the approaches together. The use of the integrated verification approach to meet two key requirements of safe software component reuse, to have clear descriptions and some form of certification, are discussed along with the specialised facilities provided by the Omnibus tool to manage the distribution of components. The principles of the implementation of the tool are described, focussing on the integrated static verifier module that supports both extended static checking and full formal verification through the use of an intermediate logic. The different verification approaches are used to detect and correct a range of errors in a case study carried out using the Omnibus language. The case study is of a library system where copies of books, CDs and DVDs are loaned out to members. The implementation consists of 2278 lines of Omnibus code spread over 15 classes. To allow direct comparison of the different assertion-based verification approaches considered, run-time assertion checking, extended static checking and then full formal verification are applied to the application in its entirety. This directly illustrates the different balances between error coverage and ease-of-use which the approaches offer. Finally, the verification policy system is used to allow the approaches to be used together to verify different parts of the application.

The behavior role-playing task (BRPT) has become a popular method of assessing assertive behavior. However, current research suggests that situational factors can affect the outcome of such assessments, independently of the subject's level of assertiveness. The present study investigated the effects of one such factor: the type of prompt delivered during the BRPT. It was hypothesized that subjects would respond more assertively to provocatively prompted scenes than to neutral scenes. Twenty nursing students were exposed to BRPTs involving both provocative and neutral role-player prompts. The results revealed that while provocative BRPTs generated significantly greater amounts of self-reported anger and anxiety than did the neutral BRPTs, there were no significant differences in response latency, duration, or assertive content between the two conditions.

One usually makes assertions by means of uttering indicative sentences like It is raining. However, not every utterance of an indicative sentence is an assertion. For example, in uttering I will be back tomorrow, one might be making a promise. What is to make an assertion? C.S. Peirce held the view that to assert a proposition is to make oneself responsible for its truth (CP 5.543). In this thesis, I interpret Peirces view of assertion and I evaluate Peirces reasons for holding it. I begin by reconstructing and assessing Peirces case for such view as it appears in (EP 2.140, 1903), (EP 2.312-313, 1904), and (CP 5.546, 1908). Then, I continue by elaborating on three aspects of Peirces view of assertion, namely, assertion as an act involving a certain kind of responsibility, the proposition as what is asserted, and responsibility for truth as a responsibility to give reasons. With respect to these three aspects, I argue for the following claims: (1) Peirce construed the responsibility involved in asserting as a moral responsibility; (2) Peirce held that propositions are types; and (3) Peirce was committed to a dialogical interpretation of responsibility to give reasons. Finally, I end by presenting two objections to Peirces view of assertion and its corresponding replies. I conclude that Peirces account of assertion is a valuable contribution to the philosophical debate on assertion. / Costumamos fazer asserções quando proferimos sentenças indicativas como \"Está chovendo\". Mas, não toda proferição de uma sentença indicativa é uma asserção. Por exemplo, quando dissemos vou voltar amanhã, poderíamos estar fazendo uma promessa. O que é fazer uma asserção? C.S. Peirce argumentou que \"asseverar uma proposição é fazer-se responsável pela sua verdade\" (CP 5.543). O propósito do presente texto é interpretar a visão de Peirce sobre a asserção assim como examinar as razões que a suportam. Para cumprir esse propósito, primeiro reconstruo e examino o argumento que, em defesa da sua visão, Peirce propôs em (EP 2.140, 1903), (EP 2.312-313, 1904), e (CP 5.546, 1908). A continuação aponto para três aspetos constitutivos dessa visão, a saber, a asserção como um ato que envolve certa responsabilidade, a proposição como o que é asseverado, e a responsabilidade pela verdade como a responsabilidade de dar razões. Tendo em consideração esses três aspetos, passo a defender as seguintes teses: (1) Peirce concebeu a responsabilidade envolvida na asserção como uma responsabilidade moral. (2) Peirce pensou que as proposições são types. (3) Peirce interpretou responsabilidade de dar razões de modo dialógico. Para finalizar, apresento duas objeções à visão de Peirce sobre a asserção e as réplicas respetivas. Concluo que a visão de Peirce sobre a asserção é uma contribuição valiosa ao debate filosófico sobre a asserção.

Superstitious behavior is still a common occurrence in modern society, seemingly impervious to intellectual progress that humans have made throughout history. While the desire to maintain a sense of control over one's environment has been investigated as one of the key motivations behind superstitious behavior, it has yet to be examined within the context of the self-concept. Threats to one's sense of control can also be construed as general threats to one's global sense of self-worth. Consequently, while superstitious behavior may be triggered by control threats, it may also occur as a result of any general threat to self-integrity. Moreover, if superstitious behavior is motivated by the desire to maintain overall self-integrity, then depriving individuals of a chance to engage in superstitious behavior should elicit subsequent attempts to repair self-integrity via alternative means. Three studies were conducted in order to establish this link between self functioning and superstitious behavior. Studies 1a and 1b did not find any evidence that manipulating the self-concept prior to an event designed to evoke superstition would increase the desire to engage in superstitious behavior. Threatening (or boosting) one's self-esteem prior to a game of chance did not affect participant's desire to use a superstitious strategy (aura color). Study 2 provided evidence that superstitious behavior is motivated by a desire to maintain self-integrity by showing that individuals deprived of their aura color prior to a game of chance were more likely to engage in self-affirmation subsequently. It also showed that the impact of depriving individuals of a superstitious strategy is independent of belief in such strategy. / Study 2, however, did not find evidence that chronic self-esteem, self-esteem stability, or an individual's desire for control moderated this effect. Possible reasons for this lack of support for our hypotheses are discussed. / by Ryan M. Moyer. / Thesis (Ph.D.)--Florida Atlantic University, 2010. / Includes bibliography. / Electronic reproduction. Boca Raton, Fla., 2010. Mode of access: World Wide Web.

The present study was designed to investigate the effectiveness of two methods of goal specification in Assertion Training groups as assessed by two self-report measures, the Goal Attainment Scaling process and the Assertion Inventory. An Assertion Training group method having specific behavioral steps for approaching individualized goals was represented as the Therapist-Directed Assertion Training group. The second Assertion Training group was a Self-Directed group that allowed subjects to independently set and approach their own goals without the assistance of therapists in setting goals. Subjects were selected from among individuals who volunteered for the Assertion Training group in response to solicitation in general psychology classes, newspaper articles and circulars. Of the 76 subjects who filled out registration materials, 63 remained in the study, with 21 each assigned to the two treatment groups, and to a Waiting List Control group. While the Waiting List Control group participated in pre- and post-screening only, the Treatment groups underwent four weeks of group assertion training. The Self-Directed group was essentially encouraged to seek personally relevant goals, whereas the Therapist-Directed group members, with the help of a therapist, set up long- and short-range goals, which were monitored weekly by use of the Behavior Monitoring Progress Record. The level of assertion as assessed by the dependent measures appeared to be significantly enhanced by providing the Therapist-Directed group treatment or to a lesser extent by using the Self-Directed group method. The rationale for the study as well as the analysis of differences between groups are presented. Implications of the limitations and results of the present study are related to recommendations for future studies.

Au-delà de la formidable évolution en termes de complexité du circuit électronique en soi, son adoption et sa diffusion ont connu, au fil des dernières années, une explosion dans un très grand nombre de domaines distincts. Un système sur puce peut incorporer une combinaison de composants aux fonctionnalités très différentes. S'assurer du bon fonctionnement de chaque composant, et du système complet, est une tâche primordiale et épineuse. Dans ce contexte, l'Assertion-Based Verification (ABV) a considérablement gagné en popularité ces dernières années : il s'agit d'une démarche de vérification où des propriétés logico-temporelles, exprimées dans des langages tels que PSL ou SVA, spécifient le comportement attendu du design. Alors que la plupart des solutions d'ABV existantes se limitent au niveau transfert de registres (RTL), la contribution décrite dans cette thèse s'efforce de résoudre un certain nombre de limitations et vise ainsi une solution mature pour le niveau transactionnel (TLM) de SystemC. Une technique efficace de construction de moniteurs de surveillance à partir de propriétés PSL est proposée : cette technique, inspirée d'une approche originale existante pour le niveau RTL, est ici adaptée à SystemC TLM. Une méthode spécifique de surveillance des actions de communication à haut niveau d'abstraction est également détaillée. Les possibilités offertes par la technique présentée sont significativement étendues en proposant, pour les propriétés écrites en langage PSL, à la fois un support formel et une mise en oeuvre pratique pour des variables auxiliaires globales et locales, qui constituent un élément essentiel lors des spécifications à haut niveau d'abstraction. Tous ces concepts sont également implémentés dans un outil prototype. Afin d'illustrer l'intérêt de la solution proposée, diverses expérimentations sont effectuées avec des designs aux dimensions et complexités différentes. Les résultats obtenus permettent de souligner le fait que la méthode de vérification dynamique suggérée reste applicable pour des designs de taille réaliste.