It is essential to solve the problem due to password fatigue in order to increase the security of the transactions on the Web and secure the users’ account and information. Web Single Sign-On is one of the techniques that have been created to solve these issues. Unfortunately, this method creates new opportunities for hackers. The Liberty Alliance and OpenID are two of the most known Web Single Sign-On frameworks. This work intends to review the strengths and the weaknesses of both regarding their ability to protect the confidentiality, integrity and availability of the users’ information, by studying their aptitude to prevent some of the most dangerous attacks on the web. The analysis of the results shows that Liberty Alliance has created a strong infrastructure in order to mitigate those attacks. Consequently, this framework protects the confidentiality, integrity and availability of the users’ information more efficiently than OpenID. On the other hand, this latter shows significant weaknesses that compromises the confidentiality, integrity and availability of the users’ information.

Les blocs cryptographiques utilisés dans les circuits intégrés implémentent des algorithmes prouvés robustes contre la cryptanalyse. Toutefois des manipulations malveillantes contre le circuit lui-même peuvent permettre de retrouver les données secrètes. Entre autres, les attaques dites « en fautes » se sont révélés particulièrement efficaces. Leur principe consiste à injecter une faute dans le circuit (à l'aide d'un faisceau laser par exemple), ce qui produira un résultat erroné et à le comparer à un résultat correct. Il est donc essentiel de pouvoir détecter ces erreurs lors du fonctionnement du circuit.Les travaux de thèse présentées dans ce mémoire ont pour objet la détection concurrente d'erreurs dans les circuits cryptographique, en prenant comme support l'implantation du standard d'encryption symétrique l'Advanced Encryption standard « AES ». Nous analysons donc plusieurs schémas de détection d'erreur basés sur de la redondance d'information (code détecteur), certains issus de la littérature, d'autres originaux utilisant un double code de parité entrée-sortie permettant l'amélioration du taux de détection d'erreur dans ces circuits. Nous présentons aussi une étude montrant que le choix du type du code détecteur le plus approprié dépend, d'une part du type d'erreur exploitable pouvant être produite par un attaquant, et d'autre part du type d'implémentation du circuit à protéger. Les circuits cryptographiques sont également la cible d'autres attaques, et en particulier les attaques par analyse de consommation. Les contre mesures proposés jusqu'à lors pour un type d'attaques, se révèlent la plupart du temps néfastes sur la résistance du circuit face à d'autres types d'attaque. Nous proposons dans cette thèse une contre mesure conjointe qui protège le circuit à la fois contre les attaques en fautes et les attaques par analyse de consommation. / The cryptographic blocks used in the integrated circuits implement algorithms proved robust against cryptanalysis. However, malicious manipulation against the circuit itself can retrieve the secret data. Among known hardware attacks, attacks called "fault attacks" are proved particularly effective. Their principle is to inject a fault in the circuit (using for example a laser beam) that will produce an erroneous result and to compare it with a correct result. Therefore, it is essential to detect these errors during the circuit running.The work presented in this thesis concerns the concurrent detection of errors in cryptographic circuits, using as support the implementation of the Advanced Encryption Standard "AES". Thus, we analyze several error detection schemes based on the redundancy of information (detector code). We present a solution using dual code of parity to improve the rate of error detection in these circuits. We also present a study showing that the choice of the type of the detector code depends on one hand on the type of error that can be produced and be used by an attacker. On the other hand, it depends on type of the circuit implementation that we want to protect.The cryptographic circuits are also the target of further attacks, especially attacks by consumption analysis. The measures proposed against a type of attack, proved mostly negative against other types of attack. We propose in this work a joint measure that protects the circuit against both fault attacks and attacks by analysis of consumption.

La consommation des circuits intégrés n'a cessé d'augmenter cette dernière décennie. Avec l'augmentation du prix de l'énergie et la démocratisation des systèmes embarqués, des méthodes permettant de gérer le compromis consommation performance, comme la gestion dynamique de la fréquence et de la tension d'alimentation ou encore du potentiel de substrat, ont été élaborées. Ces méthodes, qui sont de plus en plus couramment mises en œuvre dans les systèmes intégrés, permettent de diminuer la consommation de ceux-ci, et mieux de gérer le compromis consommation performance. Certains de ces circuits, embarquant ces méthodes peuvent avoir à effectuer des opérations traitant des informations confidentielles. Il est donc nécessaire de s'interroger sur l'éventuel impact de ces sur la sécurité des systèmes intégrés. Dans ce contexte, les travaux de thèse reportés dans le présent document, ont eu pour objectif d'analyser la compatibilité de ces méthodes de gestion de la consommation avec la conception de circuits robustes aux attaques matérielles. Plus particulièrement, l'objectif a été de déterminer si ces techniques de conception faible consommation, constituent des obstacles réels ou bien facilitent les attaques matérielles par observation et perturbation exploitant le canal électromagnétique. Dans un premier temps, une étude sur l'efficacité des attaques par observation en présence de gestion aléatoire de la tension, de la fréquence et de la polarisation de substrat a été conduite. Dans un deuxième temps, l'impact de la gestion dynamique des tensions d'alimentation et de substrat sur la capacité à injecter des fautes par médium électromagnétique a été étudié. Ce document présente l'ensemble des résultats de ces analyses.Mots-clés : Attaques Matérielles, Attaques par Canaux Auxiliaires, Attaques par fautes, Canal électromagnétique, DVFS, Body-Biasing. / The consumption of integrated circuits has been increasing over the last decade. With the increase of energy prices and the democratization of embedded systems, methods to manage the consumption performance compromise, such as the dynamic management of the frequency and the supply voltage or the substrate potential, were developed. These methods, which are becoming more commonly implemented in integrated systems, allow to reduce the consumption of those latter, and to better manage the tradeoff between consumption and performance.Some of these circuits, embedding these methods, may have to perform some operations with confidential information. It is therefore necessary to consider the possible impact of these methods on the safety of the integrated systems. In this context, the work reported in this thesis aimed to analyze the compatibility of these methods of power management with the design of robust circuits to physical attacks.Specifically, the objective was to determine whether these low-power techniques constitute real obstacles or facilitate the attacks by observation or perturbation exploiting the electromagnetic channel. Initially, a study on the effectiveness of attacks by observation in the presence of random management of voltage, frequency and substrate polarization was done. Secondly, the impact of the dynamic management of supply voltages and substrate polarization on the ability to inject faults by electromagnetic medium was studied. This document presents the overall results of these analyzes. Keyword : Hardware Attacks, Side Channel Attacks, Faults Attacks, Electromagnetic canal, DVFS, Body-biasing

De nos jours, de plus en plus de circuits électroniques sont utilisés pour des usages critiques, tels le paiement ou l’identification. Ces circuits peuvent ainsi susciter l’intérêt de personnes malveillantes. Parmi toutes les méthodes permettant d’obtenir les clés de chiffrement, l’illumination du circuit à l'aide d'un laser est une des méthodes particulièrement efficace. Il est donc important de pouvoir prémunir les circuits sécurisés de ces attaques. Cependant, afin de tester la résistance du circuit face à l’injection laser, il est nécessaire de réaliser des injections sur celui-ci. Si le circuit ne correspond pas aux exigences sécuritaires, il est donc nécessaire de le modifier, ce qui induit un coût important en termes de temps de conception et de coût de fabrication. Afin de prédire l’effet de l’illumination laser et donc éviter ce surcoût, des simulateurs et des modèles électriques modélisant l’effet d’une illumination laser ont été développé.Dans un premier temps, nous décrivons le phénomène physique lié à l’injection laser (effet photoélectrique) qui conduit à la génération de faute dans le circuit. Puis nous donnons une description des premiers modèles électriques de simulation d’injection laser, utilisant des sources de courant afin de représenter l’effet de l’illumination dans le silicium.Ensuite, nous présentons une mise en pratique d’attaques sur un crypto processeur implémentant un AES 128. Cette expérience a permis de comparer les deux méthodes d’injections possibles avec un laser, l’injection par la face avant et par la face arrière. Il ressort de cette comparaison que la cible et le matériel d’injection à disposition sont un élément important dans le choix de la méthode d’injection. En effet, il est possible pour certains circuit d’obtenir plus de fautes exploitables (mono-bit ou mono-octet) en injectant par la face avant avec un faisceau large que par la face arrière avec un faisceau aussi large. Cet effet s’explique par un filtrage des lignes de métaux, présentes au-dessus du silicium, qui ont pour effet de réduire la zone de silicium illuminée.Nous nous intéressons ensuite à la validité des modèles électriques d’injection laser pour les technologies les plus récentes. Nous avons donc développé des nouveaux modèles sur les technologies bulk et CMOS Fully Depleted Silicon On Insulator (FDSOI). De par sa structure, le transistor CMOS FDSOI semble à priori plus résistant à l’injection laser que le transistor CMOS bulk. Cette observation est validée par l’expérience.Finalement, nous réalisons des injections sur un élément de mémorisation (chaîne de bascules DFF). Ces expériences ont montré que malgré la plus grande résistance d’une technologie CMOS FDSOI très récentes, il est possible d’injecter des fautes dans les bascules. Avec un faisceau laser d’un micromètre, pour cette bascule, il est même possible suivant la zone d’injection de choisir le type de faute injectée. Malgré le fait que l’injection soit toujours possible pour ces technologies, la technologie CMOS FDSOI est plus résistante car la différence entre le seuil énergétique d’injection de faute et de casse est plus faible et aussi par l’effet d’une « casse » lors de plusieurs injections successives.En conclusion, les travaux précédents ont permis de mettre à jour et de développer de nouveaux modèles électriques d’injection laser pour des technologies CMOS bulk et FDSOI très récentes et de comparer ces deux technologies face à l’injection laser. Il en ressort que malgré une injection de faute encore possible pour ces deux technologies, l’injection est plus difficile lorsque le circuit est implanté en technologie CMOS FDSOI. / Nowadays, more and more microelectronic circuits are used for critical purposes, such as payment or identification. Then those circuit sparked interest form attackers. Among the different ways to retrieve the cipher key, laser illumination is a very efficient one. Thereby, the protection of the circuit against these attacks becomes an important point for designers. However, to determine the resistance of a circuit against laser injection, laser illumination has to be performed. If the circuit do not match the security requirement, it has to be changed, which represent a large cost in terms of design time and fabrication cost. In order to predict the effect of a laser injection, electrical model and simulator have been developed.First, a description of the physical phenomenon (photoelectric effect), which leads to the fault injection in the circuit, is given. Then a description of the first electrical model developed using current sources to model the illumination effect.Then, a practical attack is performed on a crypto processor implanting the AES algorithm. This experimentation allows us to compare the two ways of laser injections, injection from the front side or the back side of the circuit. It comes out that the best way of injection depends on the circuit aimed and the laser bench at disposal of the attacker. Indeed, on the studied circuit, better exploitable fault can be injected, from the front side injection with a large laser spot than from the back side with the same laser spot size. This result can be explained by the effect of the metal lines above the circuit, which reduce the area of illuminated silicon.We discuss then about the validity of the electrical model for more recent technology nodes. Thus a new electrical model is developed for more recent CMOS bulk and Fully Depleted Silicon On Insulator (FDSOI) technologies. From its transistor structure, the CMOS FDSOI technology seems to be more resistant to laser injection than the CMOS bulk technology. This observation is confirmed by experimentation.Finally, we perform laser injection on a memory element (here a flip-flop chain). These experimentations show that even if the CMOS FDSOI technology seems to be more resistant, fault can be injected. With a one micro meter laser spot, the attacker can inject the wanted fault type in the flip-flop (bit set or bit reset) on 28nm CMOS bulk and FDSOI technologies. Even if, the fault injection is still possible, from the attacker point of view, fault injection is more difficult in a circuit using the CMOS 28nm FDSOI technology than the CMOS 28nm bulk one. Indeed, the gap between the fault injection threshold and the breaking threshold is narrower for the FDSOI than the bulk. Moreover, a breaking phenomenon has been observed in the FDSOI technology when multiple laser shot are performed in the same place.To conclude, the previous work allows updating and developed a new electrical model for the recent CMOS bulk and FDSOI technology under illumination, to compare those technologies against laser illumination. It comes out, that even if fault injection is possible for both technologies, the practical attack is more difficult to achieve on a CMOS FDSOI circuit.

"Elliptic Curve Cryptosystems (ECCs) are utilized as an alternative to traditional public-key cryptosystems, and are more suitable for resource limited environments due to smaller parameter size. In this dissertation we carry out a thorough investigation of side-channel attack aware ECC implementations over finite fields of prime characteristic including the recently introduced Edwards formulation of elliptic curves, which have built-in resiliency against simple side-channel attacks. We implement Joye's highly regular add-always scalar multiplication algorithm both with the Weierstrass and Edwards formulation of elliptic curves. We also propose a technique to apply non-adjacent form (NAF) scalar multiplication algorithm with side-channel security using the Edwards formulation. Our results show that the Edwards formulation allows increased area-time performance with projective coordinates. However, the Weierstrass formulation with affine coordinates results in the simplest architecture, and therefore has the best area-time performance as long as an efficient modular divider is available."

Magister Legum - LLM / This paper aimed at analysing what was South Africa's response to its international obligations regarding the 9/11 events and how does such response comply with the country's constitutional framework. This study gave a brief outline of the most significant legislative changes in a number of countries and then concentrate on the South African anti-terrorism legislation. It identified the provisions of the Act that have been discussed most controversial throughout the drafting process and analysed whether they comply with constitutional standards. Particular emphasis was laid on the possible differences between the South African Act and comparative legislation that derive directly from the apartheid history of the country. / South Africa

abstract: Mobile devices have penetrated into every aspect of modern world. For one thing, they are becoming ubiquitous in daily life. For the other thing, they are storing more and more data, including sensitive data. Therefore, security and privacy of mobile devices are indispensable. This dissertation consists of five parts: two authentication schemes, two attacks, and one countermeasure related to security and privacy of mobile devices. Specifically, in Chapter 1, I give an overview the challenges and existing solutions in these areas. In Chapter 2, a novel authentication scheme is presented, which is based on a user’s tapping or sliding on the touchscreen of a mobile device. In Chapter 3, I focus on mobile app fingerprinting and propose a method based on analyzing the power profiles of targeted mobile devices. In Chapter 4, I mainly explore a novel liveness detection method for face authentication on mobile devices. In Chapter 5, I investigate a novel keystroke inference attack on mobile devices based on user eye movements. In Chapter 6, a novel authentication scheme is proposed, based on detecting a user’s finger gesture through acoustic sensing. In Chapter 7, I discuss the future work. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2018

abstract: Cyber-systems and networks are the target of different types of cyber-threats and attacks, which are becoming more common, sophisticated, and damaging. Those attacks can vary in the way they are performed. However, there are similar strategies and tactics often used because they are time-proven to be effective. The motivations behind cyber-attacks play an important role in designating how attackers plan and proceed to achieve their goals. Generally, there are three categories of motivation are: political, economical, and socio-cultural motivations. These indicate that to defend against possible attacks in an enterprise environment, it is necessary to consider what makes such an enterprise environment a target. That said, we can understand what threats to consider and how to deploy the right defense system. In other words, detecting an attack depends on the defenders having a clear understanding of why they become targets and what possible attacks they should expect. For instance, attackers may preform Denial of Service (DoS), or even worse Distributed Denial of Service (DDoS), with intention to cause damage to targeted organizations and prevent legitimate users from accessing their services. However, in some cases, attackers are very skilled and try to hide in a system undetected for a long period of time with the incentive to steal and collect data rather than causing damages. Nowadays, not only the variety of attack types and the way they are launched are important. However, advancement in technology is another factor to consider. Over the last decades, we have experienced various new technologies. Obviously, in the beginning, new technologies will have their own limitations before they stand out. There are a number of related technical areas whose understanding is still less than satisfactory, and in which long-term research is needed. On the other hand, these new technologies can boost the advancement of deploying security solutions and countermeasures when they are carefully adapted. That said, Software Defined Networking i(SDN), its related security threats and solutions, and its adaption in enterprise environments bring us new chances to enhance our security solutions. To reach the optimal level of deploying SDN technology in enterprise environments, it is important to consider re-evaluating current deployed security solutions in traditional networks before deploying them to SDN-based infrastructures. Although DDoS attacks are a bit sinister, there are other types of cyber-threats that are very harmful, sophisticated, and intelligent. Thus, current security defense solutions to detect DDoS cannot detect them. These kinds of attacks are complex, persistent, and stealthy, also referred to Advanced Persistent Threats (APTs) which often leverage the bot control and remotely access valuable information. APT uses multiple stages to break into a network. APT is a sort of unseen, continuous and long-term penetrative network and attackers can bypass the existing security detection systems. It can modify and steal the sensitive data as well as specifically cause physical damage the target system. In this dissertation, two cyber-attack motivations are considered: sabotage, where the motive is the destruction; and information theft, where attackers aim to acquire invaluable information (customer info, business information, etc). I deal with two types of attacks (DDoS attacks and APT attacks) where DDoS attacks are classified under sabotage motivation category, and the APT attacks are classified under information theft motivation category. To detect and mitigate each of these attacks, I utilize the ease of programmability in SDN and its great platform for implementation, dynamic topology changes, decentralized network management, and ease of deploying security countermeasures. / Dissertation/Thesis / Doctoral Dissertation Computer Science 2018

Destructive events such as natural disasters and terrorist attacks occur not only in developing economies but also developed economies. Consequently, the response of these economies has been observed in case of both type of events. This dissertation is a collection of essays regarding natural disasters, terrorist attacks and the macroeconomy. Specifically, I examine the response of local labor markets that reflect a wide spectrum of economies, but also have a safety-net in the form of being part of a developed country in the aftermath of a violent tornado. Further, I explore the heterogeneity in the economies response to natural disasters and terrorist attacks. Additionally, I investigate the effects of terrorism on growth and its disaggregated value added components. The first chapter focuses on the effects of tornadoes on local labor markets. I examine the change in local labor markets caused by extreme tornadoes that occur in counties of the contiguous United States. I also investigate the effect these tornadoes have on neighboring counties and evaluate the labor market response in urban and rural counties separately as well. Using a generalized difference-in-difference approach on quarterly data spanning from 1975 to 2016, I find that counties experience persistently higher wages per worker two years following a violent tornado. The effects on urban county can be observed on employment, while the effect in the rural county is observed on wages per worker. Further, evaluating the response of labor markets by sectors reveals the industrial sectors that experience increased labor market activity. The second chapter evaluates the long-run effects of natural disasters and terrorist attacks on growth and the channels through which they affect growth. Using the conceptual framework of a Solow-Swan model I examine an unbalanced annual panel of 125 countries spanning from 1970 to 2015 and find that domestic terrorist attacks, floods, and storms have a similar negative effect on growth, while transnational terrorist attacks and earthquakes have no significant effect on growth. Examining the channels through which they affect growth brings to the forefront the differences between these different types of events. I find that domestic terrorist attacks lead to increased military expenditures in their wake, while floods lead to increased non-military expenditures in their aftermath. Reviewing the data by developed and emerging economies reveals that developed economies are better able to absorb the shock of terrorist attacks as well as natural disasters. I find that although emerging economies are able to absorb the shock of transnational and domestic terrorist attacks, they experience some adverse effects from floods and storms. The third chapter examines the path of GDP growth and its disaggregated industrial, service, and agricultural sector value added components in the aftermath of two types of terrorism - transnational and domestic terrorism. Using a panel VAR model on cross country annual data from 1970 to 2015 I find that fatalities caused by neither domestic nor transnational terrorist attacks lead to a significant change in GDP growth. Examining the disaggregated industrial, service, and agricultural sector components of GDP growth reveals that even disaggregated the value added components of GDP growth experience no adverse effects from the deaths caused by transnational and domestic terrorist attacks. I also distinguish the emerging economies from the entire sample to find that GDP growth in emerging economies experience no significant effects due to the casualties of transnational and domestic terrorist attacks.

<div> <div> <div> <p>Nowadays, the pace of coordinated cyber security crimes has become drastically more rapid, and network attacks have become more advanced and diversified. The explosive growth of network security threats poses serious challenges for building secure Cyber-based Systems (CBS). Existing studies have addressed a breadth of challenges related to detecting network attacks. However, there is still a lack of studies on the detection of sophisticated Multi-stage Attacks (MSAs). </p> <p>The objective of this dissertation is to address the challenges of modeling and detecting sophisticated network attacks, such as multiple interleaved MSAs. We present the interleaving concept and investigate how interleaving multiple MSAs can deceive intrusion detection systems. Using one of the important statistical machine learning (ML) techniques, Hidden Markov Models (HMM), we develop three architectures that take into account the stealth nature of the interleaving attacks, and that can detect and track the progress of these attacks. These architectures deploy a set of HMM templates of known attacks and exhibit varying performance and complexity. </p> <p>For performance evaluation, various metrics are proposed which include (1) attack risk probability, (2) detection error rate, and (3) the number of correctly detected stages. Extensive simulation experiments are conducted to demonstrate the efficacy of the proposed architecture in the presence of multiple multi-stage attack scenarios, and in the presence of false alerts with various rates. </p> </div> </div> </div>