591 |
Benchmarking a Custom List Data Type in Memcached against RedisRajbhandari, Prashish 28 June 2016 (has links)
No description available.
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592 |
Sampling of Dynamic Dependence Graphs for Data Locality AnalysisJhally, Gaganjit Singh 25 October 2016 (has links)
No description available.
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593 |
Dynamic Level-2 Cache Memory Locking by Utilizing Multiple Miss TablesMocniak, Andrew Louis 01 June 2016 (has links)
No description available.
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594 |
Adaptive Shared Cache Migration PolicyBien-aise, Hemsley 20 July 2010 (has links)
No description available.
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595 |
Energy-Efficient and High-Performance Nanophotonic Interconnects for Shared Memory MulticoresMorris, Randy W., Jr. 26 July 2012 (has links)
No description available.
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596 |
New techniques for efficiently discovering frequent patternsJin, Ruoming 01 August 2005 (has links)
No description available.
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597 |
ADVANCEMENT OF OPERATING SYSTEM TO MANAGE CRITICAL RESOURCES IN INCREASINGLY COMPLEX COMPUTER ARCHITECTUREDing, Xiaoning 28 September 2010 (has links)
No description available.
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598 |
A Global Address Space Approach to Automated Data Management for Parallel Quantum Monte Carlo ApplicationsTirukkovalur, Sravya 02 September 2011 (has links)
No description available.
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599 |
Robust Method to Deduce Cache and TLB CharacteristicsChandran, Varadharajan 12 September 2011 (has links)
No description available.
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600 |
Toward Next-generation Data Centers : Principles of Software-Defined “Hardware” Infrastructures and Resource DisaggregationRoozbeh, Amir January 2019 (has links)
The cloud is evolving due to additional demands introduced by new technological advancements and the wide movement toward digitalization. Therefore, next-generation data centers (DCs) and clouds are expected (and need) to become cheaper, more efficient, and capable of offering more predictable services. Aligned with this, we examine the concept of software-defined “hardware” infrastructures (SDHI) based on hardware resource disaggregation as one possible way of realizing next-generation DCs. We start with an overview of the functional architecture of a cloud based on SDHI. Following this, we discuss a series of use-cases and deployment scenarios enabled by SDHI and explore the role of each functional block of SDHI’s architecture, i.e., cloud infrastructure, cloud platforms, cloud execution environments, and applications. Next, we propose a framework to evaluate the impact of SDHI on techno-economic efficiency of DCs, specifically focusing on application profiling, hardware dimensioning, and total cost of ownership (TCO). Our study shows that combining resource disaggregation and software-defined capabilities makes DCs less expensive and easier to expand; hence they can rapidly follow the exponential demand growth. Additionally, we elaborate on technologies behind SDHI, its challenges, and its potential future directions. Finally, to identify a suitable memory management scheme for SDHI and show its advantages, we focus on the management of Last Level Cache (LLC) in currently available Intel processors. Aligned with this, we investigate how better management of LLC can provide higher performance, more predictable response time, and improved isolation between threads. More specifically, we take advantage of LLC’s non-uniform cache architecture (NUCA) in which the LLC is divided into “slices,” where access by the core to which it closer is faster than access to other slices. Based upon this, we introduce a new memory management scheme, called slice-aware memory management, which carefully maps the allocated memory to LLC slices based on their access time latency rather than the de facto scheme that maps them uniformly. Many applications can benefit from our memory management scheme with relatively small changes. As an example, we show the potential benefits that Key-Value Store (KVS) applications gain by utilizing our memory management scheme. Moreover, we discuss how this scheme could be used to provide explicit CPU slicing – which is one of the expectations of SDHI and hardware resource disaggregation. / <p>QC 20190415</p>
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