Conjugated polymers are promising candidates for applications in all kinds of organic optoelectronic devices: OLEDs, organic field-effect transistors (OFETs) and organic photovoltaic cells. The main goal of this work was to investigate transport features of photogenerated electrical charge in pi-conjugated polymers by means of novel technique based on time-resolved electric field-induced second harmonic generation (TREFISH). TREFISH measurement setup was implemented in the laboratory of Molecular compounds physics, and applicability of the method has been verified. Measurements were performed on three different model polymers: methyl substituted ladder-type poly(para-phenylene) (MeLPPP), poly(fluorene-co-benzothiadiazole) (F8BT) and poly(spirobifluorene-co-benzothiadiazole) (PSF-BT), having different morphological and chemical structure. It has been found that motion of photogenerated charge carriers in π-conjugated polymer films experiences rapid dynamics after excitation. Different time domains of charge transport were distinguished. Initial fast transport of photogenerated charge carriers corresponds to the carrier motion along the single polymer chain or conjugated segment of the polymer chain. Slowest carrier motion phase is well described by the stochastic drift, which is attributed to interchain jumps and determines the macroscopic equilibrium mobility. Thus, the equilibrium mobility value is not applicable to the transport on nanometer scale up to tens of nanometers... [to full text] / Konjuguotieji polimerai kaip funkcinės medžiagos gali būti panaudoti įvairiuose prietaisuose: organiniuose šviestukuose, organiniuose lauko tranzistoriuose, organiniuose saulės elementuose. Šio darbo tikslas - nustatyti fotogeneruotų krūvininkų pernašos dėsningumus π – konjuguotuose polimeruose panaudojant naują žadinimo-zondavimo metodą pagrįstą išoriniu elektriniu lauku indukuota antrosios optinės harmonikos generacija. Pagrindinis dėmesys buvo skiriamas pernašos dinamikai. Molekulinių darinių fizikos laboratorijoje buvo įrengta matavimų schema ir įvertintas metodo tinkamumas krūvio pernašos tyrimams. Buvo atlikti krūvio pernašos matavimai trijuose skirtinguose konjuguotuosiuose polimeruose. Nustatyta, kad fotogeneruotų krūvininkų judris tuoj po sužadinimo yra daug didesnis lyginant su stacionaria judrio verte, o krūvio pernašos dinamiką lemia konjuguoto polimero struktūrinė hierarchija, krūvininkų judėjimas yra daugialypis, susidedantis iš greito judėjimo viena polimero grandine ar konjuguotais polimero grandinės segmentais ir lėto šokavimo tarp atskirų polimero grandinių Pirmą kartą detaliai išnagrinėta šviesa sugeneruotų krūvininkų pernašos dinamika konjuguotuose polimeruose. Darbo rezultatai suteikia žinių apie fundamentalius krūvininkų pernašos mechanizmus konjuguotuose polimeruose, kurios gali būti panaudotos kuriant organinius elektronikos prietaisus.

Tato práce je zaměřena na studium vlastností organických polovodivých materiálů se zaměřením na jejich vodivost a pohyblivost nosičů náboje. Hlavním cílem této práce je objasnit vztah mezi chemickou strukturou organických polovodičů a jejich vlastnostmi. Teoretická část práce je zaměřena na základy organických polovodičů, transport náboje a přehled vlastností organických polovodivých materiálů, které vedly k jejich aplikaci v polních a elektrochemických tranzistorech. Experimentální část představuje přehled použitých materiálů, způsoby jejich přípravy a charakterizační metody. V rámci výsledkové části bylo vyvinuto nebo optimalizováno několik metod pro přípravu tenkých vrstev a následně byl studován jejich vliv na výkon organických polem řízených tranzistorů. Byly charakterizovány a diskutovány relevantní vlastnosti nových organických polovodivých materiálů se zaměřením na pohyblivost nosičů náboje. Byla charakterizována a diskutována biokompatibilita několika organických polovodičů. Elektrické vlastnosti, stabilita a biokompatibilita elektroaktivních polymerních inkoustů na bázi PEDOT:PSS byla charakterizována a diskutována s ohledem na jejich možné použití v bioelektronice. Nakonec byl zkonstruován organický bioelektronický senzor pro detekci fyziologické odpovědi kardiomyocytů na základě studovaných materiálů.

The low frequency noise of metal-semiconductor field-effect transistors (MESFETs) based on ZnO:Mg thin films grown by pulsed laser deposition on a-plane sapphire was investigated. In order to distinguish between noise generation in the bulk channel material, at the semiconductor surface, and at the gate/channel interface, ohmic ZnO channels without gate were investigated in detail, especially concerning the dependency of the noise on geometrical variations. The experiments suggest that the dominating 1/f noise in the frequency range below 1 kHz is generated within the bulk channel material, both for bare ZnO channels and MESFETs.

No description available.

Abstract Amorphous Selenium (a-Se) was first commercialized for use as a photoconductor in xerography during the middle of the twentieth century. Since then the hole transport properties of a-Se have been studied extensively, however the study of electron transport remains relatively limited. Flat panel digital X-ray detectors using a-Se as a photoconductor have been developed and are being used in mammographic screening. The charge transport properties of the photoconductor layer will in part determine the performance of the flat panel detector. X-ray absorption causes electron-hole pair generation in the bulk of the photoconductor, requiring both electrons and holes to drift across the sample and be collected. If these carriers are lost in the many localized trapping states as they cross the sample, they will not contribute to the image signal resulting in unnecessary radiation exposure to the patient. Eleven a-Se samples were deposited at the University of Saskatchewan varying in thickness from 13 μm to 501 μm. Pure a-Se was chosen to ensure uniformity across the thickness of the samples, that is, to ensure the composition of the film did not change across the thickness. Time of flight transient photoconductivity experiments (TOF) and interrupted field time of flight (IFTOF) measurements were performed to measure the electron drift mobility and lifetime respectively. The product of electron drift mobility μ and lifetime τ, hence the carrier range (μτ) at a given applied electric field. The electron range is an important parameter as this places limits on the practical thickness of the photoconducting layer in a detector. This study also includes an investigation into the effect of the definition of transit time on the calculated drift mobility and analysis of the dispersive transport properties of a-Se. It was observed that as sample thickness (L) increased, electron drift mobility (μ) decreased. In addition electron lifetime (τ) decreased dramatically in samples thinner than 50 μm. Electron range (μτ) was 2.26 × 〖10〗^(-6) cm^2/V in the 147μm sample and 5.46 × 〖10〗^(-8) cm^2/V in the 13 μm sample, a difference of almost two orders of magnitude. The comparison of the half current method and inflection point methods to calculate the transit time of the same TOF curve, shows that the calculated mobility can vary by as much as 24%. This illustrates clearly that it is important to use the same point on the TOF curve to define the transit time. Charge packet dispersion (spread) in the time domain in pure a-Se samples was proportional to L^m where L is the photoconductor thickness and m ~ 1.3, measured at both 1 V/μm and 4 V/μm.

Este trabalho apresenta o estudo do comportamento da mobilidade de portadores em transistores SOI nMOS e pMOS avançados planares e de porta tripla através de simulações tridimensionais e resultados experimentais. Devido à sua estrutura física, os transistores de porta tripla apresentam duas mobilidades, uma referente ao canal de condução na porta superior (orientação cristalográfica ) e uma referente ao canal de condução das portas laterais (orientação cristalográfica ). Inicialmente foi feito um estudo comparativo dos métodos de extração da mobilidade através de simulações numéricas tridimensionais dos dispositivos de porta tripla, tendo como objetivo analisar o comportamento dos diferentes métodos de extração da mobilidade efetiva de portadores e separação das mobilidades da porta superior e laterais, para fazer a escolha dos métodos mais adequados para aplicação nos resultados experimentais. De modo geral todos os métodos estudados sofrem maior influência com a redução do comprimento de canal devido aos efeitos da resistência série e de canal curto. Dentre os métodos estudados o que apresenta maior influência com a redução do comprimento de canal é o por gm,máx que apresentou maiores erros. E o método por Y-function apresentou o melhor comportamento com a redução do comprimento de canal, seguido pelo método Split C-V. Para os dispositivos com comprimento de canal acima de 0,5micro metros o maior erro encontrado foi de 13% para os métodos McLarty e Y-function. Neste caso os métodos por gm,máx e Split C-V apresentaram melhores resultados. Com relação à largura de canal os métodos por gm,máx e Split C-V tiveram os melhores resultados com a utilização de dispositivos de porta tripla. Foi observado que para dispositivos com Wfin maior que 0,7 micro metros os maiores erros encontrados foram de 11,2 % para o método Y-function e 10% para o método por gm,máx. No entanto, para dispositivos com Wfin menores que 0,7 micro metros os métodos Y-function e McLarty apresentaram os piores resultados chegando a quase 50% de erro para o dispositivo mais estreito (Wfin = 50nm). Quanto aos métodos de separação das mobilidades todos os métodos estudados apresentaram bons resultados e se mostraram eficientes mostrando um erro máximo de 11,3%. O que os diferencia é o grau de dificuldade de aplicação. Posteriormente foram realizadas medidas experimentais a fim de possibilitar o entendimento dos fenômenos físicos relacionados à mobilidade de portadores. Primeiramente foram analisados os dispositivos de porta tripla em temperatura ambiente e em baixa temperatura para dispositivos nMOS e pMOS. O estudo foi feito em dispositivos com diferentes comprimentos e larguras de canal a fim de analisar os efeitos das dimensões nesta tecnologia. Em seguida são apresentados os resultados para dispositivos SOI avançados planares em temperatura ambiente com variação da largura de canal e com aplicação de tensão no substrato, com objetivo de analisar o comportamento da mobilidade na primeira interface (óxido de porta/canal) e na segunda interface (óxido enterrado/canal). Esse estudo foi realizado com a aplicação de dois diferentes métodos de extração da mobilidade. Por fim foi feito um estudo de um novo método para extração da mobilidade de portadores chamado de magnetoresistência que consiste na aplicação de um campo magnético perpendicular ao fluxo de corrente do transistor. O uso do campo magnético altera a resistividade do canal, de onde é possível extrair a mobilidade. Foram apresentados os resultados com a utilização deste método para os dispositivos de porta tripla tipo nMOS com variação do comprimento de canal (90 a 910 nm) e da temperatura (200K a 77K). / This work presents a study of the carrier mobility behavior in planar and triple gate advanced SOI nMOS and pMOS transistors through three-dimensional simulations and experimental results. Due to its physical structure, the triple gate transistors presents two mobilities, one referring to the conduction channel on the top gate (crystallographic orientation ) and one referring to the conduction channel on the lateral gates (crystallographic orientation ). Initially, a comparative study of the mobility extraction methods through three-dimensional numerical simulations of the triple gate devices was made, with the purpose to analyze the behavior of different effective carrier mobility and separation of top and lateral gates mobilities extraction methods, to make the choice of the suitable methods for application in the experimental results. From a general way, all the studied methods suffer higher influence with channel length reduction due to short channel and the series resistance effects. Among the studied methods, the method by gm,max presents the higher influence with the channel length reduction that shows the bigger errors. The Y-function method presents the best behavior with the channel length reduction, followed by Split C-V method. For the devices with channel length above 0.5 mirco meters the highest error founded was 13% for McLarty and Y-function methods. In this case the gm,max and Split C-V methods presented the better results. With regard to the channel width the Split C-V and gm,max methods presented the better results with the use of triple gate devices. It was observed that for devices with Wfin higher than 0.7 mirco meters the highest errors founded were 11.2% for the Y-function method and 10% for gm,max method. Nevertheless, for devices with Wfin smaller than 0.7 micro meters the Yfunction and McLarty methods presented the worst results arriving almost 50% of error for the narrowest device (Wfin = 50nm). With regard to mobilities separation methods all the studied methods presented good results and had shown efficient showing a maximum error of 11.3%. The difference between them is the application difficulty level. After that, experimental measures were made in order to make possible the understanding of physical phenomena related to carrier mobility. Firstly, it was analyzed the triple gate devices at room and low temperatures for nMOS and pMOS devices. The study was done in devices with different channel lengths and widths in order to analyze the dimensions effects in this technology. After that it was present the results for planar advanced SOI devices at room temperature with variation of channel width and with the application of back gate voltage, with the purpose to analyze the behavior of the mobility in the first interface (gate oxide/channel) and second interface (buried oxide/channel). This study was done with the application of two different mobility extraction methods. Finally a study of a new mobility extraction method called magnetoresistance was made; this method consists in a perpendicular magnetic field application to transistor current flow. The uses of magnetic field change the channel resistivity, where it is possible to extract the mobility. It was presented results with the use of this method for triple gate nMOS devices with variation of channel length (90 a 910 nm) and temperature (200K to 77K).

Este trabalho apresenta o estudo do comportamento da mobilidade de portadores em transistores SOI nMOS e pMOS avançados planares e de porta tripla através de simulações tridimensionais e resultados experimentais. Devido à sua estrutura física, os transistores de porta tripla apresentam duas mobilidades, uma referente ao canal de condução na porta superior (orientação cristalográfica ) e uma referente ao canal de condução das portas laterais (orientação cristalográfica ). Inicialmente foi feito um estudo comparativo dos métodos de extração da mobilidade através de simulações numéricas tridimensionais dos dispositivos de porta tripla, tendo como objetivo analisar o comportamento dos diferentes métodos de extração da mobilidade efetiva de portadores e separação das mobilidades da porta superior e laterais, para fazer a escolha dos métodos mais adequados para aplicação nos resultados experimentais. De modo geral todos os métodos estudados sofrem maior influência com a redução do comprimento de canal devido aos efeitos da resistência série e de canal curto. Dentre os métodos estudados o que apresenta maior influência com a redução do comprimento de canal é o por gm,máx que apresentou maiores erros. E o método por Y-function apresentou o melhor comportamento com a redução do comprimento de canal, seguido pelo método Split C-V. Para os dispositivos com comprimento de canal acima de 0,5micro metros o maior erro encontrado foi de 13% para os métodos McLarty e Y-function. Neste caso os métodos por gm,máx e Split C-V apresentaram melhores resultados. Com relação à largura de canal os métodos por gm,máx e Split C-V tiveram os melhores resultados com a utilização de dispositivos de porta tripla. Foi observado que para dispositivos com Wfin maior que 0,7 micro metros os maiores erros encontrados foram de 11,2 % para o método Y-function e 10% para o método por gm,máx. No entanto, para dispositivos com Wfin menores que 0,7 micro metros os métodos Y-function e McLarty apresentaram os piores resultados chegando a quase 50% de erro para o dispositivo mais estreito (Wfin = 50nm). Quanto aos métodos de separação das mobilidades todos os métodos estudados apresentaram bons resultados e se mostraram eficientes mostrando um erro máximo de 11,3%. O que os diferencia é o grau de dificuldade de aplicação. Posteriormente foram realizadas medidas experimentais a fim de possibilitar o entendimento dos fenômenos físicos relacionados à mobilidade de portadores. Primeiramente foram analisados os dispositivos de porta tripla em temperatura ambiente e em baixa temperatura para dispositivos nMOS e pMOS. O estudo foi feito em dispositivos com diferentes comprimentos e larguras de canal a fim de analisar os efeitos das dimensões nesta tecnologia. Em seguida são apresentados os resultados para dispositivos SOI avançados planares em temperatura ambiente com variação da largura de canal e com aplicação de tensão no substrato, com objetivo de analisar o comportamento da mobilidade na primeira interface (óxido de porta/canal) e na segunda interface (óxido enterrado/canal). Esse estudo foi realizado com a aplicação de dois diferentes métodos de extração da mobilidade. Por fim foi feito um estudo de um novo método para extração da mobilidade de portadores chamado de magnetoresistência que consiste na aplicação de um campo magnético perpendicular ao fluxo de corrente do transistor. O uso do campo magnético altera a resistividade do canal, de onde é possível extrair a mobilidade. Foram apresentados os resultados com a utilização deste método para os dispositivos de porta tripla tipo nMOS com variação do comprimento de canal (90 a 910 nm) e da temperatura (200K a 77K). / This work presents a study of the carrier mobility behavior in planar and triple gate advanced SOI nMOS and pMOS transistors through three-dimensional simulations and experimental results. Due to its physical structure, the triple gate transistors presents two mobilities, one referring to the conduction channel on the top gate (crystallographic orientation ) and one referring to the conduction channel on the lateral gates (crystallographic orientation ). Initially, a comparative study of the mobility extraction methods through three-dimensional numerical simulations of the triple gate devices was made, with the purpose to analyze the behavior of different effective carrier mobility and separation of top and lateral gates mobilities extraction methods, to make the choice of the suitable methods for application in the experimental results. From a general way, all the studied methods suffer higher influence with channel length reduction due to short channel and the series resistance effects. Among the studied methods, the method by gm,max presents the higher influence with the channel length reduction that shows the bigger errors. The Y-function method presents the best behavior with the channel length reduction, followed by Split C-V method. For the devices with channel length above 0.5 mirco meters the highest error founded was 13% for McLarty and Y-function methods. In this case the gm,max and Split C-V methods presented the better results. With regard to the channel width the Split C-V and gm,max methods presented the better results with the use of triple gate devices. It was observed that for devices with Wfin higher than 0.7 mirco meters the highest errors founded were 11.2% for the Y-function method and 10% for gm,max method. Nevertheless, for devices with Wfin smaller than 0.7 micro meters the Yfunction and McLarty methods presented the worst results arriving almost 50% of error for the narrowest device (Wfin = 50nm). With regard to mobilities separation methods all the studied methods presented good results and had shown efficient showing a maximum error of 11.3%. The difference between them is the application difficulty level. After that, experimental measures were made in order to make possible the understanding of physical phenomena related to carrier mobility. Firstly, it was analyzed the triple gate devices at room and low temperatures for nMOS and pMOS devices. The study was done in devices with different channel lengths and widths in order to analyze the dimensions effects in this technology. After that it was present the results for planar advanced SOI devices at room temperature with variation of channel width and with the application of back gate voltage, with the purpose to analyze the behavior of the mobility in the first interface (gate oxide/channel) and second interface (buried oxide/channel). This study was done with the application of two different mobility extraction methods. Finally a study of a new mobility extraction method called magnetoresistance was made; this method consists in a perpendicular magnetic field application to transistor current flow. The uses of magnetic field change the channel resistivity, where it is possible to extract the mobility. It was presented results with the use of this method for triple gate nMOS devices with variation of channel length (90 a 910 nm) and temperature (200K to 77K).

No description available.

No description available.

Since the discovery of graphene, substantial effort has been put toward the synthesis and production of 2D materials. Developing scalable methods for the production of high-quality exfoliated nanosheets has proved a significant challenge. To date, the most promising scalable method for achieving these materials is through the liquid-based exfoliation (LBE) of nanosheetsin solvents. Thin films of nanosheets in dispersion can be modified with additives to produce 2D inks for printed electronics using inkjet printing. This is the most promising method for the deposition of such materials onto any substrate on an industrial production level. Although well-developed metallic and organic printed electronic inks exist on the market, there is still a need to improve or develop new inks based on semiconductor materials such as transition metal dichalcogenides (TMDs) that are stable, have good jetting conditions and deliver good printing quality.The inertness and mechanical properties of layered materials such as molybdenum disulfide (MoS2) make them ideally suited for printed electronics and solution processing. In addition,the high electron mobility of the layered semiconductors, make them a candidate to become a high-performance semiconductor material in printed electronics. Together, these features make MoS2 a simple and robust material with good semiconducting properties that is also suitable for solution coating and printing. It is also environmentally safe.The method described in this thesis could be easily employed to exfoliate many types of 2D materials in liquids. It consists of two exfoliation steps, one based on mechanical exfoliation of the bulk powder utilizing sand paper, and the other inthe liquid dispersion, using probe sonication to liquid-exfoliate the nanosheets. The dispersions, which were prepared in surfactant solution, were decanted, and the supernatant was collected and used for printing tests performed with a Dimatix inkjetprinter. The printing test shows that it is possible to use the MoS2 dispersion as a printed electronics inkjet ink and that optimization for specific printer and substrate combinations should be performed. There should also be advances in ink development, which would improve the drop formation and break-off at the inkjet printing nozzles, the ink jetting and, consequently, the printing quality. / Sedan upptäckten av grafen har mycket arbete lagts på framställning och produktion av 2D-material. En viktig uppgift har varit att ta fram skalbara metoder för produktion av högkvalitativa  nanosheets via exfoliering. Den mest lovande skalbarametoden hittills har varit vätskebaserad exfoliering av nanosheets i lösningsmedel. Tunna filmer av nanosheets i dispersion kan anpassas med hjälp av tillsatser och användas för tillverkning av halvledare strukturer med inkjet-skrivare, vilket är den mest lovande metoden för på en industriell produktions nivå beläggaden typen av material på substrat. Även om det finns välutvecklade metalliska och organiskabläck för tryckt elektronik, så finns det fortfarande ett behov av att förbättra eller utveckla nya bläck baserade på halvledarmaterial som t.ex. TMD, som är stabila, har goda bestryknings  egenskaper och ger bra tryckkvalitet. Den inerta naturen tillsammans med de mekaniska egenskaperna som finns hosskiktade material, som t.ex. molybdendisulfid (MoS2), gör demlämpliga för flexibel elektronik och bearbetning i lösning. Dessutom gör den höga elektronmobiliteten i dessa 2D-halvledaredem till en stark kandidat som halvledarmaterial inom trycktelektronik. Det betyder att MoS2 är ett enkelt och robust material med goda halvledaregenskaper som är lämpligt för bestrykning från lösning och tryck, och är miljömässigt säker.Den metod som beskrivs här kan med fördel användas föratt exfoliera alla typer av 2D-material i lösning. Exfolieringensker i två steg; först mekanisk exfoliering av torr bulk med sandpapper, därefter används ultraljudsbehandling i lösning för att exfoliera nanosheets. De dispersioner som framställts i lösning med surfaktanter dekanterades och det övre skiktetanvändes i trycktester med en Dimatix inkjet-skrivare.Tryckprovet visar att det är möjligt att använda MoS2 -dispersion som ett inkjet-bläck och att optimering för särskildaskrivar- och substratkombinationer borde göras, såsom förbättringav bläcksammansättningen med avseende på droppbildning och break-off vid skrivarmunstycket, vilket i sin tur skulleförbättra tryckkvaliteten. / KM2 / Paper Solar Cells