RC4 is one of the most widely used ciphers in practical software applications. In this thesis we examine security and design aspects of RC4. First we describe the functioning of RC4 and present previously published analyses. We then present a new cipher, Chameleon which uses a similar internal organization to RC4 but uses different methods. The remainder of the thesis uses ideas from both Chameleon and RC4 to develop design strategies for new ciphers. In particular, we develop a new cipher, RC4B, with the goal of greater security with an algorithm comparable in simplicity to RC4. We also present design strategies for ciphers and two new ciphers for 32-bit processors. Finally we present versions of Chameleon and RC4B that are implemented using playing-cards.

RC4 is one of the most widely used ciphers in practical software applications. In this thesis we examine security and design aspects of RC4. First we describe the functioning of RC4 and present previously published analyses. We then present a new cipher, Chameleon which uses a similar internal organization to RC4 but uses different methods. The remainder of the thesis uses ideas from both Chameleon and RC4 to develop design strategies for new ciphers. In particular, we develop a new cipher, RC4B, with the goal of greater security with an algorithm comparable in simplicity to RC4. We also present design strategies for ciphers and two new ciphers for 32-bit processors. Finally we present versions of Chameleon and RC4B that are implemented using playing-cards.

Thesis (M.Eng.)--University of Louisville, 2008. / Title and description from thesis home page (viewed September 12, 2008). Department of Computer Engineering and Computer Science. "July 2008." Includes bibliographical references (p. 56-58).

Anne Lister (1791-1840), a provincial gentlewoman of Shibden Hall, near Halifax in the West Riding of Yorkshire, produced between 1806 and her death a four-million-word diary documenting her daily life, intimate thoughts, ambitions, sexual and emotional adventures with women and her musings on the nature of her sexuality. About a sixth is written in cipher. Lister scholarship so far has focused mainly on the social and cultural implications of her writings. This thesis, however, examines the diary as a literary text and considers Lister's deployment of literary forms and structures, strategies and conventions in producing a sense of self. It explores her relationship to contemporary ideas of authorship and to notions of public and private, and investigates the impact of reading in the autobiographical writing of Lister and her circle and the significance of the cipher in her social and sexual self-representation. It asks whether her literary production helped accommodate her self-representation as a traditional country gentlewoman with her unconventional sexuality. The linking theme throughout the thesis, bringing together the many different aspects of Lister's self-fashioning, is the significance of literary considerations in her diary and letters. It begins the work of investigating the literary structures and strategies of her writings, and offers a fresh perspective on this remarkable work of literary self-construction.

The traditional model of cryptography examines the security of the cipher as a mathematical function. However, ciphers that are secure when specified as mathematical functions are not necessarily secure in real-world implementations. The physical implementations of ciphers can be extremely difficult to control and often leak socalled side-channel information. Side-channel cryptanalysis attacks have shown to be especially effective as a practical means for attacking implementations of cryptographic algorithms on simple hardware platforms, such as smart-cards. Adversaries can obtain sensitive information from side-channels, such as the timing of operations, power consumption and electromagnetic emissions. Some of the attack techniques require surprisingly little side-channel information to break some of the best known ciphers. In constrained devices, such as smart-cards, straightforward implementations of cryptographic algorithms can be broken with minimal work. Preventing these attacks has become an active and a challenging area of research. Power analysis is a successful cryptanalytic technique that extracts secret information from cryptographic devices by analysing the power consumed during their operation. A particularly dangerous class of power analysis, differential power analysis (DPA), relies on the correlation of power consumption measurements. It has been proposed that adding non-determinism to the execution of the cryptographic device would reduce the danger of these attacks. It has also been demonstrated that asynchronous logic has advantages for security-sensitive applications. This thesis investigates the security and performance advantages of using a network-based asynchronous architecture, in which the functional units of the datapath form a network. Non-deterministic execution is achieved by exploiting concurrent execution of instructions both with and without data-dependencies; and by forwarding register values between instructions with data-dependencies using randomised routing over the network. The executions of cryptographic algorithms on different architectural configurations are simulated, and the obtained power traces are subjected to DPA attacks. The results show that the proposed architecture introduces a level of non-determinism in the execution that significantly raises the threshold for DPA attacks to succeed. In addition, the performance analysis shows that the improved security does not degrade performance.

The National Institute of Standards and Technology (NIST) has initiated a process to develop a Federal information Processing Standard (FIPS) for the Advanced Encryption Standard (AES), specifying an Advanced Encryption Algorithm to replace the Data Encryption standard (DES) the Expired in 1998. NIST has solicited candidate algorithms for inclusion in AES, resulting in fifteen official candidate algorithms of which Rijndael was chosen as the Advanced Encryption Standard. The Advanced Encryption Standard can be programmed in software or built with pure hardware. However Field Programmable Gate Arrays (FPGAs) offer a quicker, more customizable solution. This research investigates the AES algorithm with regard to FPGA and the Very High Speed Integrated Circuit Hardware Description language (VHDL). Altera Max+plus II software is used for simulation and optimization of the synthesizable VHDL code. All the transformations of both Encryptions and Decryption are simulated using an iterative design approach in order to minimize the hardware consumption. Altera ACEX1K Family devices are utilized for hardware evaluation.

Η παρούσα εργασία περιλαµβάνει την µοντελοποίηση του block cipher αλγόριθµου κρυπτογραφίας Anubis σε γλώσσα VHDL, και την επαλήθευση λειτουργίας του επί πλακέτας FPGA. Ο αλγόριθµος Anubis ήταν µεταξύ των συµµετεχόντων αλγορίθµων στον ευρωπαϊκό διαγωνισµό NESSIE. Στο Κεφάλαιο 1 γίνεται µία σύντοµη παρουσίαση των βασικών όρων και εννοιών της κρυπτογραφίας, και παρουσιάζεται ο τρόπος λειτουργίας των σύγχρονων αλγορίθµων κρυπτογραφίας. Στο Κεφάλαιο 2 παρουσιάζεται ο αλγόριθµος Anubis και οι µαθηµατικές συνιστώσες των δύο λειτουργιών που τον απαρτίζουν: της λειτουργίας υπολογισµού της key sequence και της καθαυτό λειτουργίας κρυπτογράφησης/αποκρυπτογράφησης δεδοµένων. Στο Κεφάλαιο 3 παρουσιάζονται εν συντοµία τα υλικά και τα προγράµµατα που χρησιµοποιήθηκαν για την ανάπτυξη της παρούσας εργασίας. Στο Κεφάλαιο 4 αναλύεται η υλοποίηση του αλγορίθµου, µε την περιγραφή των δοµικών του στοιχείων, του υποσυστήµατος ελέγχου και χρονισµού, µε ιδιαίτερη έµφαση σε σηµεία όπου έγιναν ιδιαίτερες σχεδιαστικές επιλογές. Στο Κεφάλαιο 5 παρουσιάζεται η προσαρµογή και εφαρµογή του VHDL µοντέλου pου αναπτύχθηκε σε πλακέτα FPGA της οικογένειας Virtex-5, καθώς και οι µετρήσεις που ελήφθησαν σε αυτή. Το σύστηµα που σχεδιάστηκε αρχικά αφορά τον πλήρη αλγόριθµο, για όλο το δυνατό εύρος κλειδιών από 128 έως 320 bits και για είσοδο plaintext/ciphertext των 128 bits. Δεν περιλαµβάνονται στη σχεδίαση περιφερειακά συστήµατα όπως γεννήτρια κλειδιών ή µνήµες και µονάδες εισόδου/εξόδου. Έγινε µερική µόνο υλοποίηση των λειτουργιών αυτών µέσω ενός προγράµµατος wrapper ώστε να δοκιµαστεί η λειτουργία του επί του FPGA. Λόγω περιορισµών του FPGA που διετίθετο, η υλοποίηση που δοκιµάστηκε αφορούσε έκδοση των 256 bits. Σε αντίθεση µε άλλους, πιο διαδεδοµένους αλγόριθµους, ως τώρα δεν υπάρχει κάποια αντίστοιχη υλοποίηση για τον Anubis. Ως εκ τούτου συγκρίσεις για την απόδοσή του ως προς ταχύτητα ή κατανάλωση επιφανείας µπορούν να γίνουν µόνο µε τις software εκδοχές του και µε άλλους παρεµφερείς αλγόριθµους. / VHDL design and testing on FPGA of the Anubis block cipher.

The major challenges facing resource constraint wireless devices are error resilience, security and speed. Three joint schemes are presented in this research which could be broadly divided into error correction based and cipher based. The error correction based ciphers take advantage of the properties of LDPC codes and Nordstrom Robinson code. A cipher-based cryptosystem is also presented in this research. The complexity of this scheme is reduced compared to conventional schemes. The securities of the ciphers are analyzed against known-plaintext and chosen-plaintext attacks and are found to be secure. Randomization test was also conducted on these schemes and the results are presented. For the proof of concept, the schemes were implemented in software and hardware and these shows a reduction in hardware usage compared to conventional schemes. As a result, joint schemes for error correction and security provide security to the physical layer of wireless communication systems, a layer in the protocol stack where currently little or no security is implemented. In this physical layer security approach, the properties of powerful error correcting codes are exploited to deliver reliability to the intended parties, high security against eavesdroppers and efficiency in communication system. The notion of a highly secure and reliable physical layer has the potential to significantly change how communication system designers and users think of the physical layer since the error control codes employed in this work will have the dual roles of both reliability and security.

The aim of the research presented in this thesis is to investigate the use of various optimisation heuristics in the fields of automated cryptanalysis and automated cryptographic function generation. These techniques were found to provide a successful method of automated cryptanalysis of a variety of the classical ciphers. Also, they were found to enhance existing fast correlation attacks on certain stream ciphers. A previously proposed attack of the knapsack cipher is shown to be flawed due to the absence of a suitable solution evaluation mechanism. Finally, a new approach for finding highly nonlinear Boolean functions is introduced.

There is a enormous rise in importance of cryptography. In age of hi-technologies, where information are the most valuable asset, is need to protect this value. But we need to transport information between us and keep information confidental. In this case we use special modes of block cipher because of defect in communication canal. Not all modes are able to deal with this problem. For this purpose, there are special modes. This work deal with self-synchronization modes of block cipher. It is protection of tranfered information in communication canal against different types of defects. We will exam two self-synchronization modes - OCFB (Optimized Cipher FeedBack) and SCFB (Statistical Cipher FeedBack). Both have their advantages and disadvantages. The goal of this work is to provide analyse of both modes and to create simulation model. This model should help with further research of self-synchronization modes.