The benefits of the continued progress in integrated circuit manufacturing have been numerous, most notably in the explosion of computing power in devices ranging from cell phones to cars. Key to this success has been strategies to identify, manage, and mitigate yield loss. One such strategy is the use of test structures to identify sources of yield loss early in the development of a new manufacturing process. However, the aggressive scaling of feature dimensions, the integration of new materials, and the increase in structural complexity in modern technologies has challenged the capabilities of conventional test structures. To help address these challenges, a new logic test chip, called the Carnegie Mellon Logic Characterization Vehicle (CM-LCV), has been developed. The CM-LCV utilizes a two- dimensional array of functional unit blocks (FUBs) that each implement an innovative functionality. Properties including fault coverage, logical and physical design features, and fault distinguishability are shown to be composable within the FUB array; that is, they exist regardless of the size and composition of the FUB array. A synthesis ow that leverages this composability to adapt the FUB array to a wide range of test chip design requirements is presented. The connection between the innovative FUB functionality and orthogonal Latin squares is identified and used to analyze the universe of possible FUB functions. Two additional variants to the FUB array are also developed: heterogenous FUB arrays utilize multiple FUB functions to improve the synthesis ow performance, while pipelined FUB arrays incorporate sequential circuit elements (e.g., ip- ops and latches) that are absent from the original combinational FUB array. In addition to the design of the CM-LCV, methods for testing it are presented. Techniques to create minimal sets of test patterns that exhaustively exercise each FUB within the FUB array are developed. Additional constraints are described for the heterogenous and pipelined FUB arrays that allow these techniques to be applied for both variant FUB arrays. Furthermore, a simple built-in self test (BIST) scheme is described and applied to a reference design, resulting in a 88.0% reduction in the number of test cycles required without loss in fault coverage. A hierarchical FUB array diagnosis methodology (HFAD) is also presented for the CM- LCV that leverages its unique properties to improve performance for multiple defects. Experiments demonstrate that this HFAD methodology is capable of perfect accuracy in 93.1% of simulations with two injected faults, an improvement on the state-of-the-art commercial diagnosis. Additionally, silicon fail data was collected from a CM-LCV manufactured using a 14nm process by an industry partner. A comparison of the diagnosis results for the 1,375 fail logs examined shows that the HFAD methodology discovers additional defects during multiple defect diagnosis that the commercial tool misses for 40 of the diagnosed fail logs. Examination of these cases shows that the additional defects found by the HFAD methodology can result in improved diagnosis confidence and more precise descriptions of the defect behavior(s). The contributions of this dissertation can thus be summarized as the description of the design, test, and diagnosis of a new logic test chip for use in yield learning during process development. This CM-LCV can be adapted to meet a wide range of test chip requirements, can be efficiently and rigorously tested, and exhibits properties that can be used to improve diagnosis outcomes. All of these claims are validated through both simulated experiments and silicon data.

This work is an analysis of solutions to problems derived from inherent timing and signal integrity issues in the use and application of the IEEE 1149.1 Standard at the board level in conjunction with its test system. Setup or hold times violations may occur in a boundary scan chain using IEEE 1149.1 compliant devices. A practical study of the TDI-TDO scan data path has been conducted to show where problems may arise in relationship to a particular board topology and test system. This work points to differences between passing and failing scan path tests for problem characterization. Serial data flow is then analyzed and suitability is discussed. Within certain conditions, a solution is proposed. This work has been shown to work on the test system. Recommendations are made based on this experimental approach.

No description available.

The diploma thesis is focused on the innovation of partially user-unsuitable software which is used in the CVVOZE short-circuit laboratory for the evaluation of testing of switching and protection devices. The introductory part of the work presents a technical laboratory, which is used for research and development in the field of electrical devices with possibility of testing of short circuits and over-currents. At the first part of thesis, there is made a description of the technical laboratory. The following past is a chapter with basic introduction of tested devices and standard testing conditions of electrical devices in the laboratory. Then following a description of the original evaluation software is made and its shortcomings are pointed out. The practical part is devoted to the creating in LabVIEW, implementation and verification of the functionality of the new evaluation software.

No description available.

After decades of routine operation, the hydropower industry faces new challenges. Large-scale integration of other renewable sources of generation in the power system accentuates the role of hydropower as a regulating resource. At the same time, an extensive reinvestment programme has commenced where many old components and apparatus are being refurbished or replaced. Introduction of new technical solutions in existing power plants requires good systems knowledge and careful consideration. Important tools for research, development and analysis are suitable mathematical models, numerical simulation methods and laboratory equipment. This doctoral thesis is devoted to studies of the electromechanical interaction between hydropower units and the power system. The work encompasses development of mathematical models, empirical methods for system identification, as well as numerical and experimental studies of hydropower generator and power system interaction. Two generator modelling approaches are explored: one based on electromagnetic field theory and the finite element method, and one based on equivalent electric circuits. The finite element model is adapted for single-machine infinite-bus simulations by the addition of a network equivalent, a mechanical equation and a voltage regulator. Transient simulations using both finite element and equivalent circuit models indicate that the finite element model typically overestimates the synchronising and damping properties of the machine. Identification of model parameters is performed both numerically and experimentally. A complete set of equivalent circuit parameters is identified through finite element simulation of standard empirical test methods. Another machine model is identified experimentally through frequency response analysis. An extension to the well-known standstill frequency response (SSFR) test is explored, which involves measurement and analysis of damper winding quantities. The test is found to produce models that are suitable for transient power system analysis. Both experimental and numerical studies show that low resistance of the damper winding interpole connections are vital to achieve high attenuation of rotor angle oscillations. Hydropower generator and power system interaction is also studied experimentally during a full-scale startup test of the Nordic power system, where multiple synchronised data acquisition devices are used for measurement of both electrical and mechanical quantities. Observation of a subsynchronous power oscillation leads to an investigation of the torsional stability of hydropower units. In accordance with previous studies, hydropower units are found to be mechanically resilient to subsynchronous power oscillations. However, like any other generating unit, they are dependent on sufficient electrical and mechanical damping. Two experimentally obtained hydraulic damping coefficients for a large Francis turbine runner are presented in the thesis.

In the first part of the master’s thesis dealing with the increasing efficiency of induction motors there are briefly presented basic information about induction motors, followed by an overview of the losses of induction motors. The next part deals with the ways to increase efficiency of induction motors without increasing tooling costs. The practical part consists of four measurements of four induction motors, with their various mechanical adjustments to make comparing benefits of these modifications possible. The measured results are compared by a finite element method in Maxwell 2D Design program, in which the same motors are simulated as measured. Theoretical knowledge about the increase of efficiency is practically applied while being implemented in the simulations.

The master’s thesis Improvement power parameter of small induction motors deals with issues of lowering the losses of small induction motors. The first part introduces with design and principles of operation of induction motors. Also introduces to theoretical problematic of losses, their lowering and measuring. In the practical part there are results of the measuring the losses in the induction motor ATAS Elektromotory Náchod a.s. T22VT512 (71-0512). There are proposed methods of increasing the efficiency of induction motor due to measuring and their verification in the Maxwell software. The last part is dedicated to measuring the losses of prototype motor from ATAS and comparison of results with previous motor.