A motor drive consisting of two parallel voltage-sourced converters was developed and implemented. A parallel converter arrangement allows the system to be constructed in a modular fashion to gain economies of scale and redundancy. The converters are connected to common ac- and dc-buses without isolation and are controlled without inter-converter communication or a master/slave arrangement. The system was simulated and the results validated against an experimental setup. Both steady-state and dynamic load sharing were achieved through the use of drooped PI speed regulators. PI controllers were used to regulate the quadrature currents provided by each converter. Circulating 0-sequence current was regulated using P controllers. A linearized state-space model of the system was developed and an eigenvalue analysis was performed, showing system stability. Speed steps in simulation and in the laboratory demonstrated good response. The loss of one converter’s gating was emulated. The system continued to operate, showing an advantage of system redundancy.

A motor drive consisting of two parallel voltage-sourced converters was developed and implemented. A parallel converter arrangement allows the system to be constructed in a modular fashion to gain economies of scale and redundancy. The converters are connected to common ac- and dc-buses without isolation and are controlled without inter-converter communication or a master/slave arrangement. The system was simulated and the results validated against an experimental setup. Both steady-state and dynamic load sharing were achieved through the use of drooped PI speed regulators. PI controllers were used to regulate the quadrature currents provided by each converter. Circulating 0-sequence current was regulated using P controllers. A linearized state-space model of the system was developed and an eigenvalue analysis was performed, showing system stability. Speed steps in simulation and in the laboratory demonstrated good response. The loss of one converter’s gating was emulated. The system continued to operate, showing an advantage of system redundancy.

Thesis (M.S.)--University of Florida, 2005. / Title from title page of source document. Document formatted into pages; contains 74 pages. Includes vita. Includes bibliographical references.

Thesis (Ph. D.)--Oregon State University, 2010. / Printout. Includes bibliographical references (leaves 74-75). Also available on the World Wide Web.

Thesis (Ph. D.)--University of Texas at Austin, 2003. / Supervisor: Jacob Abraham and Shouli Yan. Vita. Includes bibliographical references. Available also from UMI Company.

This thesis is an ongoing project of Ericsson with collaboration of Blekinge Institute of Technology [BTH], and Linneaus University [LNU] to compare the functionality and performance of three controllers Polynomial Pole Placement, PID [Proportional Integral Derivative] and PD controller in third order. This paper presents the state space modeling approach of DC-DC Buck converter. The main aim of this thesis is, by considering the buck converter system of Ericsson BMR450 with the PID, POLYNOMIAL and PD controllers at feedback loop, thus running their Matlab file with their appropiate Simulink block diagram, and comparing the three controllers performance by verifying their appropiate output graphs. The third order controller design is complicated and response is slow. The second order design is easy and gives better responses than third order Polynomial, PID and PD controllers. / As per the results point of view, the polynomial performed well than PID and PD controllers. The simulations show that the polynomial controller reaches the reference voltage very well, were the PID and PD result does not differ very much while meeting with the required reference voltage. Thus we conclude that the Polynomial controller design and results were better than the PID and PD Controllers. If we compare both the second order [4] and third order controller methods, The second order controllers are easy in design and gives better responses than third order polynomial PID and PD controllers. / ERCS.MADHU KIRAN, D.NO: 1/1/131, B.C.COLONY, MUTHUKUR, NELLORE, ANDHRA PRADESH, INDIA. PIN - 524344. THOTA. Partha Saradhi, C/O CH SUVARNA RAJU D.NO: 4-5-47, VEGIVARI CHAVADI, KOTHA PETA, WARD NO:21, KOVVUR, WEST GODAVARI,ANDHRA PRADESH, INDIA PIN - 534350,

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Oversampling analog-to-digital and digital-to-analog converters are gaining more popularity in many signal processing applications. Delta-sigma modulators are used in practical applications of oversampling systems because of their apparent practical advantage over other oversampling converters in terms of insensitivity to the inevitable imperfection of the analog circuitry. In Δ∑ modulators, analog integrators are always very important components and are usually modeled as ideal in real applications. However, theoretical analysis shows that the integrator nonideality due to capacitor mismatching and finite op-amp gain cause large signal-to-noise ratio degradation. The primary disadvantages of the dual-quantization and cascade modulators are that they rely on the precise cancellation of terms derived from two separate circuits, one analog and one digital, and that there are added complexities on the digital sides. This thesis describes digital adaptive correction of nonidealities in dual-quantization and cascade modulators. The sources and effects of nonidealities in a first-order delta-sigma loop are analyzed. Simple correction schemes are presented, and theoretical SNR improvements are calculated and compared with simulation results. / Graduation date: 1993