The subject of the work is an introduction to the functions of the current mirrors and differential pairs. Consequently, understanding and simulated simple circuits composed of these circuits. The simulation results are in Chapter 5, which are also included diagrams of simulated circuits..

The subject of the work is an introduction to the functions of the current mirrors and differential pairs. Consequently, understanding and simulated simple circuits composed of these circuits. The simulation results are in Chapter 5, which are also included diagrams of simulated circuits..

Ce manuscrit porte sur l’analyse, les méthodes de conception et la recherche de nouvelles structures de sources de courant, en se focalisant principalement sur les miroirs de courant, source la plus élémentaire. Le dépassement des limites actuelles pour l’optimisation du compromis vitesse-précision-consommation est l’objectif majeur des travaux présentés.La première partie est consacrée à l’étude de l’origine de ces limites et dresse l’état de l'art des structures de miroir de courant CMOS. Sont ensuite étudiées plus en détails, les possibilités offertes par les miroirs à entrée active. Une des premières contributions de nos travaux de recherche a été de proposer un formalisme dédié à l’étude et à l’implémentation de ce type de miroir, suivi de propositions d’amélioration à coût minimum de la topologie classique.Le développement d’une nouvelle approche de conception utilisant un principe de rétroaction non-linéaire en mode courant constitue la contribution majeure de cette thèse. La rétroaction est implémentée grâce à un convoyeur de courant de seconde génération dédié, très faible consommation et conçu pour avoir un comportement volontairement non-linéaire. Couplée avec des techniques classiques de régulation cascode pour une copie en courant de haute-précision, cette topologie constitue une source de courant élémentaire compétitive pour la réalisation de systèmes à haut niveau de performance.L'approche est mise en œuvre puis validée par la conception, en technologie CMOS 180nm, de deux circuits dédiés à la génération des courants dans les puces de stimulation neurale. L’ensemble des résultats obtenus dans ces dernières études démontre, qu’il est possible de dépasser les limites actuelles du compromis vitesse-précision-consommation, en se basant sur la stratégie de conception et les nouvelles topologies de miroirs à entrée active proposées. / The work presented in this manuscript involves analysis, design methods and search for improved structures of current sources, with main focus on the current mirrors, the most elementary current source. The main objective of our research was to outperform the present limitations in terms of speed, power and accuracy that exists in CMOS current mirror design.In the first part of the manuscript, we investigate on the origin of these limitations and present a literature review of popular and recent advanced current mirror structures. Then follow a deeper analysis of active-input current mirror capabilities. The first scientific contributions were, the development of analytical tools dedicated to the implementation of the standard active-input topology, supported by two solutions for dynamic range and stability improvements at minimal costs.The proposition of a novel design approach, relying on a power-efficient speed boosting technique based on current-mode non-linear control loops, constitutes the major contribution of the work presented in this manuscript. The feedback circuit is implemented using a custom low-power current conveyor (CCII), built to be intentionally non-linear. Coupled with classical regulated cascode structures required for high-precision current copy, this enhanced active-input current mirror topology forms a new competitive elementary current source to the design of high-performance systems.The approach is validated and illustrated with the realization of two circuits in 180 nm CMOS technology. Cores of the circuits are two examples of output stages dedicated to neural stimulation chips. Finally, Results of the last studies have demonstrated that, thanks to the design strategy and the new active-input current mirror topologies proposed, it is actually possible to outperform the present limit of the speed-power-accuracy trade-off.

This master’s thesis deals with design of two channel digital to analog converter for automotive applications. In first part, different topologies of D/A converters and their properties are discussed, with focus on current steering topology. Second part deals with design of convertor topology and current steering application. In third part, all parts of designed convertor are described and simulations results are presented. The designed two channel D/A converter has differential current output with 11b resolution per channel.

Rapid growth in the field of communications industry has led to newer opportunities and challenges in the design of CMOS based monolithic integrated circuits. ASK modulators are a class of digital modulators which are known for their relative simplicity of implementation for low cost applications in the industrial and biomedical domains. This thesis presents a LC-based CMOS Amplitude Shift Keying (ASK) modulator scheme which demonstrates promising capability for radio frequency designs. This work describes the design and implementation of differential cross-coupled NMOS only LC power oscillator with ASK modulation to operate at 2.4 GHz frequency. In this work, 65nm CMOS process technology has been used for implementation. The work mainly focused on system parameters such as oscillation frequency, output signal power, power consumption and phase noise. The LC tank was created with a centre-tap on-chip differential spiral inductor and a Metal Insulator Metal (MIM) capacitor. The method of a current mirror with switching technique is employed for biasing the LC oscillator as well as ASK modulation output. The oscillator circuit has been optimised by using a simulation based approach to study the design and measurements to gain a greater insight into the performance of the ASK modulator. An output signal power of -1.59dBm at 2.30 GHz with a phase noise of -115.39dBc/Hz@1MHz and a power consumption of 5.92mW has been achieved at the layout level. Optimal ASK modulated output performance has been obtained for the data rate of up to around 40Mbits/s. In this thesis, simulation results have been presented for both the schematic and the layout levels.

This master thesis is about current operational amplifiers and mainly about their internal structures and possible modifications of these structures. The Current operational amplifier consists of several elementary blocks and these blocks are shortly described and used in internal structures of proposed operational amplifiers. Basic elementary blocks of the current operational amplifier are current mirror, diferentional amplifier, current source, transimpedation amplifier and additional elements of a circuit. In this thesis, several elementary structures of the operational amplifiers are introduced. Each amplifier passed through the analysis of the circuit in software MicroCap 9.0. In this software is done the simple DC analysis of the internal structure of the current operational amplifier in connection with a feedback. The solution was focused on bipolar and unipolar technology for each connection. I deal with a method of feedback connection to the operational amplifier and explore real characteristic of the appropriate amplifier in the designed feedback. In principle this design has important influence to the resulting properties of the circuit. Within the analysis of the circuits have been found, how each current operational amplifier works in a defined current range. Every type of surveyed amplifier is closely described, the internal structure is depicted and graph of current transmission of amplifier is shown. At the end of this thesis the amplifiers are compared and there are introduced their advantages and disadvantages.

The dissertation thesis deals with the synthesis and design of active frequency filters using current (CC) and voltage (VC) conveyors, or current active elements CMI (Current Mirror and Inverter), MCMI (Multi-output CMI) and PCA (Programmable Current Amplifier). As introduction, these active elements are described as suitable for the design of the circuits working in the voltage-, current,- ,and mixed-mode, or in pure current-mode speaking about the current active elements. The new frequency filter structures presented in this thesis using the above mentioned active elements were designed by the generalized autonomous circuit method, transformation cells and signal flow-graph theory. The generalized autonomous circuit method is based on full admittance network to which generalized active elements are connected. The described admittance networks can be used for other active elements. The next method is based on the transformation cells that subsequently are used for the design of synthetic elements with higher-order imittance. Original conditions for the design of such blocks are given that lead to maximal simplicity of the final structure with minimal number of passive and active elements. For effective usage of another method utilizing signal flow-graphs, new reduced graphs of chosen active elements are given. Their usage leads to direct function blocks synthesis with required properties. The functionality and behavior of chosen circuit solutions have been verified by analyses in simulation programs. The active elements were simulated by the universal current conveyor (UCC) or universal voltage conveyors (UVC) that were designed at the FEEC, BUT in cooperation with AMI Semiconductor Design Centre Brno with the CMOS 0.35 m technology. These active elements have been also used for the realization of chosen filter structures. The experimental measurements were performed in the in the frequency range 10 KHz to 100 MHz.