A circuit design of Fast Fourier Transform for DVB-H system is presented in this thesis. This circuit is based on SDF (single path delay feedback) pipeline architecture with radix-2 computation element. We propose a novel method of timing scheduling that can share one complex multiplier for couple of stage and promote the utilization of complex multiplier to 100%, so we can improve the implementation with radix-2 computation. The number of bits is carefully selected by system simulation to meetthe requirements of DVB-H system. In addition, a memory table permutation deletion method for memory scheduling, which can reduce the size of memory storing twiddle factors tables. The circuit is carried out by CMOS 0.18£gm 1P6M process with core area 2.08 x 2.076 mm2. In the gate level simulation, the output data rate of this circuit is above 50MHz, so the circuit can meet the requirement of DVB-H system.

京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第22069号 / 工博第4650号 / 新制||工||1725(附属図書館) / 京都大学大学院工学研究科電気工学専攻 / (主査)教授 引原 隆士, 教授 松尾 哲司, 准教授 三谷 友彦 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

Rapid advances in machine learning have made information analysis more efficient than ever before. However, to extract valuable information from trillion bytes of data for learning and decision-making, general-purpose computing systems or cloud infrastructures are often deployed to train a large-scale neural network, resulting in a colossal amount of resources in use while themselves exposing other significant security issues. Among potential approaches, the neuromorphic architecture, which is not only amenable to low-cost implementation, but can also deployed with in-memory computing strategy, has been recognized as important methods to accelerate machine intelligence applications. In this dissertation, theoretical and practical properties of a hybrid neural computing architecture are introduced, which utilizes a dynamic reservoir having the short-term memory to enable the historical learning capability with the potential to classify non-separable functions. The hybrid neural computing architecture integrates both spatial and temporal processing structures, sidestepping the limitations introduced by the vanishing gradient. To be specific, this is made possible through four critical features: (i) a feature extractor built based upon the in-memory computing strategy, (ii) a high-dimensional mapping with the Mackey-Glass neural activation, (iii) a delay-dynamic system with historical learning capability, and (iv) a unique learning mechanism by only updating readout weights. To support the integration of neuromorphic architecture and deep learning strategies, the first generation of delay-feedback reservoir network has been successfully fabricated in 2017, better yet, the spatial-temporal hybrid neural network with an improved delay-feedback reservoir network has been successfully fabricated in 2020. To demonstrate the effectiveness and performance across diverse machine intelligence applications, the introduced network structures are evaluated through (i) time series prediction, (ii) image classification, (iii) speech recognition, (iv) modulation symbol detection, (v) radio fingerprint identification, and (vi) clinical disease identification. / Doctor of Philosophy / Deep learning strategies are the cutting-edge of artificial intelligence, in which the artificial neural networks are trained to extract key features or finding similarities from raw sensory information. This is made possible through multiple processing layers with a colossal amount of neurons, in a similar way to humans. Deep learning strategies run on von Neumann computers are deployed worldwide. However, in today's data-driven society, the use of general-purpose computing systems and cloud infrastructures can no longer offer a timely response while themselves exposing other significant security issues. Arose with the introduction of neuromorphic architecture, application-specific integrated circuit chips have paved the way for machine intelligence applications in recently years. The major contributions in this dissertation include designing and fabricating a new class of hybrid neural computing architecture and implementing various deep learning strategies to diverse machine intelligence applications. The resulting hybrid neural computing architecture offers an alternative solution to accelerate the neural computations required for sophisticated machine intelligence applications with a simple system-level design, and therefore, opening the door to low-power system-on-chip design for future intelligence computing, what is more, providing prominent design solutions and performance improvements for internet of things applications.

Tato diplomová práce pojednává o stabilitě zpětně-vazebných řízení dynamických systémů s časovým zpozděním, speciálně řízení mechanických oscilátorů. Dva základní druhy řízení jsou užity v lineárních systémech. Dále je zde ukázána synchronizace dvouprvkových systémů užitím zpětně-vazebných řízení. Práce se také zabývá funkcí v MATLABu pro řešení zpožděných diferenciálních rovnic.

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