A utilização de conversores multiníveis tem sido uma importante alternativa para aplicações de alta potência e média tensão, graças aos altos níveis de potência alcançáveis por estas estruturas. Recentemente, esta topologia de conversores foi aplicada em sistemas com fontes alternativas para alimentar um sistema de geração distribuída, nos quais diferentes fontes de energia eram utilizadas. Com base nas características dos conversores multinível e sua potencial aplicabilidade em sistemas de geração distribuída, este trabalho tem como objetivo construir um sistema multinível conectado a rede de distribuição para utilização de fontes alternativas de energia como fontes primárias. Considerando que a energia fornecida pelas fontes alternativas pode sofrer variações, propõe-se a integração de sistemas armazenadores de energia, como capacitores, ao sistema multinível. Por isso, este trabalho desenvolve uma estratégia de controle para máxima transferência de potência ativa entregue à rede a fim de obter um fluxo ótimo. A topologia multinível deste trabalho possui em sua configuração dois módulos inversores conectados em série. Neste caso, é possível que pelo menos um desses inversores funcione com uma modulação em baixa frequência processando a maior parcela de potência. Assim, duas estratégias de controle modulação de fase e modulação de amplitude para a transferência de potência realizada pelo inversor de baixa frequência são analisadas. As vantagens e desvantagens de cada um dos métodos são expostas e então a estratégia mais adequada, no caso a modulação de amplitude, é utilizada na operação do conversor multinível. Além disso, são apresentados a modelagem das plantas e o projeto dos controladores de cada um dos módulos inversores. Por fim, a validação da proposta é feita através dos resultados de simulações e experimentais que mostram a capacidade do sistema de geração em transferir potência constante para a rede de distribuição e manter a corrente quase sem distorções em fase com a tensão. / The utilization of multilevel converters has been an important alternative for medium voltage applications with high power and power quality demand, thanks to the high power levels achievable for this kind of structure. Recently, this converter topology was proposed as a new possibility in renewable energy source applications, mainly in system delivering power to the grid, where different renewable energy resources may be used. Based on the characteristics of multilevel converters, and their potential applicability in distributed generation systems, this study aims to build a multilevel system that could be powered by renewable energy sources as primary sources and then connect them to a distribution grid. However, considering the energy produced by alternative sources can vary, it is analyzed the integration of a storage energy system in this multilevel topology. Taking into account this ends, the main concern of this study is related to the development of a control strategy to maximize the active power transferred to the grid. The multilevel topology employed in this study has two H-bridge inverter modules connected in series forming a cascaded configuration. Therefore, it is possible that at least one of these inverters, operating with a low frequency of modulation, process the majority of power with lower amount of losses. On this way, two control strategies for power transfer are analyzed. The advantages and disadvantages of each method are presented, and the most appropriated strategy is used in the operation of the multilevel converter system. In addition, it has been presented the design criteria for each controller and finally the validation of the proposed approach is done by mains of simulations and experimental results which show the ability of the converter to transfer constant active power to the grid and keep the grid current in phase with the grid voltage.

Submitted by Renata Lopes (renatasil82@gmail.com) on 2017-04-18T14:49:13Z No. of bitstreams: 1 igordiasnetodesouza.pdf: 13872772 bytes, checksum: 45517d7a6da7ae06ecacec6a7fb7ebd8 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2017-04-18T14:50:11Z (GMT) No. of bitstreams: 1 igordiasnetodesouza.pdf: 13872772 bytes, checksum: 45517d7a6da7ae06ecacec6a7fb7ebd8 (MD5) / Made available in DSpace on 2017-04-18T14:50:11Z (GMT). No. of bitstreams: 1 igordiasnetodesouza.pdf: 13872772 bytes, checksum: 45517d7a6da7ae06ecacec6a7fb7ebd8 (MD5) Previous issue date: 2017-02-17 / Esta dissertação apresenta um estudo de um conversor emulador de rede (CER) que faz parte de uma estrutura Power-Hardware-in-the-Loop (PHIL). O PHIL será futuramente utilizado para verificar os impactos causados pela integração de sistemas de geração fotovoltaico (PV) à rede elétrica, assim como a operação do sistema PV frente a distúrbios na rede. O CER, composto por um conversor fonte de tensão (VSC) de dois níveis e filtro de saída LC, é responsável por alimentar cargas isoladas emulando uma rede elétrica. A modelagem do conversor emulador de rede é feita no sistema de coordenadas estacionário (αβ0), fornecendo um sistema de equações diferenciais usado para descrever o comportamento dinâmico do sistema. O conversor é controlado no modo de tensão, através da estratégia de modulação vetorial. Duas malhas de controle em cascata são projetadas. A malha interna utiliza compensadores em avanço digitais para amortecer a ressonância do filtro LC sem a necessidade de uma realimentação interna de corrente. Já a externa utiliza controladores ressonantes digitais modificados para rejeitar distúrbios harmônicos e garantir a qualidade da forma de onda da tensão no ponto de acoplamento comum. Os controladores ressonantes são conectados em série e o projeto é baseado no amortecimento dos zeros. Resultados experimentais, obtidos com o protótipo de laboratório, cujos controladores foram implementados em um processador digital de sinais TMS320F28335 da Texas Instruments, são usados para validar as estratégias de controle propostas. / This dissertation presents a study on a grid-former converter (GFC) which is a part of a Power-Hardware-in-the-Loop (PHIL) structure. The PHIL will be used to verify the impacts caused by the integration of photovoltaic (PV) generation systems into grid, as well as to study the PV operation under grid disturbances. The GFC, composed by a two-level voltage source converter with a LC output filter, is responsible to feed isolated loads emulating an electrical grid. The modeling of the grid-former converter is done in the stationary frame (αβ0), providing a set of differential equations that describes the dynamical behavior of the system. The converter is controlled in voltage mode by means of the space vector modulation (SVM) strategy. Two control loops are designed to control the static converter. At the inner loop a novel discrete-time active damping technique is proposed in order to damp the filter resonance without the need of current feedback. The method is based on an inner feedback loop with digital lead compensator on the feedback path while the external loop uses a discretetime integrator and a modified digital resonant controller to guarantee a decreasing frequency response and ensure the quality of the voltage waveform at the point of common coupling, respectively. The resonant controllers are connected in series and the design is based on its zeros damping. Experimental results obtained with the prototype, which controllers were implemented in a Texas Instruments TMS320F28335 are used to validate the proposed control strategies.

Submitted by Renata Lopes (renatasil82@gmail.com) on 2017-04-24T19:07:44Z No. of bitstreams: 1 pedromachadodealmeida.pdf: 10367147 bytes, checksum: 04b7cf913c75cb9f82395bf7b9769825 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2017-04-25T15:25:19Z (GMT) No. of bitstreams: 1 pedromachadodealmeida.pdf: 10367147 bytes, checksum: 04b7cf913c75cb9f82395bf7b9769825 (MD5) / Made available in DSpace on 2017-04-25T15:25:19Z (GMT). No. of bitstreams: 1 pedromachadodealmeida.pdf: 10367147 bytes, checksum: 04b7cf913c75cb9f82395bf7b9769825 (MD5) Previous issue date: 2013-11-29 / CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / A presente tese contribui para a análise, modelagem e projeto de controladores discretos de um sistema de geração fotovoltaico de 30 kWp conectado à rede elétrica sem filtros passivos. O conversor fonte de tensão (VSC) de interface é interligado a rede elétrica usando somente as indutâncias de dispersão de um banco de transformadores monofásicos como filtros harmônicos. Modelos discretos são desenvolvidos tanto para o lado CC quanto para o lado CA do conversor. A modelagem do lado CA foi feita nos sistemas de coordenadas αβ0 e dq0. Já a modelagem da dinâmica do lado CC foi feita no sistema de coordenadas dq de acordo com balanço de potência entre os terminais do VSC. Baseado nos modelos obtidos, duas estratégias básicas foram investigadas e discutidas para projetar os compensadores discretos usados para controlar as correntes sintetizadas por um sistema de geração fotovoltaico no modo de corrente. Resultados experimentais mostram que o uso apenas de controladores lineares, proporcional–integral (PI) e proporcional–ressonante (PR), sintonizados na componente fundamental não é suficiente para manter a qualidade das correntes geradas dentro dos padrões internacionais, devido a operação não linear do transformador de conexão. Para contornar o problema anterior duas soluções foram investigadas: (i) inclusão de múltiplos controladores ressonantes nas coordenadas αβ; e (ii) inclusão de um controlador repetitivo em paralelo com o controlador PI nas coordenadas dq. Resultados experimentais mostraram que ambas estratégias são adequadas para compensar as componentes harmônicas. Finalmente, foi proposta uma estratégia para controlar o conversor durante faltas assimétricas (Fault–ride through) e eliminar as oscilações no barramento CC durante condições de desbalanço. O controlador proposto é composto por uma parcela PI e duas parcelas ressonantes, as quais controlam as componentes média e oscilante, através da injeção correntes de sequencia positiva e negativa na rede, respectivamente. Resultados de simulação mostram que o controlador proposto é adequado para eliminar as oscilações no barramento CC sem prejudicar as estabilidade do sistema. / The current thesis contributes to the analysis, modelling and design of discrete time controllers which aim is to control a 30 kWp photovoltaic dispersed generation system connected to the electric grid without passive filters. In fact, the interface voltage– sourced converter (VSC) is connected to the grid using only the leakage inductance of a single–phase transformer bank as harmonic filters. Initially, discrete time models are developed to the converter’s DC–side as well as to the AC–side. The AC–side modelling is performed on αβ0 and dq0 coordinate systems. On the other hand, the DC–side dynamics are modeled on the dq frame according to the power balance between the converter’s terminals. Based on the models obtained, strategies to control the converter in the current mode control on the αβ and dq are developed and a methodology to design the controllers are addressed in details. Experimental results shown that only the use of linear controllers, proportional–integral (PI) and proportional–resonant (PR), tuned on the fundamental component are not sufficient to guarantee the quality of the generated currents according to international standards. This is due to the operation of the connection transformer in a nonlinear region. In order to overcome this drawback, two solutions are taken into account: (i) inclusion of several parallel resonant controller in αβ frame; and (ii) inclusion of a repetitive controller in parallel with the PI controller in the dq frame. Experimental results shown that both strategies are suitable to compensate the harmonic components on the output current. Finally, a strategy is proposed to control the system under asymmetrical faults (fault–ride through) and to mitigate the voltage oscillation on the DC–side during unbalance conditions. The proposed controller is composed of a PI part and two resonant parts, which controls the average and the oscillating voltage components, through the injection of positive and negative sequence currents into the grid, respectively. Simulation results shown that the proposed controller is suitable to mitigate the DC–side voltage oscillations without jeopardizing the system stability.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This work presents contributions to the sinusoidal acceleration control of electrodynamic shakers applied in vibration testing. Considering the importance of sine tests to identify critical frequencies of operation and to determine mechanical weakness in the specified performance of specimens, vibration controllers are designed to reproduce the amplitude and the frequency of the reference acceleration specifically at the interface between the shaker and the structure under test. Two distinct approaches are considered to solve the control problem: time domain control, where the acceleration instantaneous value is adjusted to track the sinusoidal reference, and frequency domain control, in which only the amplitude or the root mean square value of the acceleration is compensated to follow the reference magnitude. The solutions developed based on these two different approaches are implemented in a digital control platform and experimentally evaluated. The development of vibration controllers is complemented by contributions to the study of the shaker dynamic model, as well as to the instrumentation applied to measure and feedback the acceleration and to the voltage control of switching-mode power amplifiers designed to drive the shaker. Regarding the vibration machine dynamic model, a method is proposed to experimentally identify the mechanical parameters of a two degrees of freedom system that represents the suspension resonance and the finite armature stiffness of the electrodynamic shaker. A procedure is developed to design and implement charge mode preamplifiers and signal conditioning circuits for piezoelectric accelerometers. A robust model reference adaptive algorithm is applied to control the output voltage of an industrial switching-mode power amplifier. The experimental analysis of the adaptive controller considers not only the improvements on the power amplifier performance, but also the of impact over the behavior of a commercial digital vibration control system. / Este trabalho apresenta contribuições ao controle de aceleração senoidal de vibradores eletrodinâmicos utilizados em ensaios de vibração. Considerando a importância de testes com aceleração senoidal para identificar freqüências críticas de operação e determinar a resistência de materiais e estruturas, são desenvolvidos controladores para a máquina de vibração com o propósito de garantir que a amplitude e a freqüência da aceleração imposta à estrutura sob teste correspondam aos valores de referência. Na solução do problema, admitem-se duas abordagens distintas: controle no domínio do tempo, onde o valor instantâneo da aceleração é ajustado para seguir a referência senoidal, e controle no domínio da freqüência, no qual apenas a amplitude ou o valor eficaz da aceleração é regulado conforme a magnitude de referência. As técnicas propostas com base nestas abordagens são implementadas numa plataforma de controle digital e avaliadas experimentalmente. O desenvolvimento dos controladores de vibrações é complementado por contribuições ao estudo do modelo dinâmico do vibrador, à instrumentação aplicada para realimentar a aceleração e ao controle da tensão de amplificadores de potência que utilizam inversores com modulação por largura de pulso para acionar a máquina. Com relação ao modelo do vibrador, é descrito um método que permite determinar experimentalmente os parâmetros mecânicos de um modelo com dois graus de liberdade, o qual representa o comportamento da máquina devido à suspensão e à rigidez finita da armadura. Um procedimento de projeto e realização prática de pré-amplificadores de carga e de um circuito de condicionamento para acelerômetros piezoelétricos é apresentado. Um algoritmo adaptativo robusto por modelo de referência é avaliado no controle da tensão de saída de um amplificador industrial projetado para excitar o enrolamento da armadura do vibrador. A análise experimental do impacto do controlador adaptativo é realizada considerando não apenas a melhoria no desempenho do amplificador, mas também em termos dos reflexos na performance de uma plataforma comercial de controle de ensaios de vibrações.

Kontrola řízení vozidla se stala významným problémem v automatizačních aplikacích v automobilovém průmyslu. Ta se stala reálnou díky zavedení různých "by-wire" subsystémů, jako je např. "steer-by-wire," "break-by-wire," atd. Tyto subsystémy reprezentují elektronické ekvivalenty již existujících mechanických a hydraulických subsystémů. Především pak může být zavedeno číslicové řízení, určené na základě vzorkování dynamiky vozidla. Výhodou periodického snímání vstupních veličin je vyvarování se určitých poruch spojitého řízení.

Digitální Fly-by-Wire systém je novým přístupem k řídícímu systému letadla, na jehož základě firma Honeywell - HTS CZ začala výzkumný projekt s názvem “Next Generation Distributed Fly-by-Wire System” a tato práce je jeho součástí. Řídící plochy letadla jsou řízeny dvěma nebo třemi elektrohydraulickými (či elektrickými) servy a každé servo je ovládáno nezávislou řídící jednotkou. Díky provozním tolerancím systému a drobným odchylkám vstupních dat v řídících jednotkách, dostává každé servo mírně odlišné povely a rozdíl v poloze serv vede k namáhání řídící plochy i k namáhání serv. Hlavním cílem této práce je navrhnout algoritmus, který bude eliminovat rozdíly mezi polohami jednotlivých serv, a tudíž sníží sílu, která namáhá řídící plochu, na přípustnou mez. Implementace řídícího systému letadla byla do detailu analyzována a algoritmus redukce síly na kontrolní ploše letadla byl navržen a implementován v prostředí Simulink. Iterační kriteriální ladící metoda byla vyvinuta a za účelem co nejlepšího nastavení algoritmu redukce síly. Práce také analyzuje vliv časových zpoždení na sběrnici na kvalitu algoritmu redukce síly.

With the rapid development of microprocessor and semiconductor technology, industry continues to update the requirements for power supplies. For telecommunication and computing system applications, power supplies require increasing current level while the supply voltage keeps decreasing. For example, the Intel's CPU core voltage decreased from 2 volt in 1999 to 1 volt in 2005 while the supply current increased from 20A in 1999 to up to 100A in 2005. As a result, low-voltage high-current high efficiency dc-dc converters with high power-density are demanded for state-of-the-art applications and also the future applications. Half-bridge dc-dc converter with current-doubler rectification is regarded as a good topology that is suitable for high-current low-voltage applications. There are three control schemes for half-bridge dc-dc converters and in order to provide a valid unified analog model for optimal compensator design, the analog state-space modeling and small signal modeling are studied in the dissertation and unified state-space and analog small signal model are derived. In addition, the digital control gains a lot of attentions due to its flexibility and re-programmability. In this dissertation, a unified digital small signal model for half-bridge dc-dc converter with current doubler rectifier is also developed and the digital compensator based on the derived model is implemented and verified by the experiments with the TI DSP chip. In addition, although current doubler rectifier is widely used in industry, the key issue is the current sharing between two inductors. The current imbalance is well studied and solved in non-isolated multi-phase buck converters, yet few discusse this issue in the current doubler rectification topology within academia and industry. This dissertation analyze the current sharing issue in comparison with multi-phase buck and one modified current doubler rectifier topology is proposed to achieve passive current sharing. The performance is evaluated with half bridge dc-dc converter; good current sharing is achieved without additional circuitry. Due to increasing demands for high-efficiency high-power-density low-voltage high current topologies for future applications, the thermal management is challenging. Since the secondary-side conduction loss dominates the overall power loss in low-voltage high-current isolated dc-dc converters, a novel current tripler rectification topology is proposed. Theoretical analysis, comparison and experimental results verify that the proposed rectification technique has good thermal management and well-distributed power dissipation, simplified magnetic design and low copper loss for inductors and transformer. That is due to the fact that the load current is better distributed in three inductors and the rms current in transformer windings is reduced. Another challenge in telecommunication and computing applications is fast transient response of the converter to the increasing slew-rate of load current change. For instance, from Intel's roadmap, it can be observed that the current slew rate of the age regulator has dramatically increased from 25A/uS in 1999 to 400A/us in 2005. One of the solutions to achieve fast transient response is secondary-side control technique to eliminate the delay of optocoupler to increase the system bandwidth. Active-clamp half bridge dc-dc converter with secondary-side control is presented and one industry standard 16th prototype is built and tested; good efficiency and transient response are shown in the experimental section. However, one key issue for implementation of secondary-side control is start-up. A new zero-voltage-switching buck-flyback isolated dc-dc converter with synchronous rectification is proposed, and it is only suitable for start-up circuit for secondary-side controlled converter, but also for house-keeping power supplies and standalone power supplies requiring multi-outputs.

Recent research activities focused on improving the steady-state as well as the dynamic behavior of DC-DC converters for proper system performance, by proposing different design methods and control approaches with growing tendency to using digital implementation over analog practices. Because of the rapid advancement in semiconductors and microprocessor industry, digital control grew in popularity among PWM converters and is taking over analog techniques due to availability of fast speed microprocessors, flexibility and immunity to noise and environmental variations. Furthermore, increased interest in Field Programmable Gate Arrays (FPGA) makes it a convenient design platform for digitally controlled converters. The objective of this research is to propose new digital control schemes, aiming to improve the steady-state and transient responses of a high switching frequency FPGA-based digitally controlled DC-DC converters. The target is to achieve enhanced performance in terms of tight regulation with minimum power consumption and high efficiency at steady-state, as well as shorter settling time with optimal over- and undershoots during transients. The main task is to develop new and innovative digital PWM techniques in order to achieve: 1. Tight regulation at steady-state: by proposing high resolution DPWM architecture, based on Digital Clock Management (DCM) resources available on FPGA boards. The proposed architecture Window-Masked Segmented Digital Clock Manager-FPGA based Digital Pulse Width Modulator Technique, is designed to achieve high resolution operating at high switching frequencies with minimum power consumption. 2. Enhanced dynamic response: by applying a shift to the basic saw-tooth DPWM signal, in order to benefit from the best linearity and simplest architecture offered by the conventional counter-comparator DPWM. This proposed control scheme will help the compensator reach the steady-state value faster. Dynamically Shifted Ramp Digital Control Technique for Improved Transient Response in DC-DC Converters, is projected to enhance the transient response by dynamically controlling the ramp signal of the DPWM unit.

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