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1	High Speed On-Chip Measurment Circuit / Inbyggd krets för höghastighetsmätning på chip Stridfelt, Arvid January 2005 (has links) <p>This master thesis describes a design exploration of a circuit capable of measuring high speed signals without adding significant capacitive load to the measuring node. </p><p>It is designed in a 0.13 CMOS process with a supply voltage of 1.2 Volt. The circuit is a master and slave, track-and-hold architecture incorporated with a capacitive voltage divider and a NMOS source follower as input buffer to protect the measuring node and increase the input voltage range. </p><p>This thesis presents the implementation process and the theory needed to understand the design decisions and consideration throughout the design. The results are based on transistor level simulations performed in Cadence Spectre. </p><p>The results show that it is possible to observe the analog behaviour of a high speed signal by down converting it to a lower frequency that can be brought off-chip. The trade off between capacitive load added to the measuring node and input bandwidth of the measurment circuit is also presented.</p> Electronics CMOS 0.13 sampling periodic sampling digital oscilloscope time equivalent sampling track and hold master and slave sampling clock generator voltagedivider source follower sampling switch transmission gate RLC-line Elektronik Electronics Elektronik
2	High Speed On-Chip Measurment Circuit / Inbyggd krets för höghastighetsmätning på chip Stridfelt, Arvid January 2005 (has links) This master thesis describes a design exploration of a circuit capable of measuring high speed signals without adding significant capacitive load to the measuring node. It is designed in a 0.13 CMOS process with a supply voltage of 1.2 Volt. The circuit is a master and slave, track-and-hold architecture incorporated with a capacitive voltage divider and a NMOS source follower as input buffer to protect the measuring node and increase the input voltage range. This thesis presents the implementation process and the theory needed to understand the design decisions and consideration throughout the design. The results are based on transistor level simulations performed in Cadence Spectre. The results show that it is possible to observe the analog behaviour of a high speed signal by down converting it to a lower frequency that can be brought off-chip. The trade off between capacitive load added to the measuring node and input bandwidth of the measurment circuit is also presented. Electronics CMOS 0.13 sampling periodic sampling digital oscilloscope time equivalent sampling track and hold master and slave sampling clock generator voltagedivider source follower sampling switch transmission gate RLC-line Elektronik Electronics Elektronik
3	Modul osciloskopu s bezdrátovým přenosem dat / Oscilloscope module with wireless data transmission Kočík, Karol January 2015 (has links) The aim of the thesis is the design and realization of the oscilloscope module with wireless data transfer. One part of the thesis is a short overview of the different types of AD converters. The main part is focused on the hardware configuration that allows modification of the wireless module of the oscilloscope, and the possibility of using in the industrial zone. The design takes into account reducing of consumption and EMC compatibility.

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