Orientadores: Rafael Santos Mendes, Ricardo Goldemberg / Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-18T23:37:16Z (GMT). No. of bitstreams: 1 Oliveira_LuisCarlosde_D.pdf: 5521873 bytes, checksum: 20aeecff279d6a276f652e26512c7903 (MD5) Previous issue date: 2011 / Resumo: Este trabalho aplica a técnica do guia de ondas digital ("Digital Waveguide") na síntese de instrumentos de sopro da família das madeiras, em particular, da clarineta. Esta técnica foi desenvolvida na década de 1980 e, desde então, tem sido utilizada em síntese de instrumentosmusicais por modelagem física. A técnica consiste, grosso modo, no processo de discretização da solução por ondas viajantes da Equação da Onda. Este procedimento permite obter uma estrutura de filtros digitais que simula a propagação da onda sonora para a direita e para a esquerda com velocidade de propagação equivalente à velocidade do som, c. No entanto, nos resultados de modelagem física publicados, constatou-se a ausência da velocidade de escoamento do ar, u. A contribuição deste trabalho consiste em reelaborar a estrutura de filtros digitais de modo a contemplar a velocidade de escoamento do fluido. A fundamentação teórica estabelece que para um meio de propagação sonora em movimento as velocidades de propagação para a direita é c + u e para a esquerda é c ? u. Propõe-se então, uma estratificação do tubo da clarineta em camadas divididas por mesma área ou mesma largura de modo a verificar a influência do perfil de velocidades na síntese sonora. Foi observado que a inclusão do escoamento implica uma "distorção" na curva da pressão interna do tubo, o que aproxima essa forma dos resultados experimentais / Abstract: This study aims to apply the technique of Digital Waveguide in synthesis of woodwind instruments, particularly the clarinet. This technique was developed in the mid-80 and since then, has application in the synthesis of musical instruments by physical modeling. It consists, roughly, in the process of discretization of the traveling wave solution of the Wave Equation. This leads to a digital filter structure that simulates the propagation of sound waves to the right and left with the speed of sound propagation, c. However, in the published results of physical modeling, the air flow velocity, u, was not included. The contribution of this work is to redesign the structure of digital filters in order to contemplate the velocity of the fluid. The theoretical framework provides that in a medium in motion the velocities of propagation to the right is c + u and to the left is c ? u. It is proposed then a stratification of the tube of the clarinet in layers divided by the same area or same width in order to verify the influence of velocity profile in the synthesized sound. It was observed that the inclusion of flow provides a "distortion" in the internal pressure of the tube. It sets resemblance to experimental results / Doutorado / Engenharia de Computação / Doutor em Engenharia Elétrica

Orientadores: João Marcos Travassos Romano, Romis Ribeiro de Faissol Attux / Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-19T00:40:42Z (GMT). No. of bitstreams: 1 SousaJunior_Celsode_D.pdf: 2582555 bytes, checksum: 4c20b08e97e42d51ea143f7651c91af4 (MD5) Previous issue date: 2011 / Resumo: O problema de equalização adaptativa se vincula à busca por soluções iterativas que permitam reduzir ou eliminar os efeitos nocivos do canal de comunicação sobre um sinal transmitido de interesse. Uma vez que os sistemas adaptativos se baseiam em algoritmos capazes de ajustar os parâmetros de um filtro, pode-se considerar o conjunto equalizador / algoritmo adaptativo como um sistema dinâmico, o que termina por relacionar a possibilidade de obter uma solução satisfatória à noção de convergência. A análise de convergência de algoritmos de equalização adaptativa se desenvolveu, tipicamente, considerando algumas hipóteses para viabilizar o tratamento matemático, mas nem sempre tais hipóteses são estritamente válidas. Um exemplo clássico nesse sentido é o uso da teoria da independência. Neste trabalho, buscamos uma abordagem distinta do estudo das condições de estabilidade de algoritmos de equalização clássica baseada na teoria de Lyapunov. Essa teoria é geralmente utilizada no estudo de sistemas não-lineares, e apresenta um amplo histórico de resultados sólidos na área de controle adaptativo. Isso motiva o uso no campo de processamento de sinais. A primeira contribuição deste trabalho consiste em determinar, por meio da teoria de Lyapunov, a faixa de valores de passo de adaptação que garantem estabilidade do sistema de equalização para algoritmos baseados no critério deWiener e para o algoritmo do módulo constante. A partir dos resultados para estabilidade, investigar-se-á também a região de convergência para os pesos do algoritmo LMS, o que trará uma produtiva relação com a idéia de misadjustment. Como segunda linha de contribuição, será apresentada uma análise de um limitante inferior para o custo atingível e uma proposta de inicialização capaz de aumentar a probabilidade de convergência para o melhor ótimo gerado pelo critério para o algoritmo do módulo constante. Essa estratégia se baseia numa formulação do critério não-supervisionado de filtragem linear em termos da aplicação do critério de Wiener a uma estrutura polinomial. Os resultados obtidos revelam que a idéia é capaz de levar a um desempenho melhor que os do clássico método center spike e de uma estratégia de inicialização aleatória / Abstract: The problem of adaptive equalization is related to the search for iterative solutions that allow the reduction or the elimination of the noxious effects of a communication channel on a transmitted signal of interest. Since adaptive systems are based on algorithms capable of adjusting the parameters of a filter, the combination between equalizer and learning algorithm can be considered to form a dynamical system, which relates the possibility of obtaining a satisfactory solution to the convergence issue. The analysis of the convergence of adaptive equalization algorithms was developed, typically, considering certain simplifying hypotheses that, however, are not always strictly valid. A classical example that illustrates this assertion is the use of the so-called independence theory. In this work, it has been investigated a distinct approach to the study of stability conditions of classical methods based on Lyapunov theory. This theory is generally employed in the study of nonlinear systems, and presents a significant framework of sound results in the field of adaptive control, which motivates its use in the context of signal processing. The first contribution of this work consists of determining, by means of Lyapunov theory, the range of step-size values that ensure stability of the equalization system for algorithms based on the Wiener criterion and for the constant modulus algorithm. Using the obtained stability results, the convergence region for the parameters estimated via LMS is also investigated, which establishes an interesting connection with the notion of misadjustment. In a second line of study, we present an analysis of the lower bound for the attainable CM cost and an initialization heuristic capable of increasing the probability of convergence to the best optimum engendered by the constant modulus criterion. This strategy is based on a formulation of the unsupervised linear filtering criterion in terms of the application of the Wiener criterion to a polynomial structure. The obtained results reveal that the proposal is able to effectively lead to a performance level that is better than that achieved using the classical center spike method and a random approach / Doutorado / Telecomunicações e Telemática / Doutor em Engenharia Elétrica

Orientador: Luís Geraldo Pedroso Meloni / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-19T10:05:51Z (GMT). No. of bitstreams: 1 Braga_ViniciusJoseAndrade_M.pdf: 1600550 bytes, checksum: 9a8740df6ec6525126cc7f55fca3b881 (MD5) Previous issue date: 2011 / Resumo: Este trabalho descreve o desenvolvimento de um decodificador de áudio embarcado em um Digital Signal Processor (DSP)de acordo com o padrão High Efficiency AAC version 2(HE-AAC v2) do MPEG-4. Essa atividade é parte integrante do projeto Rede H.264 que tem por objetivo o desenvolvimento de tecnologias nacionais para ser integrado ao padrão brasileiro de TV digital, o Integrated Services Digital Broadcasting-Terrestrial Brazilian version(ISDB-Tb). Também apresenta um estudo sobre diversas técnicas de otimização para processamento em tempo real na busca de se obter o melhor desempenho da arquitetura utilizada. Como resultado final deste trabalho, chegou-se a um decodificador embarcado em tempo real, otimizado com as técnicas descritas e compatível com o ISDB-TB / Abstract: This work describes the development of an embedded audio decoder in a Digital Signal Processor (DSP) according to the standard High Efficiency AAC v2 (HE-AAC v2) of MPEG-4. This activity is part of the Rede H.264 project which has objective the development of national technologies to be integrated in the Brazilian Digital TV standard, the Integrated Services Digital Broadcasting-Terrestrial Brazilian version (ISDB-Tb). It also presents a study of various optimization techniques for real-time processing in the quest to get the best performance of the architecture used. As final result of this work a real-time embedded decoder was achieved, optimized with the techniques described and compatible with the ISDB-Tb / Mestrado / Telecomunicações e Telemática / Mestre em Engenharia Elétrica

Orientador: Luís Geraldo Pedroso Meloni / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-19T09:59:52Z (GMT). No. of bitstreams: 1 Sousa_EriclesRodrigues_M.pdf: 2046025 bytes, checksum: 14fd32eefec8c8da68e3337d5e033567 (MD5) Previous issue date: 2011 / Resumo: Atualmente, aplicações multimídias exigem grande esforço computacional para manipular dados com elevadas taxas de precisão. Visando otimizar a capacidade de processamento sem elevar demasiadamente o custo do desenvolvimento em sistemas embarcados, este trabalho descreve a proposta de uma arquitetura computacional hibrida, para processamento digital de sinais, baseado-se no uso cooperativo entre DSP (Digital Signal Processor) e FPGA (Field Programmable Gate Array). Neste estudo e realizada uma abordagem sobre o uso de um coprocessador para a acelerar rotinas que demandam grande esforço computacional em um DSP. Também e proposto um modelo matemático capaz de mensurar a eficiência do particionamento de códigos processados de forma descentralizada. Para validação da proposta, foi construído um cenários de testes para a estimação de vetores movimento, um dos principais agentes envolvidos no processo de codificação de vídeo em alta definição. A partir do cenário elaborado foi possível constatar a eficiência da arquitetura proposta. Sendo que, considerando um código de referencia otimizado e baseado na descrição feita em [30], obteve-se mais de 97% de eficiência computacional. Assim, este estudo permite concluir que o uso cooperativo entre DSP e FPGA se mostra muito vantajoso devido a possibilidade de unir em um único sistema as vantagens fornecidas por ambos dispositivos, caracterizando um ambiente de total sinergia e de elevada capacidade de computacional / Abstract: Nowadays, multimedia applications require high computational effort to manipulate data with high precision. In order to optimize the processing power without significantly increasing the cost of development in embedded systems, this work describes the proposal for a hybrid computing architecture applied to digital signal processing, based on the cooperative work between DSP (Digital Signal Processor) and FPGA (Field Programmable Gate Array). An approach about the use of coprocessor able to accelerate a process which requires great computational effort of a DSP is provided by this study. It is also describes a mathematical model able to measure the efficiency of a partitioning code processed in a distributed system. To validate our proposal we developed a tested for calculate the motion estimation vector, which is one of key elements involved on high definition video coding. From the elaborated tested, we could found a high efficiency provided by the architecture proposed. Therefore, considering a optimized reference code based on [30], was possible achieve a computing efficiency around 97%. This study show that cooperative work between DSP and FPGA that provides a very advantageous scenario applied to embedded systems, due to joining the features of both devices, building then, a synergy environment of high computing performance / Mestrado / Telecomunicações e Telemática / Mestre em Engenharia Elétrica

Orientador: Eurípedes Guilherme de Oliveira Nóbrega / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Mecânica / Made available in DSpace on 2018-08-20T08:18:33Z (GMT). No. of bitstreams: 1 Pagano_DaniloMorais_M.pdf: 25950218 bytes, checksum: f9af4571e3d7f1f88caed4d997e809ba (MD5) Previous issue date: 2012 / Resumo: Esta dissertação apresenta um sistema para processamento digital de sinais através de dispositivos de hardware reconfigurável. Uma implementação do algoritmo FFT foi adotada como meio para avaliar o desempenho da arquitetura proposta para o sistema. O processamento digital de sinais tradicionalmente tem um alto custo computacional, pois os algoritmos são implementados em software, o que pode não atender as restrições de tempo de aplicações reais. O objetivo principal deste trabalho é desenvolver uma arquitetura para adquirir os sinais através de módulos de aquisição de dados distribuídos em uma rede e processá-los usando um FPGA. Um microcontrolador da FreeScale Semiconductors'MARCA REGISTRADA' foi adotado como módulo de aquisição de dados, executando um sistema operacional de tempo real (RTOS) para garantir os requisitos temporais. Foi implementado o processador soft-core NIOS 2 da Altera'MARCA REGISTRADA' executando também um RTOS com recursos de comunicação em rede, incluindo um periférico escrito em VHDL para o processamento da FFT usando uma estrutura de pipeline baseada em estágios e comunicação direta ao barramento do processador. A versão em hardware do algoritmo obteve uma redução de até 2000 vezes no tempo de processamento da FFT comparado com a mesma versão implementada em software, alcançando um tempo de processamento de 3.9 microssegundos para sinais discretizados em 256 pontos, quando usado 100MHz de clock. A quantidade de pontos pode ser facilmente aumentada alterando-se apenas o núcleo do periférico desenvolvido, e os resultados permitem adotar a arquitetura proposta para aplicações em tempo real de processamento digital de sinais / Abstract: This work presents a digital signal processing system based on reconfigurable hardware. Implementation of the FFT algorithm is used as a mean to assess the adopted configuration performance. Digital signal processing algorithms are in general software implemented, incurring high computational cost, which may not attend the real-time constraints of real applications. The main objective of this work is to develop an FPGA based architecture to process signals acquired through a distributed network of data acquisition modules. A microcontroller from FreeScale Semiconductors'TRADE MARK' was adopted as data acquisition module, running a real-time operating system (RTOS) to guarantee timing requirements. The soft-core processor NIOS 2 from Altera'TRADE MARK' , also running an RTOS with network communication capabilities, was implemented including a peripheral module written in VHDL for the computation of the FFT, which uses a pipeline-based stage structure and directly communicates with the processor bus. The hardware version of the algorithm achieved a reduction up to 2000 times in the FFT processing time compared to the same version implemented in software, reaching a processing time of 3.9 microseconds for 256 points sampled signals when using 100MHz of clock. The number of points can be easily increased just changing the core of the developed peripheral module, and the results permit to expect adequate real-time application of digital signal processing adopting the proposed configuration / Mestrado / Mecanica dos Sólidos e Projeto Mecanico / Mestre em Engenharia Mecânica

This thesis focuses on the design and implementation of low power Σ∆ ADCs in 130 nanometer CMOS technology. The design issues in the implementation of a third order ADC with a multi-bit and single bit quantizer are discussed. The advancement in CMOS technology has led to designing as much of electronics systems as possible with the digital circuits and digital signal processing replacing analog processing in most cases. Hence there is a need for digitizing analog signals with analog to digital converter (ADC). In communication systems this needs to be done immediately after the antenna in a receiver system. As this is difficult to implement due to high speed and high power consumption, RF signal is converted to a lower intermediate frequency (IF) and digitized. This work stresses low power implementation of high bandwidth Σ∆ ADCs for digitizing the IF. Design techniques involved in the implementation of a third order continuous time Σ∆ ADC with a 4 bit quantizer as well as a single bit quantizer for wide bandwidth are discussed. Moreover, a third order continuous time audio ADC implementation was also done. The behavioural modelling of the Σ∆ ADC along with clock jitter non-linearity model was developed and the issues in circuit design techniques are addressed. The continuous time ADCs’ major problem, namely, excess loop delay is discussed in detail and an efficient compensation technique for the same is implemented which allows a large reduction of power consumed by the ADC. Choice of loop filter architecture, quantizer and transistor level implementation are given that result in better immunity to offsets and process variations. Both the ADCs have been implemented using UMC 130 nm Mixed-mode RF-CMOS process and the simulation results for the multi-bit ADC gives a peak SNR of 56dB with a dynamic range of 65dB with power consumption of 2mW. The audio ADC achieves a peak SNR of 94.2dB with a dynamic range of 91dB.

A new digital receiver was built for the Ooty Radio Telescope (ORT). This new digital receiver system functionally replaces many systems custom-built for various applications at ORT. The thesis presents the receiver design, tests conducted, contributions made, revisions to the receiver architecture and future scopes. The novelty of the receiver design is in treating the ORT as an array of 22 antenna elements. Simulation studies were carried out to analyze the array performance of ORT. The IF signals are digitized and processed by a combination of multiple FPGAs and computers. Major transport of data in the receiver is through high speed serial communication. Programs were developed for configuration, control, data acquisition and off-line analysis. The functionality of the proposed digital receiver was verified through laboratory tests. The proposed receiver enables several new modes of operation of the ORT and field tests were carried out to verify these features of the system. These tests are briefly described below. The radio waves received on earth from celestial sources are extremely weak and their presence can only be detected by sensitive receivers associated with large radio telescopes. The resulting vulnerability of such observations to the ever increasing presence of radio frequency interference has prompted us to to develop new procedures to identify RFI at ORT through time and frequency domain analysis. The digital receiver has also been used in carrying out RFI study at ORT module level for the first time. Our study demonstrates that a major challenge to realizing the full potential of the ORT will be to detect weakly interfering RFI features and occasionally appearing RFI spikes and correct for their contamination in the observations. The examples provided by our analysis of data collected using the digital receiver are very useful for interpreting the data obtained during sensitive spectral line observations and has already enabled several new studies, the most notable being a sensitive recombination line survey conducted using our digital receiver at ORT as part of another research work. A spectral line emission detection procedure using our receiver has been evolved and an example result obtained by observing a region is presented in the thesis. Formation of phased array of ORT modules using the digitized IF signal is discussed and its implementation is verified through observation of celestial sources. An important requirement for proper phasing of the array is the calibration of differential delay/phase variations across the modules of the ORT, for which a powerful method was implemented based on the cross correlation of signals arriving at the 22 modules. This new method employs Hilbert Transform technique to introduce phase information in the sampled signal and the estimated delay and phase corrections are found to be consistent and repeatable. An interplanetary scintillation observation was made with the phased array and the resultant fluctuation spectra obtained are presented. Several pulsar observations and continuum sources have been observed and the results are presented. Another notable feature of the proposed digital receiver is the enhanced field of view which will lead to a reduced observing time observing extended regions. The improved spectral and temporal resolutions have also been demonstrated by the observations presented in the thesis. In particular, the single pulse observations of pulsars reported in the thesis were enabled by the high time resolution supported by the receiver.. The present work also demonstrated the digital beam formation with ORT modules in arbitrary directions. The digitally synthesized beam was compared within the first null positions of the central analog beam (beam-7) of ORT and the result is reported in the thesis. The new digital receiver enabled all the above mentioned analyses which were carried out for the first time at ORT. The results of the field trials emphasized the need for future observations to include RFI monitoring and characterization as part of the observing strategy and continuously evolve the algorithms for RFI mitigation by using different statistical signatures of the celestial signals. The need for providing a layer of buffering and preprocessing before the final beam formation or correlation is emphasized. To facilitate such development in the future, the final operational system provides for software based correlator which can be developed using the algorithms presented in this thesis. This transforms our original target of a reconfigurable platform to a much more flexible re-programmable platform. In particular, this simplifies the application of windowing functions and polyphase filters to control the beam shapes to (a) reduce beam dilution effects and, (b) to enhance RFI rejection by side lobe suppression. Such techniques can be used to reduce spectral leakage and reduce the effect of RFI on adjacent frequency channels in critical observations. Our receiver is adequate for realizing the maximum potential of the IF signals entering the receiver room. Any further enhancement of the ORT spectral coverage and instantaneous sky coverage will require telescope's front end modification and digitization of signals at the RF stage. The real time processing capabilities can be further enhanced by using multi-core processors and multi gigabit ethernet interfaces that are starting to appear as commodity hardware. Thus the present work opens up several new avenues for future work.

The sound synthesizer is an electronic musical instrument that has become commonplace in audio production for music, film, television and video games. Despite its widespread use, creating new sounds on a synthesizer - referred to as synthesizer programming - is a complex task that can impede the creative process. The primary aim of this thesis is to support the development of techniques to assist synthesizer users to more easily achieve their creative goals. One of the main focuses is the development and evaluation of algorithms for inverse synthesis, a technique that involves the prediction of synthesizer parameters to match a target sound. Deep learning and evolutionary programming techniques are compared on a baseline FM synthesis problem and a novel hybrid approach is presented that produces high quality results in less than half the computation time of a state-of-the-art genetic algorithm. Another focus is the development of intuitive user interfaces that encourage novice users to engage with synthesizers and learn the relationship between synthesizer parameters and the associated auditory result. To this end, a novel interface (Synth Explorer) is introduced that uses a visual representation of synthesizer sounds on a two-dimensional layout. An additional focus of this thesis is to support further research in automatic synthesizer programming. An open-source library (SpiegeLib) has been developed to support reproducibility, sharing, and evaluation of techniques for inverse synthesis. Additionally, a large-scale dataset of one billion sounds paired with synthesizer parameters (synth1B1) and a GPU-enabled modular synthesizer (torchsynth) are also introduced to support further exploration of the complex relationship between synthesizer parameters and auditory results. / Graduate

This diploma thesis deals with computing parameters of sound signal. It includes methods for describing and implementing these parameters. In the practical part, the main programm is created which is computing and visualizing parameters. The program mis implemented in Microsoft Visual Studio with cooperation of Freeglut and BASS libraries.

Diplomová práce se zabývá vývojem dálkoměrného modulu určeného pro rozšíření senzorické výbavy fotbalového robotu kategorie MiroSot. Tento modul na vstupu přijímá data ze senzorické jednotky vyvinuté na Ústavu automatizace a měřicí techniky a z těchto dat extrahuje polohu míčku. Je srovnáno využití neuronové sítě a zjednodušené Houghovy transformace pro získání polohy těžiště míčku. V práci je popsána pomocná implementace funkcionality v prostředích MATLAB a C#.NET i hlavní implementace pro signálový mikrokontrolér Freescale MC56F8013. Výsledný modul splňuje nároky zadání a je plně funkční.