Cette thèse porte sur la conception et la validation d'un FPGA dédié à des applications sensibles nécessitant un haut niveau de sécurité et de confidentialité. Les FPGAs usuels présentent de nombreuses failles vis-à-vis de la sécurité : 1- Ils ne permettent pas une implémentation efficace de circuits logiques alternatifs, tels que les circuits asynchrones. 2- Le placement et le routage d'un circuit ne peuvent être complètement maîtrisés pour garantir une conception sécuritaire. 3- Ils ne sont pas protégés contre les attaques par canaux cachés tels que la DPA, l'EMA ou la DFA. Afin de lever ces obstacles technologiques, les travaux entrepris dans cette thèse ont permis de proposer une architecture autorisant la programmation de différents styles de circuits asynchrones, de disposer d'un système de programmation compatible avec les objectifs de sécurité et d'une conception garantissant un haut niveau de protection vis-à-vis des attaques citées ci-dessus. Enfin, une validation matérielle du prototype a permis d'appréhender la pertinence des modèles développés

Από τότε που ολοένα και περισσότερα εμπιστευτικά δεδομένα ανταλλάσσονται με ηλεκτρονικό τρόπο η ανάγκη για προστασία των δεδομένων αυτών γίνεται ολοένα και μεγαλύτερη. Στις πραγματικές εφαρμογές όπου χρησιμοποιούνται συστήματα κρυπτογραφίας παρατηρούνται νέες τεχνικές επίθεσης πέρα από αυτές που στηρίζονται στην μαθηματική ανάλυση. Εφαρμογές τόσο σε υλικό όσο και σε λογισμικό, παρουσιάζουν ένα αχανές πεδίο από επιθέσεις. Οι Side-Channel-Attacks εκμεταλλεύονται πληροφορίες που διαρρέουν από μια συσκευή κρυπτογράφησης. Μάλιστα από την μέρα που εμφανίστηκε μία συγκεκριμένη μέθοδος επίθεσης, προσελκύει ολοένα και μεγαλύτερο ενδιαφέρον. Πρόκειται για την Διαφορική Ανάλυση Ισχύος (Differential Power Analysis (DPA)) που πρωτοπαρουσιάστηκε από την Cryptography Research. Η DPA χρησιμοποιεί την πληροφορία που διαρρέει από μια συσκευή κρυπτογράφησης, και πρόκειται για την κατανάλωση ισχύος. Μία λιγότερο δυνατή παραλλαγή της DPA είναι η Simple Power Analysis (SPA), που παρουσιάστηκε επίσης από την Cryptography Research. Βασικός στόχος της DPA είναι να μετρηθεί με ακρίβεια η κατανάλωση ισχύος του συστήματος. Έπειτα απαιτείται η γνώση του αλγόριθμου που εκτελείται από την συσκευή, ενώ τέλος απαραίτητο είναι ένα σύνολο από γνωστά κρυπτογραφήματα ή αυθεντικά μηνύματα. Η στρατηγική της επίθεσης απαιτεί την μέτρηση πολλών δειγμάτων και στην συνέχεια την διαίρεσή τους σε δύο ή περισσότερα σύνολα με βάση ενός κανόνα . Εν συνεχεία στατιστικές μέθοδοι χρησιμοποιούνται για την επιβεβαίωση του κανόνα αυτού. Αν και μόνο αν ο κανόνας αυτός είναι σωστός τότε μπορούμε να παρατηρήσουμε αξιοπρόσεκτες τιμές στην στατιστική ανάλυση. Σκοπός της εργασίας αυτής είναι να καθορίσουμε με περισσότερες λεπτομέρειες την DPA, να αναπτύξουμε ένα περιβάλλον που θα πραγματοποιεί την επίθεση αυτή, σε μια υλοποίηση του DES (Data Encryption Standard) αλγόριθμου κρυπτογράφησης με την χρήση FPGA Board και να γίνει πειραματική εκτίμηση. / -

Submitted by Aline Batista (alinehb.ufpel@gmail.com) on 2018-04-19T14:01:22Z No. of bitstreams: 2 license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Dissertacao_Rodrigo_Nuevo_Lellis.pdf: 1982046 bytes, checksum: 64712cc3d5117bfeff36f5d57b2f6054 (MD5) / Approved for entry into archive by Aline Batista (alinehb.ufpel@gmail.com) on 2018-04-19T14:41:57Z (GMT) No. of bitstreams: 2 license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Dissertacao_Rodrigo_Nuevo_Lellis.pdf: 1982046 bytes, checksum: 64712cc3d5117bfeff36f5d57b2f6054 (MD5) / Made available in DSpace on 2018-04-19T14:45:19Z (GMT). No. of bitstreams: 2 license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Dissertacao_Rodrigo_Nuevo_Lellis.pdf: 1982046 bytes, checksum: 64712cc3d5117bfeff36f5d57b2f6054 (MD5) Previous issue date: 2017-02-23 / Sem bolsa / Nas últimas décadas uma das grandes preocupações de projetistas de hardware dedicado a aplicações que exigem segurança e sigilo de informações tais como smart cards são os ataques a canais laterais (em inglês Side Channel Attacks – SCAs). Estes ataques permitem relacionar os dados processados em dispositivos eletrônicos com grandezas físicas tais como a potência, a emissão de radiação eletromagnética ou o tempo de processamento. Isto se torna crítico quando, por exemplo, algoritmos criptográficos são executados e a chave criptográfica pode ser revelada pelo ataque. Dentre estes ataques, os baseados nos traços de potência, conhecidos como ataque por Análise Diferencial de Potência (em inglês Differential Power Analysis – DPA) e na emissão de radiação eletromagnética, denominados de Análise Diferencial Eletromagnética (em inglês Differential Electromagnetic Analysis - DEMA) são os mais populares, e por não serem invasivos, serem eficientes e não deixarem rastros no dispositivo atacado. Por outro lado, estes ataques exigem que a aquisição dos traços de potência ou radiação eletromagnética, sejam alinhados no tempo a fim de comparar e avaliar estatisticamente as amostras relativas a execução de operações com diferentes dados. Na literatura, existem diversas contramedidas visando evitar a ação destes ataques através da inserção de aleatoriedade de execução de operações, seja através da adição de atrasos aleatórios até a execução com diferentes frequências de relógio. Da mesma forma, existem propostas de estratégias baseadas em processamento de sinais aplicadas aos traços a fim de extrair informações vazadas pela arquitetura, métodos como correlação de fase (em inglês, Phase Only Correlation - POC), deformação dinâmica de tempo (do inglês, Dynamic Time Warping - DTW) e filtros digitais são usados em fluxos de ataques para estabelecer o realinhamento de traços antes da realização de ataques. Apesar disso, estes métodos são restritos a traços processados com sinal de relógio de mesma frequência ou com pequenas variações, o que por consequência exigem um grande número de traços e seus agrupamentos por frequência de operação. Este trabalho propõe um fluxo de ataque baseado no cálculo da energia dos traços a fim de permitir o realinhamento dos traços independentemente da frequência de operação e assim potencializar a ação dos ataques DPA em arquiteturas protegidas por contramedidas com inserção de aleatoriedade no processamento. Os resultados obtidos destacam que os ataques DPA são mais efetivos quando o cálculo da energia ocorre com segmentos de tamanho aproximado a metade do ciclo médio das frequências de operação dos traços atacados. Em comparação com trabalhos anteriores, o fluxo permite uma redução, no melhor caso, de aproximadamente 93% traços para um ataque bem-sucedido, motivando o uso do fluxo proposto. / In recent decades one of the major concerns of hardware designers dedicated to applications requiring security and secrecy of information such as smart cards are Side Channel Attacks (SCAs). These attacks allow you to relate processed data to electronic devices with physical quantities such as power consumption, electromagnetic radiation emission or processing time. This becomes critical when, for example, cryptographic algorithms are executed and the cryptographic key can be revealed by the attack. Among these attacks, by power consumption and emission of electromagnetic radiation are the most popular, known as Differential Power Analysis (DPA) and Differential Electromagnetic Analysis (DEMA). Since they are not invasive, efficient and leave no traces on the attacked device. These attacks require that the acquisition of traces of power consumption or electromagnetic radiation relating to the execution of cryptographic algorithms be time aligned in order to statistically compare and evaluate consumption or radiation samples for the execution of operations with different data. In the literature there are several countermeasures of these attacks through the randomization of execution operations either by adding random delays to the by changing clock frequencies. Similarly, there are proposals for strategies based on signal processing applied to the traces in order to extract information leaked by the architecture. Methods such as phase correlation (POC), dynamic time warping (DTW) and digital filters are used to realign traces before attacks. Nevertheless, these methods are restricted to traces processed with clock signal of the same frequency or with small variations, and require a large number of traces or their clustering frequency. This work proposes an attack flow based on the calculation of the trace energy in order to allow the realignment independently of the frequency of operation and thus enable the action of the DPA attacks in architectures with countermeasures based on processing randomization. Results show that DPA attacks are more effective when the energy is calculated in segments of approximately half the average cycle of the frequencies of operation of the traces attacked. Compared to previous works, the flow allows a reduction, in the best case, of approximately 93% traces for a successful attack, motivating the use of the proposed flow.

Power Analysis Attacks pose serious threats to hardware implementations of cryptographic systems. To retrieve the secret key, the attackers can exploit the mutual information between power consumption and processed data / operations through monitoring the power consumption of the cryptosystems. Field Programmable Gate Arrays (FPGA) have emerged as attractive implementation platforms for providing hardware-like performance and software-like flexibility for cryptosystem developers. These features come at the expense of larger power consumption, which makes FPGAs more vulnerable to power attacks. Different countermeasures have been introduced in the literature, but as they have originally been developed for Application-Specific Integrated Circuits (ASIC), mapping them onto FPGAs degrades their effectiveness. In this work, we propose a logic family based on pass transistors, which essentially consists of hardware replication, that can be used to build FPGAs with constant power consumption. Since the power consumption is no longer related to processed data and operations, a quadruple robustness to attacks based on dynamic power consumption, static power consumption, glitches, and early evaluation effect is achieved. Such a secured-by-design FPGA will relieve the cryptosystems developers from doing advanced analog design to secure the cryptosystem implementation. Our pass-transistor logic family can also be used in implementing ASICs. The silicon area overhead costs are shown to be less than prior art, which makes our FPGA attractive to cryptosystems developers. / Graduate / 2018-07-26

No description available.

In 2015, Federal Communications Commission (FCC) enabled shared commercial use of the 3.550-3.700 GHz band. A framework was developed to enable this spectrum-sharing capa- bility which included an automated frequency coordinator called Spectrum Access System (SAS). This work extends the open source SAS based on the aforementioned FCC SAS framework developed by researchers at Virginia Tech Wireless group, with real-time envi- ronment sensing capability along with intelligent incumbent detection using Software-defined Radios (SDRs) and a real-time graphical user interface. This extended version is called the OpenSAS. Furthermore, the SAS client and OpenSAS are extended to be compliant with the Wireless Innovation Forum (WINNF) specifications by testing the SAS-CBRS Base Station Device (CBSD) interface with the Google SAS Test Environment. The Environment Sensing Capability (ESC) functionality is evaluated and tested in our xG Testbed to verify its ability to detect the presence of users in the CBRS band. An ML-based feedforward neural net- work model is employed and trained using simulated radar waveforms as incumbent signals and captured 5G New Radio (NR) signals as a non-incumbent signal to predict whether the detected user is a radar incumbent or an unknown user. If the presence of incumbent radar is detected with an 85% or above certainty, incumbent protection is activated, terminating CBSD grants causing damaging interference to the detected incumbent. A 5G NR signal is used as a non-incumbent user and added to the training dataset to better the ability of the model to reject non-incumbent signals. The model achieves a maximum validation accuracy of 95.83% for signals in the 40-50 dB Signal-to-Noise Ratio (SNR) range. It achieves an 85.35% accuracy for Over the air (OTA) real-time tests. The non-incumbent 5G NR signal rejection accuracy is 91.30% for a calculated SNR range of 10-20 dB. In conclusion, this work advances state of the art in spectrum sharing systems by presenting an enhanced open source SAS and evaluating the newly added functionalities. / Master of Science / In 2015, Federal Communications Commission (FCC) enabled shared commercial use of the 3.550-3.700 GHz band. A framework was developed to enable this spectrum-sharing capability which included an automated frequency coordinator called Spectrum Access System (SAS). The task of the SAS is to make sure no two users use the same spectrum in the same location causing damaging interference to each other. The SAS is also responsible for prioritizing the higher tier users and protecting them from interference from lower tier users. This work extends the open source SAS based on the aforementioned FCC SAS framework developed by researchers at Virginia Tech Wireless group, with real-time environment sensing capability along with intelligent incumbent detection using Software-defined Radios (SDRs) and a real-time graphical user interface. This extended version is called the OpenSAS. Furthermore, the SAS client and OpenSAS are extended to be compliant with the Wireless Innovation Forum (WINNF) specifications by testing the SAS-CBRS Base Station Device (CBSD) interface with the Google SAS Test Environment. The Environment Sensing Capability (ESC) functionality is evaluated and tested in our xG Testbed to verify its ability to detect the presence of users in the CBRS band. The ESC is used to detect incumbent users (the highest tier) that do not inform the SAS about their use of the spectrum. An ML-based feedforward neural net- work model is employed and trained using simulated radar waveforms as incumbent signals and captured 5G New Radio (NR) signals as a non-incumbent signal to predict whether the detected user is a radar incumbent or an unknown user. If the presence of incumbent radar is detected with an 85% or above certainty, incumbent protection is activated, terminating CBSD grants causing damaging interference to the detected incumbent. A 5G NR signal is used as a non-incumbent user and added to the training dataset to better the ability of the model to reject non-incumbent signals. The model achieves a maximum validation accuracy of 95.83% for signals in the 40-50 dB Signal to-Noise Ratio (SNR) range. It achieves an 85.35% accuracy for Over the air (OTA) real-time tests. The non-incumbent 5G NR signal rejection accuracy is 91.30% for a calculated SNR range of 10-20 dB. In conclusion, this work advances state of the art in spectrum sharing systems by presenting an enhanced open source SAS and evaluating the newly added functionalities.

No description available.

Dans le domaine de la conception de circuits sécurisés (cartes à puce) et plus particulièrement des circuits robustes aux attaques différentielles en puissance (DPA), la logique double rail apparaît comme une alternative intéressante à la logique statique CMOS. En effet, le codage associé à ce style de logique offre la possibilité d'équilibrer la consommation rendant ainsi impossible les attaques DPA. Partant de ce constat, dans cette thèse, nous nous sommes focalisés sur l'analyse des atouts et faiblesses de la logique double rail et surtout à son amélioration. Dans un premier temps, nous avons montré qu'un circuit double rail est nettement plus résistant aux attaques DPA que son homologue simple rail. Dans un deuxième temps, après une étude approfondie de l'impact de la synthèse physique sur la robustesse de la logique double rail, nous avons abouti à la conclusion qu'en présence de déséquilibres des capacités de charge, des temps de transition et des temps d'arrivée, les circuits double rail peuvent perdre leur avantage et devenir vulnérables aux attaques DPA. Cette étude a permis de définir quelques métriques de robustesse aux attaques DPA à partir desquelles nous avons clairement établi qu'une cellule double rail n'est robuste que si les signaux la contrôlant arrivent tous dans un intervalle de temps particulièrement réduit. Afin d'éliminer cette faiblesse résiduelle de la logique double rail, nous avons finalement proposé une amélioration simple mais efficace de la logique double rail. La logique résultante a été appelée STTL (Secured Triple Track Logic). La mise en oeuvre de cette logique a permis de montrer que la logique STTL permet d'obtenir des circuits dont les temps de calcul et la consommation sont indépendants des données.

Les toxines formeuses de pore (PFTs) sont des protéines exogènes responsables d’un grand nombre de maladies infectieuses qui perméabilisent les membranes cellulaires de leur hôte. La formation des pores ou l’introduction d’une enzyme dans le cytoplasme peut entrainer l’apparition de symptômes de maladies connues (l’anthrax, le botulisme) et, dans le pire des cas, la mort. Les mécanismes d’infection et de destruction des cellules infectées sont bien caractérisés. Toutefois, l’aspect dynamique des changements de conformation durant le processus de perméabilisation reste à découvrir pour la majorité des toxines formeuses de pore. Le but de cette thèse est d’étudier les mécanismes d’oligomérisation des PFTs, ainsi que la formation des pores à la membrane lipidique grâce à la spectroscopie de fluorescence. Nous avons choisi la toxine Cry1Aa, un bio pesticide produit par le bacille de Thuringe et qui a été rigoureusement caractérisé, en tant que modèle d’étude. La topologie de la Cry1Aa à l’état actif et inactif a pu être résolue grâce à l’utilisation d’une technique de spectroscopie de fluorescence, le FRET ou transfert d’énergie par résonance entre un fluorophore greffé au domaine formeur de pore (D1) et un accepteur non fluorescent (le DPA ou dipicrylamine) localisé dans la membrane et qui bouge selon le potentiel membranaire. Le courant électrique, ainsi que la fluorescence provenant de la bicouche lipidique membranaire horizontale ont été enregistrés simultanément. De cette manière, nous avons pu localiser toutes les boucles reliant les hélices de D1 avant et après la formation des pores. Dans la forme inactive de la toxine, toutes ces boucles se trouvent du côté interne de la bicouche lipidique, mais dans sa forme active l’épingle α3-α4 traverse du côté externe, alors que toutes les autres hélices demeurent du côté interne. Ces résultats suggèrent que α3-α4 forment le pore. Nous avons découvert que la toxine change significativement de conformation une fois qu’elle se trouve dans la bicouche lipidique, et que la Cry1Aa attaque la membrane lipidique de l’extérieur, mais en formant le pore de l’intérieur. Dans le but de caractériser la distribution de toxines à chaque extrémité de la bicouche, nous avons utilisé une technique de double FRET avec deux accepteurs ayant des vitesses de translocation différentes (le DPA et l’oxonol) dans la membrane lipidique. De cette manière, nous avons déterminé que la toxine était présente des deux côtés de la bicouche lipidique durant le processus de perméabilisation. La dynamique d’oligomérisation de la toxine dans une bicouche lipidique sans récepteurs a été étudiée avec une technique permettant le compte des sauts de fluorescence après le photoblanchiment des fluorophore liés aux sous unités composant un oligomère présent dans la bicouche lipidique supportée. Nous avons confirmé de cette manière que la protéine formait ultimement des tétramères, et que cet état résultait de la diffusion des monomères de toxine dans la bicouche et de leur assemblage subséquent. Enfin nous avons voulu étudier le « gating » de la colicine Ia, provenant de la bactérie E.Coli, dans le but d’observer les mouvements que font deux positions supposées traverser la bicouche lipidique selon le voltage imposé aux bornes de la bicouche. Nos résultats préliminaires nous permettent d’observer un mouvement partiel (et non total) de ces positions, tel que le suggèrent les études de conductances du canal. / Pore forming toxins (PFTs) are exogenous often pathogenic proteins that permeabilize the host membrane. Permeabilization or subsequent introduction of an enzyme leads to health disorders and sometimes death. Although the fundamental infection and destruction mechanisms are known, the underlying molecular basis and their link to the structural information remains undetermined for many pore forming toxins. The purpose of this thesis was to study the mechanisms of oligomerization on the membrane and pore formation of PFTs using fluorescence spectroscopy in planar lipid bilayer. We chose Cry1Aa as the most intensively studied member of Bacillus thuringiensis’s toxins. In order to probe the topology both in inactive and active congformation, we used Förster resonance energy transfer (FRET) between a fluorophore site-directedly attached to different positions in the pore forming domain (D1) of Cry1Aa toxin and an acceptor compound dipicrylamine (DPA) in the membrane, which moves in response to the membrane potential. Electrical current and fluorescence emission from planar lipid bilayers in a horizontal configuration were simultaneously recorded. We probed all loops between the seven α helices of D1. All of them were located on the inner leaflet of the bilayer prior to pore formation. In the active form, the α3-α4 hairpin were found to translocate back to the outer leaflet of the bilayer, whereas all other positions remained in the inner leaflet, suggesting that α3-α4 are the pore lining helices. The toxins undergo significant conformational changes once they enter the host membrane, and we found Cry1Aa to attack from the exterior but translocate to the interior. To estimate the distribution of the toxins on either side of the membrane, we used the double-FRET technique. Here, two different acceptors (DPA and oxonol) with different dynamics (time constants) allowed us to determine that approximately equal amounts of the toxin were present on either leaflet during the permeabilization process. We also studied the oligomerization mechanism of Cry1Aa toxins inserted into supported lipid bilayers using a single subunit counting technique based on the step-wise photodestruction (bleaching) of the attached fluorophores. This system allowed determining the number of subunits composing each oligomer. We found that oligomerization is a highly dynamic process which occurs after insertion into the bilayer by lateral diffusion. The final (likely the pore forming) entity of the toxin is tetrameric. Finally, we used the same FRET approach to investigate the gating process of two positions of the pore forming domain of colicin Ia, an antibiotic toxin produced by E. coli. These positions were suspected to translocate reversibly from the outer to the inner leaflet during the gating process. In preliminary results, we found that these positions are moving between the two leaflets of the bilayer during pore formation.

Ce travail de thèse concerne la sécurisation des circuits électroniques contre les attaques (dites SCA) qui visent leur implémentation. Les algorithmes cryptographiques ont été traditionnellement étudiés pour résister aux attaques théoriques. Néanmoins, dès lors que ces algorithmes sont mis en oeuvre sur des dispositifs concrets, de nouvelles attaques deviennent possibles. Effectivement, de l'information peut être extraite passivement (par observation). Cette information complémentaire, communément appelée "canal caché", apporte un pouvoir supplémentaire aux attaquants. Les canaux cachés les plus populaires sont la consommation électrique et le rayonnement électromagnétique. Nous montrons tout d'abord que les attaques sur les canaux cachés sont structurelles, c'est-à-dire inhérentes au traitement de l'information. Il se trouve par ailleurs que les algorithmes cryptographiques sont spécialement sensibles aux SCA, à cause des propriétés constitutives des fonctions booléennes utilisées. Le talon d'Achille principal est l'architecture RTL de l'opérateur cryptographique. Effectivement, les transferts de registres rendent possible une attaque dite en distance de Hamming. Nous continuons en recherchant des moyens permettant de ne fuir pratiquement aucune information exploitable par un attaquant. Des portes logiques sécurisées sont conçues de sorte à minimiser les violations de symétrie. Une stratégie de routage équilibré obéi aux mêmes critères. La conservation de la symétrie est traitée avec un soin tout particulier, aboutissant à la méthode générique de "backend duplication".