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<b>SCALABLE MULTI INPUT MULTI OUTPUT DC BUCK CONVERTER USING MULTISTAGE AND MULTIPHASE TECHNIQUES</b>Khalifa Ahmed Alremeithi (14661221) 18 July 2024 (has links)
<p dir="ltr">The demand for renewable energy and electric vehicles (EVs) is increasing, necessitating efficient energy conversion and management solutions. The thesis addresses the critical challenge of dynamically converting multiple Direct Current (DC) inputs to multiple DC outputs while maintaining efficiency and scalability. The primary objective is to design and test a Multi Input Multi Output (MIMO) DC converter, focusing on verifying its scalability and load efficiency. The research investigates hardware requirements, the implementation of multiphase circuits, and the balancing of power between various inputs through multistage cycling. The study hypothesizes that multistage cycling balances the output power between inputs, and multiphase configurations can scale the converter without affecting efficiency. Methods include examining existing converters, simulating multistage circuits, and fabricating a prototype. Key deliverables include a working prototype demonstrating scalability and efficiency. Results indicate that the MIMO DC converter performs efficiently with multiple inputs and outputs, achieving over 90% efficiency. The use of Gallium Nitride (GaN) transistors and synchronous buck converter topology proves effective in minimizing losses and enhancing stability. The research holds significant value in advancing renewable energy and DC converter technology, promoting sustainability and efficient energy management. Future work should explore advanced filtration circuits, higher voltage testing, and more complex configurations to further enhance the converter's capabilities.</p>
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Silicon Based Nano-electronic Synaptic Device for Neuromorphic HardwareOrthi Sikder (9167615) 03 September 2024 (has links)
<p dir="ltr">Porous silicon (po-Si) is a unique form of silicon (Si) that features tunable nanopores distributed throughout its bulk structure. While crystalline Si (c-Si) already boasts technological advantages, po-Si offers an additional key aspect with its large surface area relative to its small volume, making it highly conducive to surface chemistry. In this research, our focus centers on the design of a synaptic device based on po-Si, exploring its potential for neuromorphic hardware applications.</p><p><br></p><p dir="ltr">To begin, we delve into the analysis of several electrical properties of po-Si using density functional theory (ab initio/first principles) calculations. Notably, we discover the presence of intra-pore dangling states within the bandgap region of po-Si. Although po-Si is known for its higher bandgap compared to c-Si, resulting in low carrier density and increased resistance, the existence of these dangling states significantly impacts its electronic transport.</p><p><br></p><p dir="ltr">Additionally, we investigate the electric-field driven modulation of dangling bonds through controlled intra-pore Si-H bond dissociation. This modulation enables precise control over the density of dangling states, facilitating the tunability of po-Si conductance. Theoretically evaluating the current-voltage characteristics of our proposed po-Si based synaptic devices, we determine the potential range of obtainable conductivity.</p><p><br></p><p dir="ltr">Finally, we evaluate the performance by integrating porous silicon nanoelectronics devices into neural networks. These devices exhibit superior synaptic plasticity, faster response times, and reduced power consumption compared to other synapses. The research indicates that poroussilicon devices are highly effective in neuromorphic systems, paving the way for more efficient and scalable neural networks. These advancements have significant practical and cost-effective implications for a wide range of applications, including pattern recognition, machine learning, and artificial intelligence.</p><p><br></p><p dir="ltr">Overall, our analyses reveal that the integration of po-Si based synaptic devices into the neural fabric offers a path towards achieving significantly denser and more energy-efficient neuromorphic hardware. With its tunable properties, large surface area, and potential for controlled conductance, po-Si emerges as a promising candidate for the development of advanced silicon based nano-electronic devices tailored for neuromorphic computing. As we delve deeper into the potentials of po-Si, the era of cognitive computing, inspired by the elegance of bio-mimetic neural networks, edges closer to becoming a reality.<br><br></p>
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Tópicos de álgebra linear e aplicações em problemas de economia e de engenharia / Topics of Linear algebra and application in economics and engeneeringCruvinel, Frederico Borges 12 April 2013 (has links)
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Previous issue date: 2013-04-12 / This work shows the importance of the Linear Algebra and in particular of the
theory of Matrices and Linear Systems to solve practical problems in various areas. We
show examples of Applications of Linear Systems in closed and open models of Leontief
in Economics, in closed circuits (Law Kirccho ) and in projects of construction of steel
structures. / O presente trabalho mostra a importância da Álgebra Linear e em particular
da teoria da Matrizes e Sistemas Lineares para resolver problemas práticos em
diversas áreas. Mostramos exemplos de aplicações dos Sistemas Lineares nos modelos
fechado e aberto de Leontief na área de Economia, em circuitos elétricos fechados (Lei
de Kirccho ) e em projetos de construção de estruturas metálicas.
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Realização experimental de uma rede de fusíveis aleatórios via diluição / Experimental realization of a random fuse network via dilutionVilela, Tatiane de Souza 26 February 2013 (has links)
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Previous issue date: 2013-02-26 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / The study of the process of fracture in disordered materials is of huge importance in various fields of science and technology. Thus, several network models have been proposed to investigate the process of rupture of these materials, in particular, the random fuse model (RFM).The fuse model is the electrical analog to the mechanic model where the elastic force is represented by the electric current and the displacement is represented by voltage. In this work, our main objective was to experimentally study the influence of disorder in the rupture process of a random network of fuses. The experimental apparatus consisted of a square lattice of size L x L, in which the edges are fuses (copper wires). The network vertices were connected with copper wires (diameter 0.031 mm and resistivity ρ = 1.69 x 10-8 Ωm). This process generates an weakly disordered system. The disorder was introduced via a dilution of the network, where copper wires edges randomly removed from the network. The rupture process consisted of applying a potential difference on the network and measuring the corresponding current. After this process we obtain did information, such as the behavior of the was network as a function of the degree of disorder represented by the parameter p, and plot depending on the size L of the network, which were analyzed according to the percolation theory and fractures. Our results indicate that near the critical parameter pc, quantities such as the average number of burned fuses that form the percolation cluster, the average size of the percolation cluster and the average resistance of the network, obey power laws with critical exponents that are apparently not related to the exponents provided by the percolation theory. / O estudo do processo de fratura em materiais desordenados é de imensa importância em vários ramos da ciência e da tecnologia. Assim, vários modelos de rede foram propostos para investigar o processo de ruptura destes materiais, em particular, o modelo de fusível aleatório (RFM). O modelo de fusíveis é o análogo elétrico do modelo elástico onde a força é representada pela corrente elétrica e o deslocamento é representado pela tensão elétrica. Neste trabalho nosso principal objetivo foi estudar, experimentalmente, a influência da desordem no processo de ruptura de uma rede de fusíveis aleatórios. O aparato experimental consiste de uma rede quadrada de tamanho L x L, na qual os lados dos quadrados são os fusíveis (fios de cobre). A rede foi preenchida com fios de cobre (com diâmetro de com 0,031 mm e resistividade ρ = 1.69 x 10-8 Ωm). Este processo gera um sistema fracamente desordenado. A desordem na rede foi introduzida via processo de diluição, onde alguns fios de cobre foram aleatoriamente removidos da rede. O processo de ruptura consiste em aplicar uma diferença de potencial na rede e medir a respectiva corrente. Após este processo podemos obter informações, como gráficos em função do grau de desordem representada pelo parâmetro p e gráficos em função do tamanho L da rede, que foram analisados de acordo com a teoria de percolação e fraturas. Nossos resultados indicam que próximo do parâmetro crítico pc, algumas grandezas tais como: o número médio de fusíveis queimados e retirados que formam o agregado de percolação, o tamanho médio do agregado de percolação e a resistência média da rede, obedecem a uma lei de potência, com expoentes críticos que aparentemente não estão relacionados com os expoentes previstos na teoria da percolação por ligação.
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Controle térmico de alta exatidão e sua aplicação na determinação de propriedades térmicas de materiaisNascimento, Leonaldo José Lyra do 14 December 2012 (has links)
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Previous issue date: 2012-12-14 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This paper presents a theoretical and experimental study of a PID control-Proportional, Integral and Derivative using PELTIER module that achieves precision of about 0.01oC. It is developed to study the integrated instrumentation and control heat transfer. Based on this we developed a heat signal generator on a flat surface and applied to the measurement of thermal properties, in a system similar to electrical circuit. After several experiments, the results indicates the validity of the proposal. / Neste trabalho apresenta-se um estudo teórico e experimental de um controle P.I.D.- Proporcional, Integral e Derivativo, utilizando módulos Peltier s que alcançam precisão de cerca de 0.01oC. É desenvolvido o estudo da instrumentação e controle integrado à transferência de calor. Baseado neste controle foi desenvolvido um gerador de sinais térmicos em uma superfície plana e aplicado na medida de propriedades térmicas, em um sistema semelhante ao circuito elétrico. Após vários ensaios experimentais usando amostras sólidas, os resultados indicam a validade da proposta.
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Cálculo de fluxo de potência em alimentadores de distribuião baseado em tensões nodais e de ramos / Distribution power flow based on nodal and branch voltagesTorres Neto, Floriano 07 February 2010 (has links)
Orientador: Anésio dos Santos Júnior / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-16T14:59:47Z (GMT). No. of bitstreams: 1
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Previous issue date: 2010 / Resumo: Propõe-se nesta dissertação uma formulação e um método iterativo de cálculo para o fluxo de potência em alimentadores primários de Distribuição de Energia Elétrica. Este é formulado com base em equações lineares de circuitos elétricos, para alimentadores primários radiais e fracamente malhados. Para tanto, um modelo linear de circuito é inicialmente introduzido para alimentadores radiais e a partir desse modelo é proposto um método para o cálculo das magnitudes de tensão dos nós por meio das correntes de carga. As magnitudes das tensões nodais são iterativamente atualizadas até que as especificações de potência das cargas sejam atendidas. Essa formulação é estendida para os casos de redes fracamente malhadas, isto é, alimentadores que contém um moderado número de percursos fechados em sua configuração. Desta forma unifica-se o modelo de representação e o algoritmo de cálculo para redes radiais e fracamente malhadas. A metodologia proposta foi testada e o comportamento do método é comparado com o apresentado por método similar. Os resultados obtidos com vários sistemas são apresentados / Abstract: It is proposed in this work a formulation and an iterative method for calculating the power flow on feeders of a Primary Electric Power Distribution. This is formulated based on linear equations of electrical circuits, for radial and weakly meshed primary feeders. Thus, a linear model of the circuit is initially introduced for radial feeders and from that model it is proposed a method for calculating the voltage magnitudes of the nodes through the load currents. The magnitudes of nodal voltages are updated iteratively until the power specifications of the loads are met. This formulation is extended to the cases of weakly meshed networks, that is, networks that contain a moderate number of closed paths in your configuration. Thus the model unifies the representation and algorithm for calculating radial networks and weakly meshed. The proposed methodology was tested and compared with a similar method. The results obtained with various systems are presented / Mestrado / Energia Eletrica / Mestre em Engenharia Elétrica
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<strong>DEVELOPMENT OF A BATTERY MONITORING SYSTEM FOR DATA-DRIVEN AI DETECTION OF ACCELERATED LITHIUM-ION DEGRADATION</strong> Untitled ItemAlexey Y Serov (16385037) 16 June 2023 (has links)
<p> </p>
<p>Many machine learning models exist for battery management systems to utilize. Few have been shown to work. This work focuses on gathering data from cycling battery packs and sending this data directly to machine learning models built off robust datasets for applying the resulting predicted values and outputs directly on top of real-time systems. A parasitic sensor network was created composed of a main microcontroller, a host CPU, and various sensors including resistance temperature detection devices (RTDs), a voltage measurement circuit, current measurement circuit, and an accelerometer/gyroscope. The resulting network was integrated parasitically with a 4-cell 18650 SONY VTC6 battery pack, then tested both on-ground and in-flight with a commercial quadcopter. Real-time data for the battery pack with four cells in series was gathered. This real-time data stream was then integrated with data-driven neural network algorithms trained on various 18650 datasets and a real physical model to finalize the “AI BMS”. Using the power of non-linear models to infer battery health impacts not normally considered in battery management systems, the “AI BMS” was able to use low-fidelity real-time data in conjunction with a powerful multi-faceted model to make predictive decisions about battery health characteristics on top of normal system operations.</p>
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Storage-Aware Test Sets for Defect Detection and DiagnosisHari Narayana Addepalli (18276325) 03 April 2024 (has links)
<p dir="ltr">Technological advancements in the semiconductor industry have led to the development of fast, low-power, and high-performance electronic devices. With evolving process technologies, the size of an electronic device has greatly reduced, and the number of features a single device can support has steadily increased. To achieve this, billions of transistors are integrated into small electronic chips leading to an increase in the complexity of manufacturing processes. Electronic chips that are manufactured using such complex manufacturing processes are prone to have a large number of defects that are difficult to test, and cause reliability issues. To tackle these issues and produce highly reliable chips, there is a growing need to test each manufactured chip thoroughly. This requires the application of a large number of tests by a tester. The cost of testing an electronic chip primarily depends on the storage requirements of the tester, and the test application time required. The large number of tests required to rigorously test each chip leads to an increase in the testing cost. Earlier works reduced the testing cost by reducing the input storage requirements of the tester. The input storage requirements are reduced by using each stored test on the tester to apply several different tests to the circuit. Several different tests are also applied based on each stored test to improve the quality of a test set. The goal of this thesis is to aide in producing reliable chips, by creating test sets that can detect faults from different fault models. The test sets are created by improving the quality of a test set. </p><p><br></p><p dir="ltr">First, test sets with low storage requirements are produced for defect detection. A base test set is generated and stored. Each stored test is perturbed to produce several different tests. Algorithms are then described in two different scenarios to select a subset of the perturbed tests. The selected subset of tests improves the quality of defect detection with a minimal increase in the input storage requirements.</p><p><br></p><p dir="ltr">Next, test sets with low-storage requirements are produced for defect diagnosis. A fault detection test set is generated and stored. Each stored test is perturbed to produce several different tests. A procedure is then described to select a subset of the perturbed tests to be used as diagnostic tests. The diagnostic test set selected improves the quality of defect diagnosis with a minimal increase in the input storage requirements.</p><p><br></p><p dir="ltr">Finally, storage-aware test sets are produced targeting several fault models in two steps. In the first step, tests in a base test set are replaced with improved tests to produce an improved test set. The improved test set is stored, and it improves the quality of defect detection with no increase in the storage requirements. In the second step, each improved test is perturbed to produce several different tests. A procedure is then described to select a subset of the perturbed tests. The selected subset of tests further improves the quality of defect detection with a minimal increase in the input storage requirements.</p>
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CMOS Integrated Resonators and Emerging Materials for MEMS ApplicationsJackson Anderson (16551828) 18 July 2023 (has links)
<p>With the advent of increasingly complex radio systems at higher frequencies and the slowing of traditional CMOS process scaling with power concerns, there has been an increased focus on integration, architectural, and material innovations as a continued path forward in MEMS and logic. This work presents the first comprehensive experimental study of resonant body transistors in a commercial 14nm FinFET process, demonstrating differential radio frequency transduction as a function of transistor biasing through electrostatic, piezoresistive, and threshold voltage modulation. The impact of device design changes on unreleased resonator performance are further explored, highlighting the importance of phononic confinement in achieving an f*Q product of 8.2*10<sup>11</sup> at 11.73 GHz. Also shown are initial efforts towards the understanding of coupled oscillator architectures and a perovskite nickelate material system. Finally, development of resonators based on two-dimensional materials, whose scale is particularly attractive for high-frequency nano-mechanical resonators and acoustic devices, is discussed. Experiments towards dry transfer of tellurene flakes using geometries printed via two photon polymerization are presented along with optimization of a fabrication process for gated RF devices, presenting new opportunities for high-frequency electro-mechanical interactions in this topological material. </p>
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Advanced Electrical Analysis of Low Noise MOSFET and Circuit Implementation for Low Power RFID ApplicationNathan J Conrad (18494457) 06 May 2024 (has links)
<p dir="ltr">Semiconductor technology has propelled human society into the information age, and that progress continues. Silicon CMOS device has been aggressively scaled down to 5 nm technology node. To further boost the on-state performance, MOS technology based on high-mobility channels such as III-V and Ge have been intensively studied. 3D structures such as FinFETs and gate-all-around (GAA) FETs are also applied to III-V and Ge to improve the electrostatic control of the channels for the ultimate scaling. </p><p><br></p><p dir="ltr">Traditional semiconductor device characterization techniques are inapplicable to devices created through these novel materials and device structures. This work applies various techniques to characterize a wide variety of semiconductor devices, in addition to presenting novel techniques studying the reliability of commercial off the shelf (COTS) products. Finally, the design of an ultra-low-power RF ASIC implementing wireless neural recording and stimulation, designed for cranial implantation, will be presented.</p>
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