Wireless multi-hop ad hoc and sensor networks provide a promising solution to ensure ubiquitous connectivity for the Future Internet. Good network connectivity requires designing a reliable Medium Access Control (MAC) protocol, which is a challenging task in the ad hoc and sensor environments. The broadcast and shared nature of the wireless channel renders the bandwidth resources limited and expose the transmissions to relatively high collisions and loss rates. The necessity to provide guaranteed Quality of Service (QoS) to the upper layers triggered the design of conflict-free MAC protocols. The TDMA synchronization constraint is basically behind the rush of MAC protocol design based on a fixed frame size. This design shows inflexibility towards network variations and creates a network dimensioning issue that leads to a famine risk in case the network is under-dimensioned, and to a waste of resources, otherwise. Moreover, the alternative dynamic protocols provide more adaptive solutions to network topology variations at the expense of a fair access to the channel. Alongside with the efficient channel usage and the fair medium access, reducing the energy consumption represents another challenge for ad hoc and sensor networks. Solutions like node activity scheduling tend to increase the network lifetime while fulfilling the application requirements in terms of throughput and delay, for instance. Our contributions, named OSTR and S-OSTR, address the shortcomings of the medium access control protocol design in the challenging environment of wireless multi-hop ad hoc and sensor networks, respectively. For OSTR the idea consists in adopting a dynamic TDMA frame size that increases slot-by-slot according to the nodes arrival/departure to/from the network, and aiming to achieve a minimum frame size. For this end, OSTR couples three major attributes: (1) performing slot-by-slot frame size increase, (2) providing a spatial reuse scheme that favors the reuse of the same slot if possible, (3) and ensuring an on-demand frame size increase only according to the node requirements in terms of throughput. To tackle different frame sizes co-existence in the network, OSTR brings a cooperative solution that consists in fixing an appointment, a date when the frame size in the network is increased. Concerning S-OSTR, it is an amendment of OSTR for wireless sensor networks. It brings the idea of a dynamic active period, since it deploys a dynamic frame size that is built slot-by-slot according to nodes arrival to the network. S-OSTR enforces the slot-by-slot frame size increase by a node activity scheduling to prolong the inactivity period in the network, and hence prolong the overall network lifetime for wireless sensor networks. Our contributions are both based on the new dynamic TDMA frame size increase that consists in increasing the frame size slot-by-slot aiming to achieve a shorter frame size, and hence improve the channel utilization, and reduce the energy consumption. The performance analysis of OSTR and S-OSTR shows that they present good potentials to support QoS requirements, to provide energy-efficiency, to ensure fair medium access, to accommodate network topology changes and finally, to enhance robustness against scalability. The impact of this new TDMA frame size increase technique on the medium access control protocol performance is highlighted through multiple simulations of OSTR and S-OSTR. Multiple comparative studies are also handled to point out the effectiveness of this new technique and the soundness of our contributions

An Opportunistic Large Array (OLA) is a form of cooperative diversity in which a large group of simple, inexpensive relays operate without any mutual coordination, but naturally fire together in response to the energy received from a single source or another OLA. The main contributions of this thesis are the introduction of two OLA-based routing protocols: OLA Concentric Routing Algorithm (OLACRA), which is an upstream routing algorithm suitable for static wireless sensor networks (WSNs), and OLA Routing On-Demand (OLAROAD), which is a robust reactive routing scheme suitable for mobile ad hoc networks (MANETs). In fixed multi-hop wireless sensor networks with a single sink, where energy conservation is often a concern, simulations of the new algorithms show as much as 80% of the transmit energy required to broadcast data can be saved, relative to existing OLA-based broadcasting approaches. In MANETs, where robustness of the routes is an important performance indicator, OLAROAD-based cooperative routes last much longer compared to their state-of-art multi-hop non-cooperative transmission (CT)-based counterparts. However, OLACRA and OLAROAD have higher node participation, and thereby lower throughput, in comparison with the non-CT schemes. To improve the throughput, and thereby bandwidth utilization, the properties of uplink OLAs and their suppression regions are carefully studied. Based on the observations, Hop-Optimized OLACRA (HOLA), which is a variant of OLACRA, and has the maximum bandwidth utilization amongst all the OLA unicast schemes studied, is proposed. HOLA routes have bandwidth utilization comparable to non-CT schemes, but a much lower (~10 dB less) transmit power per node. The last section of this thesis treats the MAC design for OLA-based networks. In contrast to non-CT networks, a 802.11-based RTS/CTS MAC scheme is shown to reduce the reliability in OLA unicast schemes. A distributed cluster-head-based MAC scheme for channel reservation and OLA Size Adaptation Mechanism for link repair/maintenance are proposed for OLA-based networks. The performances of these protocols are shown to be comparable to a non-CT multihop scheme using the RTS/CTS/DATA/ACK handshake-based link layer design.

Most mobile nodes are operated using batteries, protocols which conserve energy are of interest. The Dynamic Directional Power Control Protocol (DDPC) is a protocol that dynamically varies the energy used in directional transmission to increase the battery life of the transmitter without sacrificing connectivity with the receiver. The advantage of DDPC is that it takes into account the remaining battery power of a node before changing its transmission power. DDPC can achieve a higher network lifetime when compared to a network where nodes use a fixed transmit power level. Meanwhile DDPC dynamically reduces the energy consumed by a node in transmission. It can also reach nodes far from the transmitter by using directional antennas.

Energy efficiency has become a very topical issue that has been discussed throughout the European Union for preventing negative environmental impacts that have been associated with the consumption of energy. In the residential sector have mainly municipalities set strict requirements for the reduction of energy consumption while the renewable energy has been asked. Different concepts of low-energy buildings have been developed to reduce the cost of operation and maintenance in existing buildings such as in new ones. This thesis has aimed to minimize the energy cost of a large building which has had low energy consumption features originally. Energy reviews has been initiated in order to be able for showing how the house electricity could be carried out even more efficiently. The work was initiated through a literature study to clearly increase the reliability on the energy subject. Different concepts of low-energy buildings have been treated in connection with its specifications, afterward those have been compared with the obtained results. An analysis of the building’s energy use has been carried out as well as economic evaluation has been considered in order to the viability of the energy efficiency measures that have been proposed. Energy demand for the studied building has been valued at 48, 7 kWh/m2 annually in its original form. The obtained value has been lower than the required energy which has been promoted in Building Regulations, BBR 18. After the improvement of building has been performed, by using a package of measures, the building has been upgraded to a passive house level and the energy demand has become 21, 5 kWh/m2 annually. A reasonably large amount of energy has been reduced in connection with the improvement package as well as the whole profitability has proven to be economic sustainable. By integrating solar energy systems in the building, its result has shown a biggest benefit for saving energy. / Energieffektiviseringen har blivit en mycket aktuell fråga som har diskuterats inom Europeiska Unionen för att förebygga negativa de miljöpåverkan som förknippats med energiförbrukning. Inom bostadssektorn har främst kommuner ställt strikta krav som har fått energianvändningen att reduceras samtidigt som har brukande av förnybara energin gynnats. Olika koncept av lågenergibyggnader har därför utvecklats för att begränsa kostnader för drift och underhåll. Examensarbetets syfte har varit att kostnadseffektivt minimera energibehovet i ett flerbostadshus som från början har lågenergi inslag. En energikartläggning har inletts för att sedan kunna visa hur hus el skulle kunna utföras ännu effektivare. Arbetet har inletts med en litteraturstudie för att tydligt öka kunskapen i ämnet energihushållning. Olika begrepp av lågenergibyggnader har behandlats i samband med dess kravspecifikationer som efteråt har jämförts med det erhållna resultatet. Det har också genomförts en analys över byggnadens energianvändning. Ekonomiska bedömningen har beaktats i analysen för att överväga lönsamheten av de energieffektiviserande åtgärderna som har föreslagits. Den evaluerade byggnadskroppen har inledningsvis åtgärdats individuellt för att se vilka av de förbättringsmöjligheterna som har medfört störst energibesparing. Därefter har det gjorts flera energioptimeringsåtgärder samtidigt. Dock har utredningen visat sig vara omöjlig för att spara en stor energimängd med enstaka åtgärder. Energiprestanda för den studerade byggnaden har beräknats till 48,7 kWh/m2 årligen i sitt originalutförande, vilket har varit lägre än den energigränsen som förespråkats i Boverkets byggregler 18 då huset konstruerades. Efter vidtagande av åtgärdspaketet har energibehov kommits åt passivhusnivån med en prestanda på 21,5 kWh/m2 per år. En någorlunda stor mängd av energin har reducerats i samband med åtgärdspaketet samt att den totala lönsamheten har visat sig vara ekonomisk hållbar. Solenergisystem har varit den största fördelen till att energibesparingen har kunnat säkerställas.

Analog-to-digital converters (ADCs) are key design blocks in state-of-art image, capacitive, and biomedical sensing applications. In these sensing applications, algorithmic ADCs are the preferred choice due to their high resolution and low area advantages. Algorithmic ADCs are based on the same operating principle as that of pipelined ADCs. Unlike pipelined ADCs where the residue is transferred to the next stage, an N-bit algorithmic ADC utilizes the same hardware N-times for each bit of resolution. Due to the cyclic nature of algorithmic ADCs, many of the low power techniques applicable to pipelined ADCs cannot be directly applied to algorithmic ADCs. Consequently, compared to those of pipelined ADCs, the traditional implementations of algorithmic ADCs are power inefficient. This thesis presents two novel energy efficient techniques for algorithmic ADCs. The first technique modifies the capacitors' arrangement of a conventional flip-around configuration and amplifier sharing technique, resulting in a low power and low area design solution. The other technique is based on the unit multiplying-digital-to-analog-converter approach. The proposed approach exploits the power saving advantages of capacitor-shared technique and capacitor-scaled technique. It is shown that, compared to conventional techniques, the proposed techniques reduce the power consumption of algorithmic ADCs by more than 85\%. To verify the effectiveness of such approaches, two prototype chips, a 10-bit 5 MS/s and a 12-bit 10 MS/s ADCs, are implemented in a 130-nm CMOS process. Detailed design considerations are discussed as well as the simulation and measurement results. According to the simulation results, both designs achieve figures-of-merit of approximately 60 fJ/step, making them some of the most power efficient ADCs to date.

An opportunistic large array (OLA) is a form of cooperative diversity in which a large group of simple, inexpensive relays or forwarding nodes operate without any mutual coordination, but naturally fire together in response to energy received from a single source or another OLA. When used for broadcast, OLAs form concentric rings around the source, and have been shown to use less energy than conventional multi-hop protocols. This simple broadcasting scheme, which is already known, is called Basic OLA. The OLA Concentric Routing Algorithm (OLACRA), which is our contribution, takes advantage of the concentric ring structure of broadcast OLAs to limit flooding on the upstream connection. By limiting the node participation, OLACRA saves over 80% of the energy compared to Basic OLA, without requiring GPS, individual node addressing, or inter-node interaction. This thesis analyzes the performance of OLACRA over 'deterministic channels' where transmissions are on non-faded orthogonal channels and on 'diversity channels' where transmissions are on Rayleigh flat fading limited orthogonal channels. The performance of diversity channels is shown to approach the deterministic channel at moderate orders of diversity. Enhancements to OLACRA to further improve its efficiency by flooding in the initial upstream level and limiting the downlink 'step sizes' are also considered. The protocols are tested using Monte Carlo evaluation.

[pt] As redes de sensores sem fio se constituem numa área que outorga grandes oportunidades para a oferta de uma série de aplicações inovadoras e com baixo custo. Os dispositivos destas redes são bastantes pequenos e sua fonte de alimentação são baterias. O tempo de vida destas é limitado, limitando assim o tempo da vida dos sensores e da rede como um todo. Por esta razão nos últimos anos o tema de eficiência energética tem atraído grande interesse de pesquisadores. O aumento do custo da energia e do consumo global da energia pelo setor de ICT (Information and Communications Technologies) têm crescido vertiginosamente devido ao aumento continuo do número de clientes e da demanda por aplicações de maior complexidade. Por tudo isso têm sido desenvolvidos distintos métodos e técnicas para economizar energia nas RSSF. Neste trabalho se implementam dois algoritmos que levam em conta critérios para economizar os custos de energia da rede e através de experimentos de simulação se avalia os mesmos. Nos resultados pode se observar as vantagens de trabalhar com sistemas que visam a eficiência energética. / [en] The WSNs (Wireless Sensor Networks) belong to an area that gives rise to great opportunities to spread innovative and low cost applications. These kinds of networks are composed of tiny devices with limited energy. The main source of power supply for WSNs are batteries, which are limited in cycle life, thus limiting the sensors lifetime and the network as a whole. Due to that fact, the energy efficiency network is becoming the main concern to be addressed by researchers. Rising energy prices and global energy consumption by the ICT (Information and Communications Technologies) sector have grown dramatically due to the continuous increase in customer number and the demand for more complex applications. For the reasons outlined above, different energy-saving techniques for WSNs have been developed. Two energy-saving algorithms for WSNs were implemented in this thesis, and they were tested by experimental evaluation using simulation. The results obtained from the simulations showed the advantages of working with systems aiming at energy efficiency.

Sewer and oil pipeline spillage issues have become major causes of pollution in urban and rural areas usually caused by blockages in the water storage and drainage system, and oil spillage of underground oil pipelines. An effective way of avoiding this problem will be by deploying some mechanism to monitor these installations at each point in time and reporting unusual liquid activity to the relevant authorities for prompt action to avoid a flooding or spillage occurrence. This research work presents a low cost energy efficient liquid level monitoring technique using Radio Frequency Identification Technology. Passive UHF RFID tags have been designed, modelled and optimized. A simple rectangular tag, the P-shaped tag and S-shaped tag with UHF band frequency of operation (850-950 MHz) has been designed and modelled. Detailed parametric analysis of the rectangular tag is made and the optimised design results analysed and presented in HFSS and Matlab. The optimised rectangular tag designs are then deployed as level sensors in a gully pot. Identical tags were deployed to detect 4 distinct levels in alternate positions and a few inches in seperation distance within the gully pot height (Low, Mid, High and Ultra high). The radiation characteristic of tag sensors in deployment as modelled on HFSS is observed to show consistent performance with application requirements. An in-manhole chamber antenna for an underground communication system is analysed, designed, deployed and measured. The antenna covers dual-band impedance bandwidths (i.e. 824 to 960 MHz, and 1710 to 2170 MHz). The results show that the antenna prototype exhibits sufficient impedance bandwidth, suitable radiation characteristics, and adequate gains for the required underground wireless sensor applications. Finally, a Linearly Shifted Quadrifilar Helical Antenna (LSQHA) designed using Genetic Algorithm optimisation technique for adoption as an RFID reader antenna is proposed and investigated. The new antenna confirms coverage of the RFID bandwidth 860-960 MHz with acceptable power gain of 13.1 dBi.

Esta dissertação de mestrado propõe uma hierarquia de memória para a Estimação de Movimento e de Disparidade (ME/DE) centrada nas referências da codificação, estratégia chamada de Reference-Centered Data Reuse (RCDR), com foco em redução de energia em codificadores de vídeo multivistas (MVC - Multiview Video Coding). Nos codificadores MVC, a ME/DE é responsável por praticamente 98% do consumo total de energia. Além disso, até 90% desta energia está relacionada com a memória do codificador: (a) acessos à memória externa para a busca das referências da ME/DE (45%) e (b) memória interna (cache) para manter armazenadas as amostras da área de busca e enviá-las para serem processadas pela ME/DE (45%). O principal objetivo deste trabalho é minimizar de maneira conjunta a energia consumida pelo módulo de ME/DE com relação às memórias externa e interna necessárias para a codificação MVC. A hierarquia de memória é composta por uma memória interna (a qual armazena a área de busca inteira), um controle dinâmico para a estratégia de power-gating da memória interna e um compressor de resultados parciais. Um controle de buscas foi proposto para explorar o comportamento da busca com o objetivo de atingir ainda mais reduções de energia. Além disso, este trabalho também agrega à hierarquia de memória um compressor de quadros de referência de baixa complexidade. A estratégia RCDR provê reduções de até 68% no consumo de energia quando comparada com estratégias estadoda- arte que são centradas no bloco atual da codificação. O compressor de resultados parciais é capaz de reduzir em 52% a comunicação com memória externa necessária para o armazenamento desses elementos. Quando comparada a técnicas de reuso de dados que não acessam toda área de busca, a estratégia RCDR também atinge os melhores resultados em consumo de energia, visto que acessos regulares a memórias externas DDR são energeticamente mais eficientes. O compressor de quadros de referência reduz ainda mais o número de acessos a memória externa (2,6 vezes menos acessos), aliando isso a perdas insignificantes na eficiência da codificação MVC. A memória interna requerida pela estratégia RCDR é até 74% menor do que estratégias centradas no bloco atual, como Level C. Além disso, o controle dinâmico para a técnica de power-gating provê reduções de até 82% na energia estática, o que é o melhor resultado entre os trabalho relacionados. A energia dinâmica é tratada pela técnica de união dos blocos candidatos, atingindo ganhos de mais de 65%. Considerando as reduções de consumo de energia atingidas pelas técnicas propostas neste trabalho, conclui-se que o sistema de hierarquia de memória proposto nesta dissertação atinge seu objetivo de atender às restrições impostas pela codificação MVC, no que se refere ao processamento do módulo de ME/DE. / This Master Thesis proposes a memory hierarchy for the Motion and Disparity Estimation (ME/DE) centered on the encoding references, called Reference-Centered Data Reuse (RCDR), focusing on energy reduction in the Multiview Video Coding (MVC). In the MVC encoders the ME/DE represents more than 98% of the overall energy consumption. Moreover, in the overall ME/DE energy, up to 90% is related to the memory issues, and only 10% is related to effective computation. The two items to be concerned with: (1) off-chip memory communication to fetch the reference samples (45%) and (2) on-chip memory to keep stored the search window samples and to send them to the ME/DE processing core (45%). The main goal of this work is to jointly minimize the on-chip and off-chip energy consumption in order to reduce the overall energy related to the ME/DE on MVC. The memory hierarchy is composed of an onchip video memory (which stores the entire search window), an on-chip memory gating control, and a partial results compressor. A search control unit is also proposed to exploit the search behavior to achieve further energy reduction. This work also aggregates to the memory hierarchy a low-complexity reference frame compressor. The experimental results proved that the proposed system accomplished the goal of the work of jointly minimizing the on-chip and off-chip energies. The RCDR provides off-chip energy savings of up to 68% when compared to state-of-the-art. the traditional MBcentered approach. The partial results compressor is able to reduce by 52% the off-chip memory communication to handle this RCDR penalty. When compared to techniques that do not access the entire search window, the proposed RCDR also achieve the best results in off-chip energy consumption due to the regular access pattern that allows lots of DDR burst reads (30% less off-chip energy consumption). Besides, the reference frame compressor is capable to improve by 2.6x the off-chip memory communication savings, along with negligible losses on MVC encoding performance. The on-chip video memory size required for the RCDR is up to 74% smaller than the MB-centered Level C approaches. On top of that, the power-gating control is capable to save 82% of leakage energy. The dynamic energy is treated due to the candidate merging technique, with savings of more than 65%. Due to the jointly off-chip communication and on-chip storage energy savings, the proposed memory hierarchy system is able to meet the MVC constraints for the ME/DE processing.

Esta dissertação de mestrado propõe uma hierarquia de memória para a Estimação de Movimento e de Disparidade (ME/DE) centrada nas referências da codificação, estratégia chamada de Reference-Centered Data Reuse (RCDR), com foco em redução de energia em codificadores de vídeo multivistas (MVC - Multiview Video Coding). Nos codificadores MVC, a ME/DE é responsável por praticamente 98% do consumo total de energia. Além disso, até 90% desta energia está relacionada com a memória do codificador: (a) acessos à memória externa para a busca das referências da ME/DE (45%) e (b) memória interna (cache) para manter armazenadas as amostras da área de busca e enviá-las para serem processadas pela ME/DE (45%). O principal objetivo deste trabalho é minimizar de maneira conjunta a energia consumida pelo módulo de ME/DE com relação às memórias externa e interna necessárias para a codificação MVC. A hierarquia de memória é composta por uma memória interna (a qual armazena a área de busca inteira), um controle dinâmico para a estratégia de power-gating da memória interna e um compressor de resultados parciais. Um controle de buscas foi proposto para explorar o comportamento da busca com o objetivo de atingir ainda mais reduções de energia. Além disso, este trabalho também agrega à hierarquia de memória um compressor de quadros de referência de baixa complexidade. A estratégia RCDR provê reduções de até 68% no consumo de energia quando comparada com estratégias estadoda- arte que são centradas no bloco atual da codificação. O compressor de resultados parciais é capaz de reduzir em 52% a comunicação com memória externa necessária para o armazenamento desses elementos. Quando comparada a técnicas de reuso de dados que não acessam toda área de busca, a estratégia RCDR também atinge os melhores resultados em consumo de energia, visto que acessos regulares a memórias externas DDR são energeticamente mais eficientes. O compressor de quadros de referência reduz ainda mais o número de acessos a memória externa (2,6 vezes menos acessos), aliando isso a perdas insignificantes na eficiência da codificação MVC. A memória interna requerida pela estratégia RCDR é até 74% menor do que estratégias centradas no bloco atual, como Level C. Além disso, o controle dinâmico para a técnica de power-gating provê reduções de até 82% na energia estática, o que é o melhor resultado entre os trabalho relacionados. A energia dinâmica é tratada pela técnica de união dos blocos candidatos, atingindo ganhos de mais de 65%. Considerando as reduções de consumo de energia atingidas pelas técnicas propostas neste trabalho, conclui-se que o sistema de hierarquia de memória proposto nesta dissertação atinge seu objetivo de atender às restrições impostas pela codificação MVC, no que se refere ao processamento do módulo de ME/DE. / This Master Thesis proposes a memory hierarchy for the Motion and Disparity Estimation (ME/DE) centered on the encoding references, called Reference-Centered Data Reuse (RCDR), focusing on energy reduction in the Multiview Video Coding (MVC). In the MVC encoders the ME/DE represents more than 98% of the overall energy consumption. Moreover, in the overall ME/DE energy, up to 90% is related to the memory issues, and only 10% is related to effective computation. The two items to be concerned with: (1) off-chip memory communication to fetch the reference samples (45%) and (2) on-chip memory to keep stored the search window samples and to send them to the ME/DE processing core (45%). The main goal of this work is to jointly minimize the on-chip and off-chip energy consumption in order to reduce the overall energy related to the ME/DE on MVC. The memory hierarchy is composed of an onchip video memory (which stores the entire search window), an on-chip memory gating control, and a partial results compressor. A search control unit is also proposed to exploit the search behavior to achieve further energy reduction. This work also aggregates to the memory hierarchy a low-complexity reference frame compressor. The experimental results proved that the proposed system accomplished the goal of the work of jointly minimizing the on-chip and off-chip energies. The RCDR provides off-chip energy savings of up to 68% when compared to state-of-the-art. the traditional MBcentered approach. The partial results compressor is able to reduce by 52% the off-chip memory communication to handle this RCDR penalty. When compared to techniques that do not access the entire search window, the proposed RCDR also achieve the best results in off-chip energy consumption due to the regular access pattern that allows lots of DDR burst reads (30% less off-chip energy consumption). Besides, the reference frame compressor is capable to improve by 2.6x the off-chip memory communication savings, along with negligible losses on MVC encoding performance. The on-chip video memory size required for the RCDR is up to 74% smaller than the MB-centered Level C approaches. On top of that, the power-gating control is capable to save 82% of leakage energy. The dynamic energy is treated due to the candidate merging technique, with savings of more than 65%. Due to the jointly off-chip communication and on-chip storage energy savings, the proposed memory hierarchy system is able to meet the MVC constraints for the ME/DE processing.