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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
121

Design of a Gigabit Router Packet Buffer using DDR SDRAM Memory / Design av en Packetbuffer för en Gigabit Router användandes DDR Minne

Ferm, Daniel January 2006 (has links)
<p>The computer engineering department at Linköping University has a research project which investigates the use of an on-chip network in a router. There has been an implementation of it in a FPGA and for this router there is a need for buffer memory. This thesis extends the router design with a DDR memory controller which uses the features provided by the Virtex-II FPGA family.</p><p>The thesis shows that by carefully scheduling the DDR SDRAM memory high volume transfers are possible and the memory can be used quite effciently despite its rather complex interface.</p><p>The DDR memory controller developed is part of a packet buffer module which is integrated and tested with a previous, slightly modifed, FPGA based router design. The performance of this router is investigated using real network interfaces and due to the poor network performance of desktop computers special hardware is developed for this purpose.</p>
122

Implementation of a PCI based gigabit Ethernet network adapter on an FPGA together with a Linux device driver

Karlsson, Thomas, Lindgren, Svein-Erik January 2006 (has links)
<p>Here at ISY research is performed on network processors. In order to evaluate the processors there is a need to have full control of every aspect of the transmission. This is not the case if you use a proprietary technology. Therefore the need for a well documented gigabit Ethernet network interface has emerged. </p><p>The purpose of this thesis work has been to design and implement an open source gigabit Ethernet controller in a FPGA together with a device driver for the Linux operating system Implementation has been done in Verilog for the hardware part and the software was developed in C.</p><p>We have implemented a fully functional gigabit Ethernet interface onto a Xilinx Virtex II-1500 FPGA together with a Linux device driver. The design uses approximately 7200 LUTs and 48 block RAMs including the opencores PCI bridge.</p>
123

Combining the Good Things from Vehicle Networks and High-Performance Networks

Armide, Misikir, Ecker, Herbert January 2007 (has links)
<p>The aim of this Master’s thesis is to develop a solution for combining speed and performance of switched Ethernet with the real time capability and determinism of sophisticated in- vehicle networks. After thorough research in vehicle network standards, their demands and features, the</p><p>Flexible Time Division Multiple Access (FTDMA) protocol of FlexRay was chosen to be applied on a switched Ethernet architecture since it can accommodate both hard real time tasks and soft real time tasks. To provide hard real time capability, what this paper focuses on, a media access method was developed by creating static TDMA schedules for each node’s sending and receiving</p><p>port according to a certain traffic assumption. To validate the developed media access algorithm several examples with different traffic assumptions and architectures were generated and</p><p>investigated based on their sending and receiving utilization. A second method for validating and thus proving the functionality of the algorithm was by simulation. Therefore the Matlab Simulink</p><p>media library extension TRUE TIME was used to simulate a simple example with 100% sending and receiving utilization for each node.</p>
124

Real-Time Ethernet Networks Simulation Model

Pensawat, Taweewit January 2006 (has links)
<p>Real-time networks are traditionally built on proprietary standards, resulting in a interoperability issues between different real-time netork implementations and traditional data networks mainly used in back office operations.</p><p>Continuity and supplier independence are a cause of concern with current</p><p>proprietary real-time networks.</p><p>This project evaluates the capability of providing real-time traffic over</p><p>switched Ethernet with EDF scheduling algorithm implemented at both the</p><p>switch and the node. By using OMNET simulation tool at packet level, it</p><p>is shown that the EDF implementation in switched Ethernet can guarantee</p><p>real-time traffic over the network and at the same time supporting non real-time traffic.</p>
125

High performance communication support for sockets-based applications over high-speed networks

Balaji, Pavan, January 2006 (has links)
Thesis (Ph. D.)--Ohio State University, 2006. / Title from first page of PDF file. Includes bibliographical references (p. 255-261).
126

A digital relaying algorithm for integrated power system protection and control

Demeter, Elemer 25 July 2005
Recent developments in data packets based high speed digital communications have opened the door for new types of applications in power system protection and control. Intelligent Electronic Devices (IEDs) are equipped with various communication capabilities that make their functional integration a natural next step. Existing integration of substation equipment is not capable of clustering with the purpose of pooling hardware resources. <p> Presently, every electric device requiring protection has its dedicated hardware performing the predetermined set of protective functions. A new function-based protection and control philosophy is proposed, based on an open-system solution. In the proposed system, the resources of the protective and control hardware are pooled, and as a clustered system provide each protected unit (line, transformer, breaker, etc) with functions required for complete direct and backup protection. <p> The work presented in this thesis identifies the performance requirements of a digital relaying algorithm for processing samples that are sent across Ethernet-based communication channels. The work shows the shortcomings and unstable performance of widely used protective algorithms in accommodating data samples that are out of step from their proper position due to variable time delays of the communications media. A new digital relaying algorithm was developed that is able to extract the amplitude and phase angle of signals from data samples received across Ethernet networks with variable jitter. <p> The performance of the algorithm was tested by using the recovered phasor amplitude and phase angle information in protective solutions. The results show that there is significant flexibility in the algorithm that can be used to facilitate less performant communication channels, or, to take advantage of faster communications channels by reducing the response time of the protective function. <p> The results show that the algorithm works well with variable length data windows, and variable sampling frequencies. Higher sampling rates make communications problems more visible, but the presented algorithm is able to compensate for wide variations in network performance, effectively maintaining sampled signal phase and amplitude information during network performance fluctuations.
127

Software Communication Architecture - Waveform Distribution with MHAL

Dackenberg, Jens January 2010 (has links)
For a long time radio devices have been constructed in hardware with a fixed functionality. This way of constructing radio devices is starting to change with the concept of Software Defined Radio (SDR) evolving. The SDR concept leads to more flexible and long lasting radio devices. In order to make the radio software more standardized and portable, the U.S. military has defined the Software Communication Architecture (SCA). Internal communication within the SCA is done by CORBA, which limit waveforms to be only distributed over CORBA-capable hardware. The U.S. military has defined the Modem Hardware Abstraction Layer(MHAL) to enable distribution over devices not supporting CORBA. This thesis presents an implementation of MHAL and an underlying transport mechanism based on Ethernet. The implementation is done for the OSSIE package. The implementation is evaluated both in terms of real-time and throughput performance. The results show that MHAL achieves good performance, in comparison to CORBA, and can greatly be used to distribute waveforms over both CORBA and non-CORBA capable devices.
128

Combining the Good Things from Vehicle Networks and High-Performance Networks

Armide, Misikir, Ecker, Herbert January 2007 (has links)
The aim of this Master’s thesis is to develop a solution for combining speed and performance of switched Ethernet with the real time capability and determinism of sophisticated in- vehicle networks. After thorough research in vehicle network standards, their demands and features, the Flexible Time Division Multiple Access (FTDMA) protocol of FlexRay was chosen to be applied on a switched Ethernet architecture since it can accommodate both hard real time tasks and soft real time tasks. To provide hard real time capability, what this paper focuses on, a media access method was developed by creating static TDMA schedules for each node’s sending and receiving port according to a certain traffic assumption. To validate the developed media access algorithm several examples with different traffic assumptions and architectures were generated and investigated based on their sending and receiving utilization. A second method for validating and thus proving the functionality of the algorithm was by simulation. Therefore the Matlab Simulink media library extension TRUE TIME was used to simulate a simple example with 100% sending and receiving utilization for each node.
129

A digital relaying algorithm for integrated power system protection and control

Demeter, Elemer 25 July 2005 (has links)
Recent developments in data packets based high speed digital communications have opened the door for new types of applications in power system protection and control. Intelligent Electronic Devices (IEDs) are equipped with various communication capabilities that make their functional integration a natural next step. Existing integration of substation equipment is not capable of clustering with the purpose of pooling hardware resources. <p> Presently, every electric device requiring protection has its dedicated hardware performing the predetermined set of protective functions. A new function-based protection and control philosophy is proposed, based on an open-system solution. In the proposed system, the resources of the protective and control hardware are pooled, and as a clustered system provide each protected unit (line, transformer, breaker, etc) with functions required for complete direct and backup protection. <p> The work presented in this thesis identifies the performance requirements of a digital relaying algorithm for processing samples that are sent across Ethernet-based communication channels. The work shows the shortcomings and unstable performance of widely used protective algorithms in accommodating data samples that are out of step from their proper position due to variable time delays of the communications media. A new digital relaying algorithm was developed that is able to extract the amplitude and phase angle of signals from data samples received across Ethernet networks with variable jitter. <p> The performance of the algorithm was tested by using the recovered phasor amplitude and phase angle information in protective solutions. The results show that there is significant flexibility in the algorithm that can be used to facilitate less performant communication channels, or, to take advantage of faster communications channels by reducing the response time of the protective function. <p> The results show that the algorithm works well with variable length data windows, and variable sampling frequencies. Higher sampling rates make communications problems more visible, but the presented algorithm is able to compensate for wide variations in network performance, effectively maintaining sampled signal phase and amplitude information during network performance fluctuations.
130

Design, Simulation, and Analysis of Substation Automation Networks

Kembanur Natarajan, Elangovan 2011 May 1900 (has links)
Society depends on computer networks for communication. The networks were built to support and facilitate several important applications such as email, web browsing and instant messaging. Recently, there is a significant interest in leveraging modern local and wide area communication networks for improving reliability and performance in critical infrastructures. Emerging critical infrastructure applications, such as smart grid, require a certain degree of reliability and Quality of Service (QoS). Supporting these applications requires network protocols that enable delay sensitive packet delivery and packet prioritization. However, most of the traditional networks are designed to provide best effort service without any support for QoS. The protocols used in these networks do not support packet prioritization, delay requirements and reliability. In this thesis, we focus on the design and analysis of communication protocols for supporting smart grid applications. In particular, we focus on the Substation Automation Systems (SAS). Substations are nodes in the smart grid infrastructure that help the in transportation of power by connecting the transmission and distribution lines. The SAS applications are con figured to operate with minimal human intervention. The SAS monitors the line loads continuously. If the load values are too high and can lead to damage, the SAS declares those conditions as faults. On fault detection, the SAS must take care of the communication with the relay to open the circuit to prevent any damage. These messages are of high priority and require reliable, delay sensitive delivery. There is a threshold for the delay of these messages, and a slight increase in the delay above the threshold might cause severe damages. Along with such high priority messages, the SAS has a lot of background traffic as well. In spite of the background traffic, the substation network must take care of delivering the priority messages on time. Hence, the network plays a vital role in the operation of the substation. Networks designed for such applications should be analyzed carefully to make sure that the requirements are met properly. We analyzed and compared the performance of the SAS under di erent network topologies. By observing the characteristics of the existing architectures, we came up with new architectures that perform better. We have suggested several modi cations to existing solutions that allow significant improvement in the performance of the existing solutions.

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