The voltage source inverter (VSI) is certainly the most popular topology used in dc to ac power conversion. Virtually every commercial electric motor is driven by a VSI. There is a need for smaller and more efficient drives in high performance applications that is dictating unprecedented power density requirements on airborne motor drive systems. In reply to this need, higher switching frequencies are being sought and new switching devices like Silicon Carbide (SiC) JFETs have emerged. Although faster switching rates favor a reduction in the size of passive components and alleviate the current ripple in the inverter, a penalty is paid on switching losses. Owing to their low switching energy profile, SiC JFETs stand as promising candidates in high switching frequency environments. Their normally-on nature, however, raises a level of discomfort among designers due to the added complexities in the gate drive circuitry and the increased risk of dc bus shoot-through faults in voltage source inverters. Despite of these challenges the use of SiC JFETs continues proliferating in high power density applications. In an effort to study the new challenges introduced by this trend a 2 kW IGBT-based three-phase voltage source inverter operating at 65 kHz was designed, built, and tested. In addition a novel overcurrent protection residing in the inverter dc link is proposed in response to the concern of using normally-on devices in voltage source inverters. Successful hardware validation of both the VSI and the overcurrent protection circuit is supported with experimental results. / Master of Science

Synchronous buck converter based multiphase architectures are evaluated to determine whether or not the most widespread voltage regulator topology can meet the power delivery requirements of next generation computer microprocessors. According to the prognostications, the load current will rise to 200A along with the decrease of the supply voltage to 0.5V and staggering tight dynamic and static load line tolerances. In view of these demands, researchers face serious challenges to bring forth compliant solutions that can further offer acceptable conversion efficiencies and minimum mainboard area occupancy. Among the most prominent investigation fronts are those surveying fundamental technology improvements aiming at making power semiconductor devices more effective at high switching frequency. The latter is of critical importance as the increase of the switching frequency is fundamentally recognized as the way forward to enhance power density conversion. Provided that switching losses must be kept low to enable the miniaturization of the filter components, one primary goal is to cope with semiconductor and system integration technologies enabling fast dynamic operation of ultra-low ON resistance power switches. This justifies the main focus of this thesis work, centered around a comprehensive analysis of the MOSFET switching behavior in the synchronous buck converter. The MOSFETs dynamic operation, far from being well describable with the traditional clamped inductive hard-switching mode, is strongly influenced by a number of frequently ignored linear and nonlinear parasitic elements that must be taken into account in order to fully predict real switching waveforms, understand their dynamics, and most importantly, identify and quantify the related mechanisms leading to heat generation. This will be revealed from in-depth investigations of the switched converter under fast switching speeds and heavy load. Recognizing the key relevance of appropriate modeling tools that support this task, the second focal point of the thesis aims at developing a number of suitable models for the switching analysis of power MOSFETs. Combined with a series of design guidelines and optimization procedures, these models form the basis of a proposed methodological approach, where numerical computations replace the usually enormous experimental effort to elucidate the most effective pathways towards reducing power losses. This gives rise to the concept referred to as virtual design loop, which is successfully applied to the development of a new power MOSFET technology offering outstanding dynamic and static performance characteristics. From a system perspective, the limits of the power density conversion will be explored for this and other emerging technologies that promise to open up a new paradigm in power integration capabilities.

abstract: Point of Load (PoL) converters are important components to the power distribution system in computer power supplies as well as automotive, space, nuclear, and medical electronics. These converters often require high output current capability, low form factor, and high conversion ratios (step-down) without sacrificing converter efficiency. This work presents hybrid silicon/gallium nitride (CMOS/GaN) power converter architectures as a solution for high-current, small form-factor PoL converters. The presented topologies use discrete GaN power devices and CMOS integrated drivers and controller loop. The presented power converters operate in the tens of MHz range to reduce the form factor by reducing the size of the off-chip passive inductor and capacitor. Higher conversion ratio is achieved through a fast control loop and the use of GaN power devices that exhibit low parasitic gate capacitance and minimize pulse swallowing. This work compares three discrete buck power converter architectures: single-stage, multi-phase with 2 phases, and stacked-interleaved, using components-off-the-shelf (COTS). Each of the implemented power converters achieves over 80% peak efficiency with switching speeds up-to 10MHz for high conversion ratio from 24V input to 5V output and maximum load current of 10A. The performance of the three architectures is compared in open loop and closed loop configurations with respect to efficiency, output voltage ripple, and power stage form factor. Additionally, this work presents an integrated CMOS gate driver solution in CMOS 0.35um technology. The CMOS integrated circuit (IC) includes the gate driver and the closed loop controller for directly driving a single-stage GaN architecture. The designed IC efficiently drives the GaN devices up to 20MHz switching speeds. The presented controller technique uses voltage mode control with an innovative cascode driver architecture to allow a 3.3V CMOS devices to effectively drive GaN devices that require 5V gate signal swing. Furthermore, the designed power converter is expected to operate under 400MRad of total dose, thus enabling its use in high-radiation environments for the large hadron collider at CERN and nuclear facilities. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2018

General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Buck converter is a common circuit topology to fulfill step-down conversion, especially in low-power application since it is well-studied and straightforward. However, it suffers from low duty cycle under high step-down condition, and typically operates in continuous conduction mode (CCM) that generates large switching loss. On the other hand, as an extension of the buck converter, tapped-inductor (TI) buck converter has larger duty cycle while maintaining the structural simplicity. Therefore, the main objective of this thesis is to explore the potential of TI buck converter as a wide conversion range, high power density and high efficiency topology for low power application. To achieve high efficiency at switching frequency of MHz-level, synchronous conduction mode (SCM) is applied for turn-on losses elimination. The operation principle and power stage design of SCM TI buck is first introduced. The design of high switching frequency coupled inductor is emphasized since its size plays a critical role in power density. Loss breakdown is also provided to perform a comprehensive topological study. Secondly, detailed zero-voltage-switching (ZVS) condition of SCM TI buck is derived so that the converter does not experience redundant circulating energy. The experimental results of 15-W SCM TI buck converter prototypes are provided with 90.7% of peak power stage efficiency. The size of coupled inductor is down to 116 mm3. To enhance light-load efficiency, a variable frequency control scheme based on derived ZVS conditions is implemented with the switching frequency ranging from 2 MHz to 2.9 MHz. / Master of Science / General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Typically, the ultimate goals of general-purpose step-down converter are versatility, high efficiency and compact size. Recently, tapped-inductor (TI) buck converter is studied since it could overcome the drawback of commonly used buck converter under high step-down conversion. Therefore, the potential of TI buck converter as a general-purpose step-down converter candidate is explored in this thesis, including control method, hardware design, etc. The thesis verifies that TI buck converter could have compact size while remaining efficient and adaptable.

Le projet de cette thèse est de réaliser un convertisseur DC/DC isolé à haute fréquence de découpage basé sur la mise en œuvre de composants en GaN. Le but est d'augmenter très fortement les densité de puissance commutées par rapport aux solutions actuelles. Cette thèse mets en oeuvre les composants GaN afin de déterminer les meilleurs conditions de fonctionnement possible. Une fois les points critiques mis en avant, on étudie les structures de circuit de commande adapté pour les HEMT GaN d'EPC et un circuit intégré pour la commande est étudié et mis en oeuvre. Le layout global de la carte a un rôle important en termes d'intégration et d'optimisation CEM, il est donc discuté et des règles de routage sont proposées. Enfin, on étudie plusieurs structures de puissance et on les met en oeuvre pour vérifier le bon fonctionnement et le respect du cahier des charges. / This study consist in the development of a high frequency insulated DC/DC converter based on GaN power devices. The goal is to increase significantly the power density in comparison with actual converter solutions. This thesis evaluate the GaN components performances to determine the best working conditions. Once the critical points highlighted, gate circuit topologies suitable for EPC GaN HEMT are studied and an integrated IC is designed and implemented. The overall layout of the card has an important role in terms of integration and EMC optimization, so it is discussed and routing rules are proposed. Finally, we study several power structures and implement them to verify proper operation and their compliance with specifications.

This work deals with high power pulse converters (tens of kW) using new semiconductor devices of silicon carbide (SiC). Firstly the current state of the issue is analyzed. A research in a specific area of high power buck converters with pulse transformer follows. There was a strong emphasis on minimizing size and weight. The design process was focused also on reliability and robustness. To achieve the defined objectives, it was necessary to use the latest available switching transistors and diodes, and an unusually high switching frequency (100 kHz at a power of about 16 kW). Due to the high switching frequency, we achieved small size of pulse transformers and output chokes. An optimization of high-frequency pulse transformer with demand on minimum volume and weight of core and windings represents a separate theoretical part of the thesis. There have been proposed several analytical solutions of optimization problems, the results of which could overlap with the implementation in practice of switching power supplies. The combination of high switching frequency, fast semiconductors and the high power brings various parasitic effects to the power circuit. In the thesis, these parasitic effects are analyzed. Solutions which minimize or completely remove those effects were theoretically designed and successfully implemented, tested and finalized in experimental part of the work. Detailed description of the implementation of functional sample and series of validation measurements are included in the final part.

This work is focused on innovative construction of the industrial radial sealless pump and mainly on construction of the three phase DC/AC converter based on new semiconductor technology SiC. These new semiconductor devices allow move switching frequency up to 100 kHz. For such high switching frequency new non-conventional topology of the output filter was designed. This high frequency is currently unusual in three-phase application with output voltage 400V. High switching frequency reduces size of wound components of the output filter and its presence is accepted in terms of total weight and price of the whole system. Clear sinus waveform of the output converter voltage reduces torque ripple, EMC and extend the lifetime and reliability of mechanical parts and the whole pump drive. Three phase synchronous motor is directly placed into the pump body and is designed as slotless motor. In the inlet area is the classical bearing replaced by active magnetic bearing. It is used due to possibility to pump aggressive liquids or substances where high level of cleanness has to be guaranteed.