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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.

A built-in self test (BIST) technique for single-event transient testing in digital circuits

Balasubramanian, Anitha, January 2008 (has links)
Thesis (M. S. in Electrical Engineering)--Vanderbilt University, Aug. 2008. / Title from title screen. Includes bibliographical references.

Fully Automated Radiation Hardened by Design Circuit Construction

January 2012 (has links)
abstract: A fully automated logic design methodology for radiation hardened by design (RHBD) high speed logic using fine grained triple modular redundancy (TMR) is presented. The hardening techniques used in the cell library are described and evaluated, with a focus on both layout techniques that mitigate total ionizing dose (TID) and latchup issues and flip-flop designs that mitigate single event transient (SET) and single event upset (SEU) issues. The base TMR self-correcting master-slave flip-flop is described and compared to more traditional hardening techniques. Additional refinements are presented, including testability features that disable the self-correction to allow detection of manufacturing defects. The circuit approach is validated for hardness using both heavy ion and proton broad beam testing. For synthesis and auto place and route, the methodology and circuits leverage commercial logic design automation tools. These tools are glued together with custom CAD tools designed to enable easy conversion of standard single redundant hardware description language (HDL) files into hardened TMR circuitry. The flow allows hardening of any synthesizable logic at clock frequencies comparable to unhardened designs and supports standard low-power techniques, e.g. clock gating and supply voltage scaling. / Dissertation/Thesis / Ph.D. Electrical Engineering 2012

Aspects of copper precipitation and irradiation hardening in Fe-Cu alloys

Nicol, Alison January 2000 (has links)
No description available.

Design of High-Speed SiGe HBT BiCMOS Circuits for Extreme Environment Applications

Krithivasan, Ramkumar 02 January 2007 (has links)
The objective of this work is to investigate the suitability of applying silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) bipolar complementary metal oxide semiconductor (BiCMOS) technology to extreme environments and to design high-speed circuits in this technology to demonstrate their reliable operation under these conditions. This research focuses on exploring techniques for hardening SiGe HBT digital logic for single event upset (SEU) based on principles of radiation hardening by design (RHBD) as well as on the cryogenic characterization of SiGe HBTs and designing broadband amplifiers for operation at cryogenic temperatures. Representative circuits ranging from shift registers featuring multiple architectures to broadband analog circuits have been implemented in various generations of this technology to enable this effort.

Design techniques for radiation hardened phase-locked loops /

Nemmani, Anantha Nag. January 1900 (has links)
Thesis (M.S.)--Oregon State University, 2006. / Printout. Includes bibliographical references (leaves 47-48). Also available on the World Wide Web.

Chip Level Implementation Techniques for Radiation Hardened Microprocessors

January 2013 (has links)
abstract: Microprocessors are the processing heart of any digital system and are central to all the technological advancements of the age including space exploration and monitoring. The demands of space exploration require a special class of microprocessors called radiation hardened microprocessors which are less susceptible to radiation present outside the earth's atmosphere, in other words their functioning is not disrupted even in presence of disruptive radiation. The presence of these particles forces the designers to come up with design techniques at circuit and chip levels to alleviate the errors which can be encountered in the functioning of microprocessors. Microprocessor evolution has been very rapid in terms of performance but the same cannot be said about its rad-hard counterpart. With the total data processing capability overall increasing rapidly, the clear lack of performance of the processors manifests as a bottleneck in any processing system. To design high performance rad-hard microprocessors designers have to overcome difficult design problems at various design stages i.e. Architecture, Synthesis, Floorplanning, Optimization, routing and analysis all the while maintaining circuit radiation hardness. The reference design `HERMES' is targeted at 90nm IBM G process and is expected to reach 500Mhz which is twice as fast any processor currently available. Chapter 1 talks about the mechanisms of radiation effects which cause upsets and degradation to the functioning of digital circuits. Chapter 2 gives a brief description of the components which are used in the design and are part of the consistent efforts at ASUVLSI lab culminating in this chip level implementation of the design. Chapter 3 explains the basic digital design ASIC flow and the changes made to it leading to a rad-hard specific ASIC flow used in implementing this chip. Chapter 4 talks about the triple mode redundant (TMR) specific flow which is used in the block implementation, delineating the challenges faced and the solutions proposed to make the flow work. Chapter 5 explains the challenges faced and solutions arrived at while using the top-level flow described in chapter 3. Chapter 6 puts together the results and analyzes the design in terms of basic integrated circuit design constraints. / Dissertation/Thesis / M.S. Electrical Engineering 2013

A Structured ASIC Approach to a Radiation Hardened by Design Digital Single Sideband Modulator for Digital Radio Frequency Memories

Pemberton, Thomas B. 30 June 2010 (has links)
No description available.

Radiation damage accumulation and associated mechanical hardening in thin films and bulk materials

Dunn, Aaron Yehudah 27 May 2016 (has links)
The overall purpose of this dissertation is to develop a multi-scale framework that can simulate radiation defect accumulation across a broad range of time and length scales in metals. In order to accurately describe defect accumulation in heterogeneous microstructures and under complex irradiation conditions, simulation methods are needed that can explicitly account for the effect of non-homogeneous microstructures on damage accumulation. In this dissertation, an advanced simulation tool called spatially resolved stochastic cluster dynamics (SRSCD) is developed for this purpose. The proposed approach relies on solving spatially resolved coupled rate equations of standard cluster dynamics methods in a kinetic Monte Carlo scheme. Large-scale simulations of radiation damage in polycrystalline materials are enabled through several improvements made to this method, including a pseudo-adaptive meshing scheme for cascade implantation and implementation of this method in a synchronous parallel kinetic Monte Carlo framework. The performance of the SRSCD framework developed in this dissertation is assessed by comparison to other simulation methods such as cluster dynamics and object kinetic Monte Carlo and experimental results including helium desorption from thin films and defect accumulation in neutron-irradiated bulk iron. The computational scaling of the parallel framework is also investigated for several test cases of irradiation conditions. SRSCD is next used to investigate radiation damage in three main types of microstructures, using α-iron as a test material: iron thin films, coarse-grained bulk iron, and nanocrystalline iron. SRSCD is used to investigate the mechanisms involved with defect accumulation in irradiated materials, such as effective diffusivity of helium in thin films and the effect of grain boundary sink strength on defect accumulation in nano-grained metals, and to predict defect populations in irradiated materials for comparison with experiments. Particular emphasis is placed on the role of microstructural features such as free surfaces and grain boundaries in influencing damage accumulation. Finally, the methodology developed in this dissertation is applied in the context of multiscale modeling and experimental design. To complete the multi-scale transition between defect-level behavior and macroscopic material property changes caused by irradiation, the relationship between mechanical loading and radiation damage is investigated. The impact of radiation damage on hardening of irradiated materials is investigated by using the results of SRSCD as inputs into polycrystalline crystal plasticity simulations. This is carried out in bulk iron by fitting hardening models to experimental data from neutron irradiation of iron and then used to predict hardening under irradiation conditions beyond what has already been accomplished in experimental studies. In addition, SRSCD is used to demonstrate the temperature shift required to achieve equivalent damage accumulation in irradiation conditions with significantly differing dose rates, such as in the case of using ion irradiation to simulate damage from neutron irradiation. In this dissertation, the development of SRSCD and its application in a multi-scale framework to predict macroscopic material property changes in metals represents a significant improvement over the state of the art due to improved simulations of defect accumulation and direct upscaling of results into polycrystalline plasticity models. The tools and understanding of defect behavior developed here will allow predictive modeling of metal degradation in reactor-relevant damage environments, including the defected microstructure and macroscopic material property changes due to irradiation.

Optimization of SiGe HBT BiCMOS analog building blocks for operation in extreme environments

Jung, Seungwoo 07 January 2016 (has links)
The objective of this research is to optimize silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) BiCMOS analog circuit building blocks for operation in extreme environments utilizing design techniques. First, negative feedback effects on single-event transient (SET) in SiGe HBT analog circuits were investigated. In order to study the role of internal and external negative feedback effects on SET in circuits, two different types of current mirrors (a basic common-emitter current mirror and a Wilson current mirror) were fabricated using a SiGe HBT BiCMOS technology and exposed to laser-induced single events. The SET measurements were performed at the U.S. Naval Research Laboratory using a two-photon absorption (TPA) pulsed laser. The measured data showed that negative feedback improved SET response in the analog circuits; the highest peak output transient current was reduced by more than 50%, and the settling time of the output current upon a TPA laser strike was shortened with negative feedback. This proven negative feedback radiation hardening technique was applied later in the high-speed 5-bit flash analog-to-digital converter (ADC) for receiver chains of radar systems to improve SET response of the system.

Frequency synthesis applications of SiGe BiCMOS processes

Horst, Stephen J. 07 November 2011 (has links)
Silicon Germanium BiCMOS technology has been demonstrated as an ideal platform for highly integrated systems requiring both high performance analog and RF circuits as well as large-scale digital functionality. Frequency synthesizers are ideal candidates for this technology because the mixed-signal nature of modern frequency synthesis designs fundamentally requires both digital and analog signal processing. This research targets three areas to improve SiGe frequency synthesizers. A majority of this work focuses on applying SiGe frequency synthesizers to extreme environment applications such as space, where low temperatures and ionizing radiation are significant design issues to contend with. A second focus area involves using SiGe HBTs to minimize noise in frequency synthesizer circuits. Improved low frequency "pink" noise in SiGe HBTs provide a significant advantage over CMOS devices, and frequency synthesis circuits are significantly affected by this type of noise. However, improving thermal "white" noise is also considered. Finally, an analysis of AM-PM distortion is considered for SiGe HBTs. The studies presented focus on identifying the physical mechanisms of observed phenomena, such as single event transients or phase noise characteristics in oscillators. The ultimate goal of this research is to provide a reference of effective design parameters for circuit and system designers seeking to take advantage of the properties of SiGe device physics.

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