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The electron mobility in indium phosphideBoud, John Michael January 1988 (has links)
Hall effect and resistivity measurements have been carried out as a function of hydrostatic pressure and temperature on a number of samples of indium phosphide ranging from exceptionally pure to highly doped. In the case of pure and lightly doped InP an iterative solution of the Boltzmann Equation has been used successfully to describe the temperature and pressure dependence of mobility over the helium temperature range. Measurements on the highest mobility samples of InP ever grown suggest that the conduction band deformation potential is 6. 7eV. For the case of highly doped material it was found that a theory of scattering from a correlated distribution of impurities describes both the temperature and pressure dependence of mobility well. Pressure dependent mobility measurements on a sample having an impurity density close to the Mott transition suggest that the inclusion of impurity band conduction in the analysis is necessary even at nitrogen temperatures and above. Such an analysis is used successfully to describe the temperature and pressure dependence of both mobility and Hall carrier concentration.
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Rapid thermal annealing of acceptor implants in InP and GaInAsWilkie, J. H. January 1988 (has links)
Post-implant annealing of InP and GaInAs is usually accomplished using thermal cycles of 10-30 minutes duration; this thesis reports the results of a systematic study of an alternative technique, 'rapid thermal annealing' (RTA), in which the implanted material is held at elevated temperatures for less than 180 seconds. Results were obtained using Hall-effect measurements, Rutherford backscattering (RBS), secondary ion mass spectrometry (SIMS), and photoluminescence (PL), amongst other methods. Iron-doped InP, implanted with magnesium, zinc or mercury was subjected to RTA and five different methods of protecting the InP surface were compared: the use of an indium-tin pseudobinary leads to tin incorporation and n-type surface layer formation above 700°C; encapsulating layers of phosphosilicate glass, SiO2, Si3N4 or a novel 'dual' layer of Si3N4/AlK may lead to p-type, semi-insulating or n-type behaviour. This is shown to be due to the indiffusion of silicon from these encapsulants into the implanted substrate; this indiffusion is enhanced by implantation damage. RTA in a phosphine ambient gives the best surface protection at elevated temperatures, but leads to substantial outdiffusion and loss of the implanted dopant. Electrically active p-type layers were successfully obtained from both zinc and mercury implants. GaInAs was implanted with beryllium, magnesium, zinc and mercury and electrically active p-type layers obtained following magnesium implantation; electrical results were, however, dominated by the quality of the starting material and not reproducible. 'Proximity' annealing under a GaAsP or GaAs cover piece gave adequate surface protection for GaInAs at annealing temperatures up to 800°C. The presence of an amorphous layer In InP and GalnAs is shown to be detrimental and the maximum amorphous thickness which can be fully regrown is found to be about 250 nm at 750 °C. It is suggested that solid phase epitaxy of thicker amorphous layers is inhibited by the local nucleation of microcrystallites within the remaining amorphous material and a model describing the regrowth of III-V compounds is presented. Substantial redistribution of the implanted dopant occurs during RTA of InP and GalnAs, the shape of dopant profiles is modified by both the residual damage present within the material and the form of surface protection employed. Several models of acceptor diffusion in iron-doped InP are compared and discussed.
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Intégration monolithique de matériaux III-V et de Ge sur Si en utilisant des buffers oxydes cristallins / Monolithic integration of semiconductor III-V and Ge on Si by using crystalline oxide buffersCheng, Jun 21 October 2010 (has links)
L’intégration monolithique de matériaux III-V ou Ge sur Si est un enjeu majeur de l’hétéroépitaxie qui a donné lieu à de nombreuses recherches depuis plus de vingt ans. Car premièrement, il permet de combiner des fonctionnalités optoélectroniques au standard industriel CMOS, cela peut remplacer des interconnexions métalliques par des interconnexions optiques dans lescircuits intégrés. De plus, le procédé d’intégration de semiconducteurs III-V ou de Ge sur Si permettrait de réduire sensiblement le coût de fabrication des cellules solaire pour le marché de niche du spatial.L’hétéroépitaxie directe de tels matériaux sur Si n’est pas aisée du fait du fort désaccord de maille et du différent coefficient de dilatation thermique entre ces matériaux. Plusieurs méthodes on tété proposées au cours des 20 derniers, notamment les solutions reposant sur des technologies de report telle que ‘Smart Cut TM’, ‘GEOI condensation’ donnent d’excellents résultats, mais n’offre pas autant de souplesse qu’une technologie d’hétéroépitaxie, et induit des coûts nettement supérieurs.L’objectif de cette thèse est de proposer une solution qui consiste à intégrer de façon monolithique des semiconducteurs III-V sur Si en utilisant des couches tampons des oxydes. Nous avons tout d’abord montré de manière théoriquement et expéritalement que pour les systèmes semiconducteur/oxyde, le semiconducteur croît avec son paramètre de maille massif dès le début decroissance et ne contient pas de défaut entendus associé à la relaxation plastique, la différence deparamètre de maille est entièrement accommodée par un réseau de dislocation interfacial. Il est donc apriori possible d’obtenir une couche 2D plane de semiconducteur/oxyde par la coalescence des îlots sans défauts étendus, présentant le paramètre de maille massif du semiconducteur dès le début de lacroissance, a condition qu’aucun défaut ne soit formé lors de la coalescence des îlots.La deuxième partie est dédiée à la coalescence des îlots pour le système InP/SrTiO3/Si, une stratégie de 3-étape a été utilisé pour favoriser la coalescence des îlots InP sur SrTiO3, la couche InPcoalescée présente une très bonne qualité structurale et surfacique. Cependant, nous avons observé la présence de défauts, notamment des micromacles et des parois d’inversion. Malgré ses défauts dans la couche, nous avons réalisé le puits quantique InP/InAsP épitaxié sur SrTiO3/Si, il présente une meilleure qualité cristalline et optique comparé avec un puits quantique référence InP/InAsP qui est épitaxié directement sur Si. / The monolithic integration of III-V semiconductors and Ge on Si is a major issue of heteroepitaxy that gave rise to extensive researches for over twenty years. Firstly because it allows combining the optoelectronic functionalities with industry standard CMOS, which can replace the metal interconnects by optical interconnects in integrated circuits. Moreover, the integration of III-V semiconductors or Ge on Si would significantly reduce the manufacturing cost of solar cells for the niche space market.The direct heteroepitaxy of III-V semiconductor on Si is difficult because of the great lattice mismatch and different thermal expansion coefficient between these materials. Various methods have been proposed in the last twenty years, especially, the solutions based on sticking technologies such as‘Smart Cut TM’ offer excellent results, but is limited by its less flexibility and higher cost.The objective of this thesis is to propose a solution that consists in integrating monolithicallyIII-V semiconductors on Si by using the buffer layers of oxides. We have firstly demonstrated theoretically and experimentally that for the systems semiconductor/oxide, the semiconductor grows with his lattice parameter from the beginning of the growth and doesn’t contain any defaults associated with the plastic relaxation, the difference of the lattice parameter is fully accommodated bythe interfacial dislocations, thus, it’s a priori possible to obtain a flat 2D layer of semiconductor/oxideby the coalescence of the islands without extended defects, presenting the lattice parameter of the semiconductor from the beginning of the growth, providing that no defect is formed during the coalescence of islands.The second part is dedicated to the coalescence of islands for the system InP/SrTiO3/Si, a 3-step strategy was used to favor the coalescence of islands InP on SrTiO3/Si, the coalesced InP layershows good crystalline quality and excellent surface quality. However, we observed the presence of defects, including anti-phase boundaries and microtwins. Despite these defects in the layer, we have realized a quantum well InP/InAsP grown on SrTiO3/Si, it presents a better quality crystal and optical compared with a reference quantum well InP/InAsP that grows directly on Si.
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Croissance auto-catalysée de nanofils d'InP sur silicium par épitaxie par jets moléculaires en mode vapeur-liquide-solide : application aux interconnexions optiques sur puceBarakat, Jean-Baptiste 22 October 2015 (has links)
L’intégration monolithique de matériaux semi-conducteurs III-V sur substrat de Silicium est essentielle pour le développement de la photonique sur Silicium. L’objectif est de réaliser une micro-source optique à base d’un réseau ordonné de Nanofils (NFs) III-V (InAsP/InP) placés sur un guide d’onde Si. De par leur aptitude à relaxer les contraintes, les NFs sont d’un grand intérêt. C’est dans ce contexte que s’est déroulée cette thèse axée sur la croissance autocatalysée de NFs InP sur Silicium par épitaxie directe. Nous avons ainsi montré que la croissance auto-catalysée de NFs InP denses et verticaux dépend directement de la nature de l’oxyde de surface du substrat Si. Une distribution monomodale ou bimodale de NFs ont été achevées en fonction des conditions de formation des gouttelettes d’indium ou des paramètres de croissance. Une pression critique et une température critique ont permis de délimiter des domaines favorables à la croissance. Les propriétés optiques intrinsèques des NFs ont été déterminées suffisantes pour l’objectif visé. Enfin, des résultats sur la simulation optique et la polarisation de la lumière émise dans les NFs et le guide d’onde ont permis d’établir un cahier des charges pour la croissance des NFs verticaux sur SOI pour que le couplage/partage de leurs modes optiques soit le plus efficace possible aux longueurs d’onde télécom. / Monolithic integration of III-V semiconductors materials on Si substrate is essential for the Si photonic development. We aim at achieving an optical microsource based on a regular array of III-V (InAsP/InP) nanowires (NWs) standing on top a Si waveguide. Due to their ability to be fully relaxed, nanowires growth is of deep interest. This PhD thesis has been oriented towards such context especially among self-catalyzed InP NWs growth by epitaxy. Thus we have shown that highly dense and vertical self-catalyzed InP NWs accomplishment is related to Si substrate surface oxide. A monomodal or bimodal NWs distribution have been reached through a control of indium droplets formation or growth parameters. A critical pressure and a critical temperature have been found to delimit favorable growth regime. Intrinsic optical properties have been determined to be goal sufficient. Optical simulation modeling and characterization of the polarization light state in NWs and in the Si waveguide have led us to establish functional specifications to grow vertical NWs on SOI as way that their optical modes could be coupled efficiently at telecommunications wavelength.
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DESIGN, SIMULATION AND MODELING OF InP/GaAsSb/InP DOUBLE HETEROJUNCTION BIPOLAR TRANSISTORSBALARAMAN, PRADEEP ARUGUNAM January 2003 (has links)
No description available.
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Ultra High Speed InP Heterojunction Bipolar TransistorsDahlström, Mattias January 2003 (has links)
This thesis deals with the development of high speed InPmesa HBTs with power gain cutoff frequencies up toand above 300 GHz, with high current density and low collectordischarging times. Key developments are Pdbased base ohmics yielding basecontact resistances as low as 10 Ωµm2, basecollector grades to enable to use ofInP in the collector, and an increase in the maximum currentdensity through collector design and thermal optimization.HBTs with a linear doping gradient in the base are forthe first time reported and compared to HBTs with abandgap graded base. The effect of degenerate base doping issimulated, as well as the base transit time. Key results include a DHBT with a 215 nm thick collector andan fτ= 280GHz, and fmax=400 GHz. This represents the highest fmaxreported for a mesa HBT. Results also include aDHBT with a 150 nm thick collector and an fτ= 300 GHz, and fmax=280 GHz. The maximum operating current densityhas been increased to above 10 mAµm while maintaining fτand fmax≥ 200 GHz. A mesa DHBT process with and as much yield and simplicity aspossible has been developed, while maintaining or pushingworldclass performance.
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Ultra High Speed InP Heterojunction Bipolar TransistorsDahlström, Mattias January 2003 (has links)
<p>This thesis deals with the development of high speed InPmesa HBTs with power gain cutoff frequencies up toand above 300 GHz, with high current density and low collectordischarging times.</p><p>Key developments are Pdbased base ohmics yielding basecontact resistances as low as 10 Ωµm<sup>2</sup>, basecollector grades to enable to use ofInP in the collector, and an increase in the maximum currentdensity through collector design and thermal optimization.HBTs with a linear doping gradient in the base are forthe first time reported and compared to HBTs with abandgap graded base. The effect of degenerate base doping issimulated, as well as the base transit time.</p><p>Key results include a DHBT with a 215 nm thick collector andan f<sub>τ</sub>= 280GHz, and f<sub>max</sub>=400 GHz. This represents the highest f<sub>max</sub>reported for a mesa HBT. Results also include aDHBT with a 150 nm thick collector and an f<sub>τ</sub>= 300 GHz, and f<sub>max</sub>=280 GHz. The maximum operating current densityhas been increased to above 10 mAµm while maintaining f<sub>τ</sub>and f<sub>max</sub>≥ 200 GHz.</p><p>A mesa DHBT process with and as much yield and simplicity aspossible has been developed, while maintaining or pushingworldclass performance.</p>
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Femtosecond Laser Ablation of Si, GaAs, and InPBorowiec, Andrzej 09 1900 (has links)
This thesis presents the study of x-ray emission from femtosecond laser micromachining and laser ablation of semiconductors. Prior to femtosecond machining experiments we investigated the nature of radiation emitted during the irradiation of solid targets with 120 femtosecond pulses with energies between 500 nJ and 0.3 mJ at a 1 kHz repetition rate. We have shown that the majority of the radiation was emitted below 10 keV with the high energy edge extending up to 25 keV. Under our experimental conditions K line emission was observed from materials with Z<32. We have also measured the x-ray dose rates during laser machining of various targets on the order of 10 mSv/h at a distance of 13 cm from the target. The implications for work pace safety, micromachining control, and potential for pulsed x-ray line sources for spectroscopic and imaging applications are discussed. In our studies of single shot femtosecond ablation of selected semiconductors: Si, GaAs, and InP, we have concentrated on the studies of microstructure and composition of the material after irradiation with 120 femtosecond pulses with energies between 2 nJ and 2 µJ. The resulting surface morphology, structure and composition of the micron scale ablation features on the semiconductors were studied by electron microscopy and atomic force microscopy. We found that no sharp threshold in the surface morphology was observed with increasing pulse power; however three ablation stages were identified based on the characteristic features of the ablation craters. TEM analysis revealed essentially no crystal damage beneath and in the vicinity of the ablation craters. In case of the binary semiconductors 5-30 nm polycrystalline grains were found over the ablated surfaces. The results were discussed in terms of the existing state of knowledge of ablation dynamics. The implications for practical micromachining applications are also discussed. / Thesis / Master of Engineering (ME)
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Electrical and Optical Characterization of InP Nanowire Ensemble PhotodetectorsNgo, Tuan Nghia, Zubritskaya, Irina January 2012 (has links)
Photodetectors are semiconductor devices that can convert optical signals into electrical signals. There is a wide range of photodetector applications such as fiber optics communication, infrared heat camera sensors, as well as in equipment used for medical and military purposes. Nanowires are thin needle-shaped structures made of semiconductor materials, e.g. gallium arsenide (GaAs), indium phosphide (InP) or silicon (Si). Their small size, well-controlled crystal structure and composition as well as the possibility to fabricate them monolithically on silicon make them ideally suited for sensitive photodetectors with low noise. In this project, Fourier Transform Infrared (FTIR) Spectroscopy is used to investigate the optical characteristics of InP nanowire-based PIN photodetectors. The corresponding electrical characteristics are also measured using very sensitive instrumentation. A total of 4 samples consisting of processed nanowires with 80 nm diameter but different density and length have been examined. The experiments were conducted from 78K (-196oC) to room temperature 300K (27oC). The spectrally resolved photocurrent and current-voltage (IV) curves (in darkness & under illumination) for different temperatures have been studied and analyzed. The samples show excellent IV performance with very low leakage currents. The photocurrent scales with the number of nanowires, from which we conclude that most photocurrent is generated in the substrate. Spectrally resolved photocurrent data, recorded at different temperatures, display strong absorption in the near-infrared region with interesting peaks that reveal the underlying optical processes in the substrate and nanowires, respectively. The nature of the absorption peaks is discussed in detail. This study is an important step towards integration of optically efficient III-V nanoscale devices on cheap silicon substrates for applications e.g. on-chip optical communication and solar cells for energy harvesting.
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Fabrication and characterization of InP Schottky barrier MOSFET with thin TiO2 gate oxideYang, Sheng-Hsiung 25 July 2012 (has links)
In this study, the thin titanium oxide (TiO2) film deposited on InP substrate was prepared by atomic layer deposition (ALD), which was used as gate oxide of InP Schottky barrier MOSFET. First, aluminum oxide (Al2O3) by ALD can be used as improvement in oxide of TiO2. Al2O3 of ALD has self-cleaning which can improve interface between oxide and substrate, the leakage current densities can reach 3.1 ¡Ñ 10-9 and 3.3 ¡Ñ 10-7 A/cm2. The Schottky barrier height(£XBp) of Al/InP with (NH4)2S treatment is 0.968 eV, which is higher than that of Al/InP without (NH4)2S treatment (0.806eV). The (NH4)2S solution is a moderate etchant to reduce surface oxides on InP. Therefore, Schottky barrier will not be influenced by Fermi level pinning. The electrical characteristics of Schottky barrier MOSFET with TiO2 as gate oxide were measured in this report. The drain current is 1.73£gA. The drain current increases rapidly when drain voltage is over 1V, it indicates that breakdown field of TiO2 thin film is not high enough. Due to advantages of ALD-Al2O3, such as self-cleaning ability and high breakdown field, the TiO2/Al2O3 prepared by ALD structure was used to improve the problem mentioned above. The electrical characteristics are much improved compared with a single TiO2 film, and drain current can reach 1.37 £gA. The rapid increase of drain current with the increased drain voltage is not observed. The transconductance and mobility are 4.45 ¡Ñ 10-7 S/£gm and 202.3 mm2/V-s, respectively, and a good sub-threshold behavior is obtained. Compared with other researches, we can find that Schottky barrier in on-state is higher than that of silicide sample. It indicates the InP Schottky barrier MOSFET characteristics are limited by high Schottky barrier.
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