AC/DC Buck converters have been used widely in many applications from cell phones to vehicle battery chargers. Due to their importance many researchers have been studying their behavior to improve their efficiency and reduce their size and/or cost. One of the most common defects of these converters, whether they are used for high power or low power applications, is the unwanted ripples in the input voltage across the input stage. It is believed that these ripples are caused by the interaction between the converter itself or its controller with the rectifier required to change the AC input into DC followed by an input filter. Many strategies have been suggested to tackle this problem. A new strategy to improve the controller of that converter was suggested by M. Lenells [1] and it was based on a Hamiltonian model for the 3-phase AC/DC converter together with its rectifier. As a first step, we simulated this model for a single-phase DC/DC buck converter only using the so-called S-Functions in MATLAB/SIMULINK. Then we could find a control law that would reduce the ripples in the input voltage and keep the output voltage constant simultaneously. In this report, we present this model and its simulation to pave the way for the control and simulation of the 3-phase AC/DC converter.

The traditional AC/DC rectifier usually results in low power factor and serious harmonic distortion and it will bring about the serious pollution to power system. This thesis proposes boost power factor correction technique to solve these problems. First, we aim at power factor correction circuit which need input voltage sensing, to study its operating principle and design consideration, then design applicable voltage compensator by the frequency analysis and perform the simulation and implementation using the developed criterion. In order to prevent the shortcoming that power factor correction circuits with input voltage sensing and complexity is raised for a multiplier must be added to controller, we develop the power factor correction circuit without input voltage sensing. We perform the operating principle and control function by simulation, develop hardware scheme by analog components and place load variation to measure power factor and total harmonic distortion. According to experimental results and simulation, we confirm the new power factor correction circuit. When the full load is placed, the power factor can achieve 0.99 and the total harmonic distortion is lower than 8%.

No description available.

Les travaux présentés ici proposent des convertisseurs d’énergie à haut rendement et très large dynamique de tension d’entrée, c'est-à-dire capables de fonctionner avec un rendement énergétique élevé sur une plage de tension d’entrée étendue (typiquement de 9V à 200V). De multiples tensions de réseaux sont standards dans l’industrie : elles sont spécifiques à un domaine (aéronautique, ferroviaire, …) et dépendent de la source primaire d’alimentation électrique (batterie d’accumulateurs, génératrice, …). Au sein d’un équipement embarqué, plusieurs réseaux peuvent cohabiter : une alimentation principale 110V et une alimentation de secours sur batterie 12V, par exemple. Le besoin de convertisseurs large dynamique d’entrée est donc une réalité, mais il n’existe sur le marché que peu de convertisseurs capables de réaliser une dynamique d’entrée supérieure à dix. Dans un premier temps, nous avons étudié les enjeux et les problématiques liés à la large dynamique d’entrée, afin de mieux cerner les limitations des topologies de puissance classiques. Nous avons ensuite traité le cas d’une architecture de conversion d’énergie de type série, dont nous avons amélioré le rendement énergétique grâce à l’utilisation de circuits d’aide à la commutation. Cette solution ayant des performances limitées, nous avons proposé de nouvelles architectures de convertisseurs DC/DC, de type parallèle, capables de supporter des dynamiques de tension d’entrée supérieures à vingt et ayant un rendement énergétique élevé (supérieur à 80%). Nous avons également étudié et mis en œuvre des stratégies de commande, numériques et analogiques, permettant de contrôler ces nouvelles topologies complexes. / Power converters are present in virtually every embedded system, but many standards of DC networks exist: the supply voltage is depending on how the power is generated (battery, alternator …) and can range from 12V to more than 115V. When an equipment must comply with a 110V main supply and 12V back-up supply, the use of a wide input voltage range DC/DC converter is mandatory. Since classical switched mode power converters cannot achieve simultaneously high efficiency and wide input voltage range, manufacturers rarely propose DC/DC converters with an input voltage range greater than 10. This work tackles the issue of wide input voltage power conversion. After discussing about designs trade off and problems that stem from a wide input range, we try to improve the overall efficiency of a classical buck-boost converter, by using non dissipative switching-aid circuits. We also proposed a novel two stages power converter capable of dealing with very wide input voltage ranges (more than 20), without a reduction of the power efficiency. Since those new converters are far more difficult to control, some theoretical analysis was performed and some practical tests were done using complex controls laws.

No description available.

This master thesis presents the development of a 100 W LED driver, suitable for outdoor and street lighting. In order to match the driver and LED features, special functionalities are added to the electronic system. To obtain a long lifetime, electrolytic capacitor are exchanged by film capacitor, with longer useful lifetime. However, this practice outcome in higher bus voltage ripple, which have to be compensated in the LED current control stage, named as power control stage. To achieve special functionalities, the proposed driver is designed to operate with universal input voltage and dimming capability, being the entire driver control implement in a digital way, increasing significantly the LED driver flexibility. After the literature review, which aimed to evaluate the characteristics of the LED driver topology structure, the two independent stage topology is selected. The buckboost converter operating in discontinuous conduction mode is employed on the power factor correction stage. The power control stage is composed by the DC/DC LLC resonant converter. Once the LED driver topology is defined, each converter is designed, following by the small signal modeling and the control system design. Experimental results of the driver operating with a reduced bus voltage capacitance (25 μF), are presented for a universal input voltage (85 – 265 VRMS) and different dimming levels (100% − 30%). A high power factor (> 0,94) and a medium to high efficiency (> 82%) is noticed in whole operation points, as well as, a reduced flicker (< 10%), being in accordance with the recent released IEEE Std 1789-2015 and IEC61000-3-2 Class C. / Este trabalho apresenta o desenvolvimento de um driver para o acionamento de um módulo de LEDs de 100 W, destinado a iluminação de exteriores ou iluminação pública. De forma a compatibilizar as características do LED com o driver, diferentes funcionalidades e condições de operação são adicionadas ao sistema eletrônico desenvolvido. Para alcançar longa vida útil, o driver desenvolvido substituiu os capacitores eletrolíticos por capacitores de filme. No entanto, essa prática resulta em maiores ondulações da tensão de barramento, as quais são compensadas pelo estágio de controle da corrente dos LEDs. De modo a aumentar as funcionalidades do driver, o mesmo opera com tensão de entrada universal e controle da intensidade luminosa, sendo o sistema de controle do driver implementado de forma digital, aumentando consideravelmente sua flexibilidade. Após revisão da literatura, a qual objetivou avaliar as características das estruturas e topologias empregadas em drivers para LEDs, seleciona-se a estrutura de dois estágios independentes. O conversor buck-boost operando no modo de condução descontínuo de corrente é empregado no estágio de correção do fator de potência. Para o estágio de controle da corrente dos LEDs, utiliza-se o conversor CC/CC meia ponte ressonante LLC. Definida a estrutura topológica, bem como os conversores utilizados, o projeto dos elementos é desenvolvido, seguido da modelagem dinâmica e do projeto do sistema de controle de cada estágio. Resultados experimentais do driver com reduzida capacitância de barramento (25 μF) mostram a sua operação com tensão de entrada universal (85 – 265 VRMS) e controle de intensidade luminosa (100% − 30%). Verificou-se um alto fator de potência (> 0,94) em toda a faixa de operação, rendimento média-alto (> 82%), bem como reduzida modulação de intensidade luminosa (< 10%), estando em conformidade com a IEEE Std 1789-2015 e a IEC61000-3-2 Classe C.

Abstract The goal of this dissertation was to study and model the settling transient response of switched-capacitor (SC) circuit, which is the most important building block of Analog-to-Digital converters (ADCs), and to improve the settling performance of the SC circuit implemented in ADC in CMOS technology. In the design of the SC circuit, there are common obstacles in obtaining a precise and fast settling with low power consumption. The main contribution of this thesis is to speed up different SC circuits without adding extra power consumption or to achieve the required settling precision with low power consumption. Two solutions to reduce the power consumption of SC integrators in sigma-delta (SD) ADCs were designed and verified by simulations. These implementations are based on the passive charge redistribution technique by injecting a precalculated open-loop charge in the output of the first integrator. The injected charge was implemented either by a continuous function of the input and feedback voltages or by quantizing to three levels. In both cases, the idea is to minimize the initial transient voltage in the input of the first OTA and hence bypass the slewing of the OTA. Another approach was proposed for the traditional SC residue circuit of the pipeline ADC, where a load capacitor is connected to the output during the evaluation phase. Here, a pre-charge of the load capacitance can be used. One proposed implementation is called the continuously controlled pre-charged technique. It pre-charges the load capacitor to the proper voltage during the previous phase, connects the pre-charged load capacitor to the output of the OTA during the evaluation phase, and hence pulls the charge sharing so that the initial input step of the OTA is instantaneously minimized. The other implementation called the minimal pre-charged method implemented for the SC residue circuit of the pipeline ADC is to simply pre-charge the load capacitor with the fixed existing voltage, minimized the spread of the initial input voltage. This proposed technique did not require any additional active components. / Tiivistelmä Kytkettyihin kapasitansseihin (SC-tekniikka) perustuvat vahvistimet ovat CMOS-tekniikkaan perustuvien analogia-digitaalimuuntimien (AD-muunnin) tärkeimpiä osia. Tämän väitöstyön tavoitteena oli tutkia ja mallittaa SC-tekniikkaan perustuvien vahvistinpiirien asettumisaikaa, ja etsiä piiriteknisiä keinoja asettumisajan nopeuttamiseksi. SC-piirien suunnittelun suurimpia ongelmia on saavuttaa tarkka ja nopea asettuminen mahdollisimman pienellä tehonkulutuksella. Tämän työn päätuloksina on joukko keinoja, joilla voidaan nopeuttaa SC-kytkettyjen vahvistimien asettumista ilman että niiden tehonkulutusta lisätään, tai saavuttaa aiempi suorituskyky pienemmällä tehonkulutuksella. Menetelmät perustuvat siihen, että SC-piirin passiivista varausjakautumista ohjataan niin, että vahvistimen tulosolmussa oleva transientti minimoituu, jolloin vahvistin ei ajaudu virtarajoitteiselle toiminta-alueelle, vaan sen asettuminen nopeutuu merkittävästi. Sigma-delta-tyyppiset AD-muuntimet koostuvat SC-integraattoreista, ja näiden asettumisen nopeuttamiseen kehitettiin ja varmennettiin simuloiden kaksi tapaa. Varauksen jakautumista autettiin syöttämällä erillisellä varauspumpulla transkonduktanssivahvistimen lähtösolmuun tietty, integraattorin tilasta ja tuloista riippuva varaus. Tällöin vahvistimen tulossa näkyvä alkutransientti pienenee, ja vahvistin ei ajaudu virtarajoitteiselle toiminta-alueelleen, jolloin sen asettumisvirhe pienenee merkittävästi. Varausinjektio toteutettiin kahdella eri tavalla: laskemalla tarvittava varaus joko jatkuvana funktiona tulosignaaleista, tai approksimoimalla sitä muutamalla diskreetillä tasolla. Pipeline-tyyppisissä AD-muuntimissa peruslohko koostuu SC-kytketystä vahvistimesta, jonka kuormakapasitanssi on kytkettynä vahvistimen lähtöön asettumisen aikana. Tämän kapasitanssin esivaraaminen sopivasti tarjoaa hyvin yksinkertaisen keinon ohjata varausjakautumista niin, että vahvistimen tulossa oleva transientti saadaan minimoitua ja toiminta virtarajoitteisessa moodissa vältettyä. Tässäkin tapauksessa kehitettiin ja varmennettiin kaksi vaihtoehtoista toteutusta. Ensimmäisessä kuormakapasitanssin esivarausjännite lasketaan tulosuureiden jatkuvana funktiona erillisellä summausvahvistimella. Toisessa, hyvin minimalistisessa ratkaisussa esivaraukseen käytetään kolmea käytettävissä olevaa kiinteää jännitettä. Tämä menetelmä ei vaadi lainkaan ylimääräisiä aktiivikomponentteja.