Global ETD Search

451	Study of stress relaxation and electromigration in Cu/low-k interconnects Yoon, Sean Jhin 28 August 2008 (has links) Not available / text Integrated circuits--Passivation Stress relaxation Electrodiffusion
452	New methodology for low power and less test time in VLSI testing Lee, Il-Soo 28 August 2008 (has links) Not available / text Integrated circuits--Testing
453	Test plan generation technique for complex integrated circuits Lee, Songjun 09 June 2011 (has links) Not available / text Integrated circuits--Testing
454	Interconnect-centric design issues in nanometer IC technology Shao, Muzhou, 1970- 01 August 2011 (has links) Not available / text
455	Optimal signal, power, clock and thermal interconnect networks for high-performance 2d and 3d integrated circuits Sekar, Deepak Chandra 20 August 2008 (has links) A high-performance 2D or 3D integrated circuit typically has (i) ratio of delay of a 1mm wire to delay of a nMOS transistor > 500, (ii) target impedence of power delivery network < 1mΩ, (iii) clock frequency > 2GHz, and (iv) thermal resistance requirement of heat removal path < 0.6 degree C/W. This data illustrates the difficulty of obtaining high-quality signal, power, clock and thermal interconnect networks for gigascale 2D and 3D integrated circuits. Specific material, process, circuit, packaging, and architecture solutions to enhance these four types of interconnect networks are proposed and quantitatively evaluated. A microchannel-cooled 3D integrated circuit technology is developed to deal with thermal interconnect problems inherent to stacked dice. The benefits of carbon nanotube technology, improved repeater insertion techniques and parallel processing architectures for signal interconnect networks are evaluated. A circuit technique to periodically reverse current direction in power interconnect networks is proposed. It provides several orders of magnitude improvement in electromigration lifetimes. Methods to control power supply noise and reduce its impact on clock interconnect networks are investigated. Finally, a CAD tool to co-design signal, power, clock and thermal interconnect networks in high-performance 2D and 3D integrated circuits is developed. Interconnects 3D integration Integrated circuits Electrodiffusion
456	Application of ISDN (integrated services digital network) : Hung, Katherine S. F. Unknown Date (has links) Thesis (MAppSc Project Management)--University of South Australia, 1993 Integrated services digital networks. Integrated services digital networks
457	Establishment of a CMOS application specific integrated circuit database / George, Mathew Unknown Date (has links) Thesis (M Eng) -- University of South Australia, 1992 Integrated circuits
458	Establishment of a CMOS application specific integrated circuit database / George, Mathew Unknown Date (has links) Thesis (M Eng) -- University of South Australia, 1992 Integrated circuits
459	Frequency tunable microchip lasers for coherent sensor applications / Keszenheimer, James A. January 1992 (has links) Thesis (Ph.D.)--Tufts University, 1992. / Submitted to the Dept. of Electrical Engineering. Includes bibliographical references. Access restricted to members of the Tufts University community. Also available via the World Wide Web;
460	Assertion-checker synthesis for hardware verification, in-circuit debugging and on-line monitoring Boulé, Marc. January 1900 (has links) Thesis (Ph.D.). / Written for the Dept. of Electrical and Computer Engineering. Title from title page of PDF (viewed 2008/05/09). Includes bibliographical references.

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