The performance of the High voltage dc systems is dependent on the stiffness of the ac bus, it is connected to. With the traditional synchronous reference frame-phase locked loops (SRF-PLL), voltage source converters (VSC) systems with large PLL gains, connected to weak ac networks are shown to be prone to instabilities, when subject to disturbances. In this thesis a new Adaptive PLL is designed with a pre-filter topology which extracts the fundamental positive sequence component of the input voltage, to be fed into the SRF-PLL for tracking of its phase angle. Compared with other traditional PLL topologies, this Adaptive PLL shows superior immunity to voltage distortions, and also has a faster dynamic performance. The thesis presents a comparative analysis of the performance of the traditional SRF-PLL with the Adaptive PLL in a VSC control system, and its impact on stability for VSCs connected to weak ac systems (up to SCR=1.3).

Yb-ion doped gain media have become the material of choice for reliable generation of ultrashort pulses at wavelength around 1 μm. At present, however, operation at high average power (>1 W) with sub-100 fs pulses still remains challenging. The efforts of developing an Yb-ion oscillator towards this goal, therefore, are the main focus of this thesis. In this work, the Yb:KGd(WO4)2 (Yb:KGW) crystals were chosen to serve as the gain media. To achieve high power operation, two fundamental issues have been carefully considered: 1) a new pumping scheme was proposed to alleviate the thermal issues in the Yb:KGW crystals; 2) a new method was introduced to characterize intracavity losses in the broadband Yb-ion oscillators. As a side effect observed during the optimization of the CW operation, simultaneous two-wavelength emission was also discussed. With the knowledge and experimental understanding of the fundamental issues in laser oscillators operated in the continuous-wave regime, the next step of this work demonstrated their operation in a pulsed regime. The dual action of the Kerr-lens and saturable absorber (KLAS) mode locking was proposed in this work and resulted in greatly enhanced laser performance. The laser delivered pulses with 67 fs duration at a repetition rate of 77 MHz. The average output power reached 3 W, which, to the best of our knowledge, is the highest average output power produced to date from the Yb-ion based bulk lasers with such a short pulse duration. The scalability of pulse energy and peak power was also demonstrated by reducing the repetition rate to either 36 MHz or 18 MHz. The cavity with the latter repetition rate produced 85 fs pulses with the pulse energy up to 83 nJ, which corresponds to a peak power as high as 1 MW. As required by many biomedical applications, the wavelength of the generated pulses (~1 μm) can be tuned in the near-infrared region by coupling them into an optical parametric oscillator (OPO). The feasibility of this approach was demonstrated in the last part of this thesis, through a thorough theoretical analysis of two OPO materials suitable for excitation at 1.04 μm.

This thesis presents an investigation into the power transmission limitations imposed on a VSC-HVdc converter by ac system strength and ac system impedance characteristics, quantified by the short circuit ratio (SCR). An important result of this study is that the operation of the converter is not only affected by the SCR’s magnitude, but is also significantly affected by the ac system’s impedance angle at the fundamental frequency. As the ac impedance becomes more resistive, the minimum SCR required at the rectifier side increases from that required for ideally inductive ac impedance, but it decreases at the inverter side. The finite megavolt ampere (MVA) limit of the VSC imposes a further limitation on power transfer, requiring an increase in the value of the minimum SCR. This limitation can be mitigated if additional reactive power support is provided at the point-common-connection. A state-space VSC model was developed and validated with a fully detailed non-linear EMT model. The model showed that gains of the phased-locked-loop (PLL), particularly at low SCRs greatly affect the operation of the VSC-HVdc converter and that operation at low SCRs below about 1.6 is difficult. The model also shows that the theoretically calculated power-voltage stability limit is not attainable in practice, but can be approached if the PLL gains are reduced. The thesis shows that as the VSC-HVdc converter is subject to large signal excitation, a good controller design cannot rely on small signal analysis alone. The thesis therefore proposes the application of optimization tools to coordinate the controls of multiple converters in a dc grid. A new method, the "single converter relaxation method", is proposed and validated. The design procedure of control gains selection using the single converter relaxation method for a multi-converter system is developed. A new method for selecting robust control gains to permit operation over a range of operation conditions is presented. The coordination and interaction of control parameters of multi-terminal VSC are discussed. Using the SCR information at converter bus, the gain scheduling approach to optimal gains is possible. However, compared to robust control gains setting, this approach is more susceptible to system instability.

Communication delays are common in many complex systems. It has been shown that these delays cannot be neglected when they are long enough compared to other timescales in the system. In systems of coupled phase oscillators discrete delays in the coupling give rise to effects such as multistability of steady states. However, variability in the communication times inherent to many processes suggests that the description with discrete delays maybe insufficient to capture all effects of delays. An interesting example of the effects of communication delays is found during embryonic development of vertebrates. A clock based on biochemical reactions inside cells provides the periodicity for the successive and robust formation of somites, the embryonic precursors of vertebrae, ribs and some skeletal muscle. Experiments show that these cellular clocks communicate in order to synchronize their behavior. However, in cellular systems, fluctuations and stochastic processes introduce a variability in the communication times. Here we account for such variability by considering the effects of distributed delays. Our approach takes into account entire intervals of past states, and weights them according to a delay distribution. We find that the stability of the fully synchronized steady state with zero phase lag does not depend on the shape of the delay distribution, but the dynamics when responding to small perturbations about this steady state do. Depending on the mean of the delay distribution, a change in its shape can enhance or reduce the ability of these systems to respond to small perturbations about the phase-locked steady state, as compared to a discrete delay with a value equal to this mean. For synchronized steady states with non-zero phase lag we find that the stability of the steady state can be altered by changing the shape of the delay distribution. We conclude that the response to a perturbation in systems of phase oscillators coupled with discrete delays has a sharper functional dependence on the mean delay than in systems with distributed delays in the coupling. The strong dependence of the coupling on the mean delay time is partially averaged out by distributed delays that take into account intervals of the past.

This thesis examines the design of high-speed wireline receivers that can be adapted to a variety of operating conditions. In particular, the ability to adapt to varying received signal strengths, channel losses and operating frequencies is explored. In order to achieve this flexibility, this thesis examines several key components of such a receiver. First, a 15 Gb/s preamplifier with 10-dB gain control for the input stage of an analog front end (AFE) is presented that automatically adjusts its power consumption to suit the gain and linearity requirements of the AFE for various received signal strengths. The gain of this preamplifier, along with the amount of peaking delivered by a linear equalizer in the AFE are controlled using a new adaptation technique, which adds only a small amount of overhead to the receiver. This adaptation scheme is able to sense changes in the received signal conditions and automatically adjust the equalization and gain of the AFE in order to optimize the vertical opening of the received eye. In addition, this thesis presents the first clock multiplier with both a wide operating frequency range and the ability to transition between completely off and fully operational modes in under 10 cycles of the reference clock. This multiplier relies on the careful use of several injection-locked oscillators (ILOs) with an aggregate lock range of 55.7% of the 3.16-GHz centre frequency. The design of these ILOs was facilitated by the use of a new method for modeling the injection locking behaviour of oscillators. This model differs from existing techniques in the way that it relies on the simulated response of an oscillator to injected stimuli, instead of complex equations using quasi-physical parameters, to predict the behaviour of an ILO.

This thesis examines the design of high-speed wireline receivers that can be adapted to a variety of operating conditions. In particular, the ability to adapt to varying received signal strengths, channel losses and operating frequencies is explored. In order to achieve this flexibility, this thesis examines several key components of such a receiver. First, a 15 Gb/s preamplifier with 10-dB gain control for the input stage of an analog front end (AFE) is presented that automatically adjusts its power consumption to suit the gain and linearity requirements of the AFE for various received signal strengths. The gain of this preamplifier, along with the amount of peaking delivered by a linear equalizer in the AFE are controlled using a new adaptation technique, which adds only a small amount of overhead to the receiver. This adaptation scheme is able to sense changes in the received signal conditions and automatically adjust the equalization and gain of the AFE in order to optimize the vertical opening of the received eye. In addition, this thesis presents the first clock multiplier with both a wide operating frequency range and the ability to transition between completely off and fully operational modes in under 10 cycles of the reference clock. This multiplier relies on the careful use of several injection-locked oscillators (ILOs) with an aggregate lock range of 55.7% of the 3.16-GHz centre frequency. The design of these ILOs was facilitated by the use of a new method for modeling the injection locking behaviour of oscillators. This model differs from existing techniques in the way that it relies on the simulated response of an oscillator to injected stimuli, instead of complex equations using quasi-physical parameters, to predict the behaviour of an ILO.

In this work, a programmable frequency divider suitable for millimeter wave phase-lock loops is presented. The frequency divider has been implemented in a 90 nm standard CMOS technology. To the extent of maximizing the operative input frequency, the higher frequency digital blocks of the frequency divider have been realized using dynamic precharge-evaluation logic. Moreover, a non-conventional method to implement non-power-of-2 division ratios has been used for the higher frequency divider stages (input stages).

This dissertation reports the development of a new multi-band multi-output synthesizer, 1/2 dual-injection locked divider, 1/3 injection-locked divider with phase-tuning, and 1/3 injection-locked divider with self-injection using 0.18-micrometer CMOS technology. The synthesizer is used for a multi-band multi-polarization radar system operating in the K- and Ka-band. The synthesizer is a fully integrated concurrent tri-band, tri-output phase-locked loop (PLL) with divide-by-3 injection locked frequency divider (ILFD). A new locking mechanism for the ILFD based on the gain control of the feedback amplifier is utilized to enable tunable and enhanced locking range which facilitates the attainment of stable locking states. The PLL has three concurrent multiband outputs: 3.47-4.313 GHz, 6.94-8.626 GHz and 19.44-21.42-GHz. High second-order harmonic suppression of 62.2 dBc is achieved without using a filter through optimization of the balance between the differential outputs. The proposed technique enables the use of an integer-N architecture for multi-band and microwave systems, while maintaining the benefit of the integer-N architecture; an optimal performance in area and power consumption. The 1/2 dual-ILFD with wide locking range and low-power consumption is analyzed and designed together with a divide-by-2 current mode logic (CML) divider. The 1/2 dual-ILFD enhances the locking range with low-power consumption through optimized load quality factor (QL) and output current amplitude (iOSC) simultaneously. The 1/2 dual-ILFD achieves a locking range of 692 MHz between 7.512 and 8.204 GHz. The new 1/2 dual-ILFD is especially attractive for microwave phase-locked loops and frequency synthesizers requiring low power and wide locking range. The 3.5-GHz divide-by-3 (1/3) ILFD consists of an internal 10.5-GHz Voltage Controlled Oscillator (VCO) functioning as an injection source, 1/3 ILFD core, and output inverter buffer. A phase tuner implemented on an asymmetric inductor is proposed to increase the locking range. The other divide-by-3 ILFD utilizes self-injection technique. The self-injection technique substantially enhances the locking range and phase noise, and reduces the minimum power of the injection signal needed for the 1/3 ILFD. The locking range is increased by 47.8 % and the phase noise is reduced by 14.77 dBc/Hz at 1-MHz offset.

Thesis (M.App.Sc.) - Carleton University, 2002. / Includes bibliographical references (p. 215-223). Also available in electronic format on the Internet.

Thesis (M. App. Sc.)--Carleton University, 2003. / Includes bibliographical references (p. 140-143). Also available in electronic format on the Internet.