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Emerging memory technologies are being intensively investigated for extending Moore\'s law in the next decade. The conductive bridge random access memory (CBRAM) is one of the most promising candidates. CBRAM shows unique nanoionics-based filamentary switching mechanism. Compared to flash memory, the advantages of CBRAM include excellent scalability, low power consumption, high OFF-/ON-state resistance ratio, good endurance, and long retention. Besides the nonvolatile memory applications, resistive switching devices implement the function of memristor which is the fourth basic electrical component. This research presents the characterization and modeling of Cu/TaOx/Pt resistive switching devices. Both Cu and oxygen vacancy nanofilaments can conduct current according to the polarity of bias voltage. The volatile resistive switching phenomenon has been observed on Cu/TaOx/delta-Cu/Pt devices and explained by a flux balancing model. The resistive devices are also connected in series and in anti-parallel manner. These circuit elements are tested for chaotic neural circuit. The quantum conduction has been observed in the I-V characteristics of devices, evidencing the metallic contact between the nanofilament and electrodes. The model of filament radial growth has been developed to explain the transient I-V relation and multilevel switching in the metallic contact regime. The electroforming/SET and RESET processes have been simulated according to the mechanism of conductive filament formation and rupture and validated by experimental results. The Joule and Thomson heating effects have also been investigated for the RESET processes. / Ph. D.

While the scaling of conventional memories based on floating gate MOSFETs is getting increasingly difficult, novel type of non-volatile memories, such as resistive switching memories, have lately found increased attention by both industry and academia. Resistive switching memory (ReRAM) is being considered one of the prime candidates for next-generation non-volatile memory due to relatively high switching speed, superior scalability, low power consumption, good retention and simplicity of its structure which does not require the expensive real estate structure of the silicon substrate. Furthermore, integration of ReRAM directly into a CMOS low-k/Cu interconnect module would not only reduce latency in connectivity constrained devices, but also would reduce chip's footprint by stacking memory layers on top of the logic circuits. One good candidate is the well-behaved Cu/TaOx/Pt resistive switching device. However, since platinum (Pt) acting as the inert electrode is not an economic choice for industrial production, a Back End of Line (BEOL)-compatible replacement of Pt is highly desirable. A systematic investigation has been conducted and metals such as Ru, Rh and Ir are found to be the best potential candidates to supplant Pt. The device properties of Ru, Rh and Ir based resistive switching devices have been explored in this work. However, the challenges of implementing ReRAM cell into BEOL of CMOS encompass not only the choice of materials of a CBRAM cell proper, but also the way the cell is embedded within BEOL. In case of the inert electrode, the metal interfacing the solid electrolyte (e.g. TaOx) has to be supplanted by a glue layer, and heat transport layer, leading to an engineering task of a composite electrode beyond the requirements of low miscibility with, and low surface diffusivity of the inert electrode with respect of the active metal atoms released by the active electrode (here Cu). The metal of the active electrode (Cu, Ag, Ni) is required to allow for a copious redox reaction but simultaneously preventing reactions with the dielectric. Finally, for the solid electrolyte, a dielectric with a moderate level of defects is preferred which may be controlled, for example by the deposition processes modulating the stoichiometry of the material. This research study begins with exploration of several devices derived from the benchmark device Cu/TaOx/Pt and manufacturing those in Micron nanofabrication and characterization laboratory at Virginia Tech with the latter device used as a benchmark for performance assessment. Electric characterization of the manufactured Cu/TaOx/Ru devices has shown some notable differences between them due to the different formation, shape and rupture of the conductive filament. The inferior switching properties of the Ru device have been attributed to the substantially degraded inertness properties of the Ru electrode as a stopping barrier for Cu as compared to the Pt electrode. To study this degradation effect further, two nominally identical devices however differently embedded on the Si wafer have been fabricated. The electric behavior of the two devices are found to be markedly different and is attributed to the difference in high local temperatures in the device during the switching that cause species interlayer diffusion and trigger undesired chemical reactions. Thus, the embedment of the device has a foremost impact on the intrinsic device performance. To investigate the impact of inert electrode on the endurance of ReRAM memory cells, baseline device Cu/TaOx/Pt/Ti is compared with six devices manufactured with different inert electrode constructions: Pt/Cr, Rh/Cr, Rh/Ti, Rh/Al2O3, Ir/Ti, and Ir/Cr, while the Cu electrode and the TaOx dielectric are identical. Although the glue layers Ti, Cr or Al2O3 are not an inherent part of the device proper, they have a tangible impact on the device endurance as well. It is experimentally demonstrated that inert electrodes with high thermal conductivities have superior endurance properties over an electrode with low thermal conductivity and the heat conductivity of inert electrode has a substantial impact on ReRAM cell performance. Since reset operation is a thermally driven process, frequent switching of resistive memory cell leads to a local accumulation of Joules heat, especially when the switching rate is faster than the heat removal rate. This investigation of local heating effects led to the exploration of non-local heat transfer within a memory array. In a crossbar arranged ReRAM cell array, heat generated in one device spreads via common electrode metal lines to the neighboring cells causing their performance degradation constituting non-local heat transfer mechanism leading to performance deterioration of neighboring cells. In addition to the electrical characterization of devices affected by the remote heat transfer, novel cell array architectures have been proposed and investigated with the goal to significantly mitigate the cell-to-cell thermal crosstalk. One of the possible mitigation measures would be modified cell erasure algorithm. / Doctor of Philosophy / Emerging memory technologies are being intensively investigated for extending Moore's scaling law in the next decade. The resistive random-access memory (ReRAM) is one of the most propitious contenders to replace the current ubiquitous FLASH memory. ReRAM shows unique nanoionics based filamentary switching mechanism. Compared to the current nonvolatile memory based on floating gate MOSFET transistor, the advantages of ReRAM include superior scalability, low power consumption, high OFF-/ON-state resistance ratio, excellent endurance, and long retention of the logic bit states. Besides the nonvolatile memory applications, resistive switching devices implement the function of a memristor which is the fourth basic electrical component and can be used for neuromorphic computing. A ReRAM device is in essence a metal-insulator-metal structure. One of the metal electrodes is called the active electrode and provides the building material for the filamentary connection between the electrodes. An important requirement of the second electrode, called the inert electrode, is to be immiscible with the metal atoms of the active electrode and to exhibit a minimum of susceptibility to structural changes and chemical reactions. This research presents a thorough investigation of the role and properties of the inert electrode and offers guideline for the optimal selection of the inert electrode in a commercially viable product. It has been found out that one important property of the inert electrode is its heat conductivity and also the way the inert electrode is embedded on a substrate. Consequently, the concept of the inert electrode has been replaced by the concept of engineered inert electrode module which evolved from a single metal layer to a multilayer stack displaying glue layers, high thermal conductivity layers dissipating the heat quickly, and diffusion stop layers eliminating unwanted chemical reactions. The investigation of the electro-thermal effects led to the discovery of the cell-to-cell thermal cross talk within the memory array which can seriously affect the performance of cells impacted by the remote heat transfer. When a memory cell is switched repeatedly a considerable amount of heat is dissipated in the cell and the heat may spread to neighboring cells that share the same metal lines. This heat transfer causes degradation of electrical performance of the neighboring cells. A method has been developed to characterize quantitatively how the electrical performance is affected by the thermal cross-talk impacting the electric performance of neighboring cells. Several novel mitigation strategies of new memory array architectures have been proposed and investigated.

This work presents a step forward in the use of 2D layered materials (2DLM), specifically hexagonal boron nitride (h-BN), for the fabrication of memristors. In this study, we fabricate, characterize, and use h-BN based memristors with Ag/few-layer h-BN/Ag structure to implement a fully functioning artificial leaky integrate-and-fire neuron on hardware. The devices showed volatile resistive switching behavior with no electro-forming process required, with relatively low VSET and long endurance of beyond 1.5 million cycles. In addition, we present some of the failure mechanisms in these devices with some statistical analyses to understand the causes, as well as a statistical study of both cycle-to-cycle and device-to-device variabilities in 20 devices. Moreover, we study the use of these devices in implementing a functioning artificial leaky integrate-and-fire neuron similar to a biological neuron in the brain. We provide SPICE simulation as well as hardware implementation of the artificial neuron that are in full agreement, showing that our device could be used for such application. Additionally, we study the use of these devices as an activation function for spiking neural networks (SNNs) by providing a SPICE simulation of a fully trained network, where the artificial spiking neuron is connected to the output terminal of a crossbar array. The SPICE simulations provide a proof of concept for using h-BN based memristor for activation function for SNNs.

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