Este trabalho descreve um instrumento microprocessado para a avaliação de clorofila em plantas com a possibilidade da armazenagem de dados até 64 kbytes de 32 posições com tamanho de pixel de 1 a 16 cm2. O instrumento encontra várias aplicações na agricultura, principalmente onde o monitoramento é requerido. As principais aplicações estão em operações de fertilização e irrigação, onde o manejo de eventos são controlados pelas condições críticas como a disponibilidade de nitrogênio no solo. Resultados mostram que a operação individual ou em grupo dos sensores garantem uma adequada acurácia e resolução para aplicações agrícolas. O instrumento possibilita a fazendeiros, pesquisadores ou consultores a oportunidade do manejo localizado para sistemas de tomada de decisão. O instrumento é baseado em uma arquitetura dedicada baseada no microcontrolador 80535 e sua utilização proporciona redução de custos de processos agrícolas e redução de contaminação ambiental. / This work describes a microprocessed instrument for evaluation of chlorophyll in plants, and recording of data up to 64 kbytes at thirty-two positions with pixel size from 2 to 1.420 mm2. The instrument meets different applications in the agricultural science area, where monitoring is required. Also would apply to operations of fertilization and irrigation, where the management of events can be triggered by critical conditions such as soil nitrogen contents. Results have shown that characterization of the instrument and its individual sensors guaranteeing an adequate accuracy and resolution for agricultural application. It provides the farmer or consultant the opportunity to establish localized management rules for decision support systems. The instrument is based on complementary metal oxide semiconductor devices as well as the 80535 microcontroller. It may be operated in automatic or non-automatic mode.

Orientadores: Eduardo Tavares Costa, Francisco Ubaldo Vieira Júnior / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-19T00:09:22Z (GMT). No. of bitstreams: 1 MedeirosJunior_JohannesDantasde_M.pdf: 2215491 bytes, checksum: e35d132e2a61efa2d559a4dba08e356e (MD5) Previous issue date: 2011 / Resumo: Circulação extracorpórea é um processo no qual o sangue circula externamente ao corpo com o intuito de manter a oxigenação e o fluxo do sangue adequados durante a realização de determinados procedimentos cirúrgicos; para realizá-la é utilizado um conjunto de técnicas e equipamentos cuja função é substituir temporariamente o coração e os pulmões. Contudo, a circulação extracorpórea é percebida pelo organismo como um agente agressor e um dos principais parâmetros relacionados aos danos que ela provoca é a hemólise. O uso de bombas propulsoras é um dos causadores de hemólise em procedimentos envolvendo circulação extracorpórea e um dos principais tipos de bombas propulsoras é a bomba de roletes. A hemólise provocada pelo uso de bomba de roletes é devida principalmente ao grau de oclusão utilizado. Há dois métodos geralmente utilizados para calibração da bomba de roletes: o método de velocidade de queda e o método de calibração dinâmica. Nesse trabalho é proposto um dispositivo para auxiliar o perfusionista a ajustar bombas de roletes por um método menos oclusivo, a calibração dinâmica. O dispositivo é baseado em um microcontrolador PIC 18F4523 e é utilizado em conjunto com transdutores de pressão descartáveis normalmente utilizados em procedimentos cirúrgicos. Foram determinadas as curvas características de três transdutores de pressão na faixa de 0 a 1000 mmHg. Os resultados das calibrações realizadas com o protótipo desenvolvido foram comparados com os resultados obtidos com uma placa de aquisição de dados comercial. Dois, dos três transdutores, foram submetidos a testes de fadiga e um foi mantido como referência. Para validação do dispositivo, sendo utilizado para realizar calibração dinâmica, foram testados ajustes em 150, 250, 350, 450 e 500 mmHg. Em cada ajuste foram realizadas 8 medições simultâneas de pressão média de calibração dinâmica com o dispositivo e com uma placa de aquisição de dados comercial. Após a realização de todos os testes, os transdutores foram novamente caracterizados. As curvas características dos três transdutores obtidas na caracterização inicial mostraram igualdade estatística (p > 0,05). Após os testes de fadiga não foram observadas alterações nas respostas dos transdutores de pressão no início e após a realização dos testes, nos mesmos pontos de pressão (p > 0,05). As medidas de pressão de calibração dinâmica realizadas com o protótipo apresentaram igualdade estatística (p > 0,05) para toda a faixa de pressão testada, quando comparados com os respectivos resultados obtidos com a placa de aquisição de dados. Conclui-se que os transdutores utilizados atualmente em procedimentos cirúrgicos podem ser utilizados na calibração dinâmica sem perdas de características e que o dispositivo construído pode ser utilizado em ambiente operatório para ajustes de bombas de roletes pelo método de calibração dinâmica / Abstract: Cardiopulmonary bypass is a procedure in which blood circulates outside the body in order to maintain oxygenation and blood flow conditions during the performance of certain surgical procedures; for this procedure, it is used a set of equipments whose function is to temporarily replace the heart and lungs. However, the cardiopulmonary bypass is perceived by the body as an aggressor agent and one of the main parameters related to the damage it causes is hemolysis. The use of driving pumps is a cause of hemolysis in procedures involving cardiopulmonary bypass and one of the main types of driving pumps is the roller pump. Hemolysis caused by the use of roller pump is mainly due to the degree of roller occlusion used. There are two methods commonly used for adjusting the roller pump: the method of drop rate and the dynamic calibration method. In this work, we developed a device to assist the perfusionist adjust roller pumps by a less occlusive method, the dynamic calibration method. The device is based on a PIC 18F4523 microcontroller and is used in conjunction with disposable pressure transducers commonly used in surgical procedures. We have characterized three pressure transducers in the range of 0 to 1000 mmHg. Calibration results obtained with the prototype were compared with those obtained with a data acquisition board. Two of the three transducers were submitted to fatigue tests and one was kept as a reference. To validate the constructed device, being used to perform dynamic calibration, adjustments were at 150, 250, 350, 450 and 500 mmHg, in each set were performed eight simultaneous measurements of dynamic calibration mean pressure with the device and with a data acquisition board. After all tests were conducted, the transducers were re-characterized. The three characteristic curves obtained in the initial characterization showed statistically equivalence (p > 0.05) among themselves. After the fatigue tests no changes were observed in the responses of pressure transducers in the beginning and in the end of the tests, at the same pressure points (p > 0.05). Measurements of dynamic calibration pressure obtained with the prototype showed statistically equivalence (p > 0.05) throughout the tested pressure range, when compared with the results obtained with the data acquisition board. We conclude that the transducers currently used in surgical procedures may be used for dynamic calibration without losing their characteristics and that the constructed device can be used in surgery to adjust the roller pumps by the dynamic calibration method / Mestrado / Engenharia Biomedica / Mestre em Engenharia Elétrica

Orientador: Carlos Alberto dos Reis Filho / Dissertação (mestrado profissional) - Universidade Estadual de Campinas, Faculdade de Engenharia Mecânica / Made available in DSpace on 2018-08-19T02:39:39Z (GMT). No. of bitstreams: 1 Orlof_WagnerdeCamargo_M.pdf: 10293340 bytes, checksum: 185cfc2f0630862653a1cd2ffedf8ef4 (MD5) Previous issue date: 2011 / Resumo: Este trabalho propõe o desenvolvimento de um circuito de condicionamento de sinais para sensores automotivos. O desenvolvimento proposto visa resolver um problema de falta de flexibilidade dos circuitos de condicionamento dos módulos eletrônicos de controle usados na indústria automobilística. Foram analisadas também soluções encontradas na literatura científica em comparação com o cenário do problema apresentado. Para comprovação da hipótese da solução proposta, foi desenvolvido um protótipo do condicionador universal de sinais baseado em um microcontrolador SOC (system on chip). Dentro do universo de sensores automotivos e circuitos de condicionamento estudados, foram escolhidos três com características elétricas totalmente distintas, para os quais foram desenvolvidos os respectivos circuitos de condicionamento. Os circuitos foram caracterizados nos blocos analógicos e digitais de um microcontrolador PSoC (Programmable system on chip), que é um componente da empresa Cypress que possui um sistema completo no circuito integrado. Foi utilizada uma quantidade mínima de componentes externos ao microcontrolador para permitir a conexão dos sensores ao circuito. Também foi desenvolvido um "firmware" para controlar o carregamento das configurações de "hardware" para cada circuito de condicionamento. O resultado final foi um dispositivo condicionador universal capaz de se configurar conforme o sensor a ser conectado, selecionado através de entradas digitais. Foram realizados testes experimentais de funcionamento dos circuitos e da influência da temperatura no condicionador. O protótipo desenvolvido mostrou ser uma boa solução uma vez que foi capaz de condicionar adequadamente os sinais dos três tipos de sensores selecionados, um de cada vez / Abstract: This paper proposes the development of a signal conditioning circuit for automotive sensors. The proposed development aims to solve a problem of lack of flexibility in the conditioning circuits for electronic control modules used in the automotive industry. Solutions were also analyzed in the literature compared with the scenario of the problem. To prove the hypothesis of the proposed solution, it was developed a prototype of the universal signal conditioner based on a microcontroller SOC (system on chip). Within the universe of automotive sensors and conditioning circuits studied were chosen three sensors with totally different electrical characteristics, which were developed their conditioning circuits. The circuits were characterized in analog and digital blocks of a microcontroller PSoC (Programmable System on Chip), which is a component of the Cypress company that has a complete system on chip. A minimal amount of external components were used just to allow the microcontroller connection with the sensors. Also it was developed a "firmware" to control the loading of the settings of "hardware" for each conditioning circuit. The final result was a universal conditioner device capable to self reconfigure as the sensor to be connected, selected via digital inputs. Tests were conducted experimental operation of the circuits and the influence of temperature in the conditioner. The prototype proved to be a good solution since it was able to properly condition the signals from three types of sensors selected, one at a time / Mestrado / Eletrônica / Mestre em Engenharia Automobilistica

Afin de pouvoir profiter de services sécurisés, efficaces et rapides (ex: paiement mobile, agenda, télécommunications, vidéos, jeux, etc.), de nos jours nos téléphones embarquent trois différents microcontrôleurs. Du plus sécurisé vers le plus générique nous avons, la carte SIM qui n’est autre qu’une carte à puce sécurisé chargée de garder de manière sûr au sein de sa mémoire des données sensibles. Ensuite, nous avons le processeur à bande de base qui est le seul à pouvoir discuter avec la carte SIM, et s’occupe de se charger des fonctions radio du téléphone (ex: le réseau GSM/3G/4G/LTE). Et enfin, nous avons le processeur applicatif, qui se charge d’exécuter tous les autres programmes sur le téléphone. Ce qui rend ces microcontrôleurs plus particuliers, c’est le fait qu’ils sont chacun contrôlés par un système d’exploitation totalement indépendant. Néanmoins, chacun peut avoir son influence, direct ou indirect sur l’autre/les autres. La sécurité de ces trois plateformes dépendent non seulement de leur implémentations matérielles, mais aussi de l’implémentation logicielle de leur système d’exploitation. Cette thèse s’intéresse à la sécurité logicielle, et en partie, matérielle de ces trois plateformes, afin de comprendre dans quelle mesure, une carte à puce telle que la carte SIM, est-elle résistante aux attaques logicielles dans le contexte d’un environnement multi-applicatif offert par les appareils mobiles. Nous nous intéressons aussi, à la sécurité du processeur applicatif face à une famille particulière d’attaque qui exploite le mécanisme de mémoire cache. Nous partons alors de l’étude et de l’application en pratique des attaques logiques sur carte à puce. Après avoir étudié les différents moyens qui permettent d’atteindre la carte SIM dans un mobile et ainsi d’étudier la surface d’attaque, nous poursuivons vers une étude par rétro-conception de l’implémentation de l’interface logicielle qui communique directement avec la SIM au niveau du processeur de bande de base. Ceci afin de comprendre le fonctionnement de cette partie très peu documentée. Finalement, nous étudions les effets du mécanisme de cache sur l’exécution d’un programme dans un téléphone mobile. Enfin, nous avons commencé à étudier l’attaque de Bernstein, qui consiste à exploiter les variations de temps induits par différents mécanismes de cache, en mesurant le temps global de l’exécution d’une implémentation particulière de l’algorithme cryptographique AES (Advanced Encryption Standard). Plus particulièrement, par une mise en pratique, nous essayons de déterminer ce qui exacerbe ou non la réalisation de sa technique dans le contexte d’un téléphone mobile réel. / Nowadays, in order to provide secure, reliable and performant services (e.g: mobile payments, agenda, telecommunication, videos, games, etc.), smartphones embed three different micro-controllers. From the most secure to the most general purpose one, we have the SIM card which is a secure smart card that has to prevent anyone by any means to exfiltrate sensitive assets from its internal memories. Furthermore, we also have the baseband processor, which is the only one that directly talks with the SIM card. It essentially manages all the "phone" parts (e.g: GSM/3G/4G/LTE networks) inside a mobile device. Finally, we have the application processor which runs all the general user applications. What is interesting to note for those three micro-controllers is that they are controlled by different and independent operating systems. However, one may affect the behavior of the other(s). The security of these three platforms depend on their hardware and software implementations. This thesis is concerned with the security of these three microcontrollers that are managed by independent OSs within mobile devices. We particularly focused on understanding to what extent a smart card such as SIM cards can be resistant to software attacks in the context of a multi-application environment provided by mobile devices. We were also interested in a specific family of, so-called cache attacks, namely time-driven one, as this kind of technique essentially exploits the hardware implementation of the different cache memories and the mechanisms that enable to manage them. We decided to first study and experimentally perform so-called logical attacks on smart cards. In a second step, in order to understand the attack surface, we have studied the different means to reach the SIM card from both the baseband processor and the application processor. Then, by means of reverse engineering, we tried to understand how was implemented the SIM interface from the baseband side. Finally, we have studied the cache effects on the execution speed of a program on real mobile devices, and we experimentally studied Bernstein’s time-driven cache attack in order to understand what possible events/mechanisms exacerbate (or not) the achievement of the latter on an actual mobile device.

M. Tech. (Electrical & Electronic Engineering) / In this research we compare conventional data acquisition system (DAS) with the embedded data acquisition systems. The performance specifications of 4 different types of DAQ cards are drawn up with special emphasis made on the following parameters: Slew rate, settling time, relative accuracy and system noise. These parameters are taken from 2 conventional DAS and then compared to those taken from 2 embedded data acquisition systems under the same electrical conditions. The embedded DAQ system’s hardware was built using the PIC Microcontroller interfaced to the Digital to Analog Convertors (DAC). MPLAB C18 is used to create a program which communicates with the embedded DAQ system, to transmit generated signals. National Instrument's LabView is used to create a program which communicates with the conventional DAQ system, to acquire external generated signals and retransmit the signals. In most cases the performance of conventional and embedded are close, but one of the embedded DAS seem to be unstable at high frequencies.

The objective of this thesis was to develop an 8051 microcontroller soft core in the Verilog hardware description language (HDL). Each functional unit of the 8051 microcontroller was developed as a separate module, and tested for functionality using the open-source VHDL Dalton model as benchmark. These modules were then integrated to operate as concurrent processes in the 8051 soft core. The Verilog 8051 soft core was then synthesized in Quartus® II simulation and synthesis environment (Altera Corp., San Jose, CA, www.altera.com) and yielded the expected behavioral response to test programs written in 8051 assembler residing in the v8051 ROM. The design can operate at speeds up to 41 MHz and used only 16% of the FPGA fabric, thus allowing complex systems to be designed on a single chip. Further research and development can be performed on v8051 to enhance performance and functionality.

Orientadores: Francisco José Arnold, Rangel Arthur / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Tecnologia / Made available in DSpace on 2018-08-26T20:53:37Z (GMT). No. of bitstreams: 1 Ximenes_RodrigoLuiz_M.pdf: 1709801 bytes, checksum: 3d8b8086551025bf630aa238baf7d7c8 (MD5) Previous issue date: 2015 / Resumo: A medição da impedância elétrica em transdutores piezelétricos é um procedimento fundamental para a caracterização desses dispositivos. A larga variação do módulo da impedância elétrica ao longo da frequência representa uma dificuldade para a realização dessas medições. Neste trabalho é apresentado o protótipo de um medidor de impedâncias elétricas de transdutores de ultrassom utilizados em aplicações de potência elevada. O sistema opera baseado na captação dos valores de pico de tensão e corrente sob uma faixa de frequência de utilização dos transdutores. O protótipo é controlado por um microcontrolador que se comunica com um computador no qual um software, desenvolvido em LabView, armazena e mostra resultados numa interface. A validação do medidor de impedâncias foi feita pela comparação de resultados experimentais com os medidos por um analisador de impedâncias comercial. Os resultados mostram que o sistema proposto pode medir impedâncias entre 100 W e 10 kW, aproximadamente, numa faixa de frequências de até 43 kHz / Abstract: The measurement of electrical impedance of piezoelectric transducers is a fundamental procedure for the characterization of these devices. The large variation in the electrical impedance module over frequency is a difficulty to carry out these measurements. This dissertation presents the prototype of a meter electrical impedance of ultrasound transducers used in high power applications. The system operates based on the capture of peak voltage and current values of the transducers in a usage frequency band. The prototype is controlled by a microcontroller that communicates with a computer on which a software, developed in LabView, stores and displays the results in an user interface. The validation of the impedance meter was made by comparison with the experimental results measured by a commercial impedance analyzer. The results show that the proposed system can measure impedances between 10 W and 10 kW at frequencies up to 43 kHz / Mestrado / Tecnologia e Inovação / Mestre em Tecnologia

<p>A large volume of data is continuously being generated by data centers, humans, and the internet of things (IoT). In order to get useful insights, such enormous data must be processed in time with high throughput, low latency, and high accuracy. To meet such performance demands, a large body of new hardware is being shipped by vendors, such as multi-core CPUs, 3D-stacked memory, embedded microcontrollers, and other accelerators.</p><br><p>However, traditional operating systems (OSes) and data analytics frameworks, the key layer that bridges high-level data processing applications and low-level hardware, fails to deliver these requirements due to quickly evolving new hardware and increases in explosion of data. For instance, general OSes are not aware of the unique characters and demands of data processing applications. Data analytics engines for stream processing, e.g., Apache Spark and Beam, always add more machines to deal with more data but leave every single machine underutilized without fully exploiting underlying hardware features, which leads to poor efficiency. Data analytics frameworks for machine learning inference on IoT devices cannot run neural networks that exceed SRAM size, which disqualifies many important use cases.</p><br><p>In order to bridge the gap between the performance demands of data analytics and the new features of emerging hardware, in this thesis we exploit runtime system designs for high-level data processing applications by exploiting low-level modern hardware features. We study two important data analytics applications, including real-time stream processing and on-device machine learning inference, on three important hardware platforms across the Cloud and the Edge, including multicore CPUs, hybrid memory system combining 3D-stacked memory and general DRAM, and embedded microcontrollers with limited resources. </p><br><p>In order to speed up and enable the two data analytics applications on the three hardware platforms, this thesis contributes three related research projects. In project StreamBox, we exploit the parallelism and memory hierarchy of modern multicore hardware on single machines for stream processing, achieving scalable and highly efficient performance. In project StreamBox-HBM, we exploit hybrid memories to balance bandwidth and latency, achieving memory scalability and highly efficient performance. StreamBox and StreamBox-HBM both offer orders of magnitude performance improvements over the prior state of the art, opening up new applications with higher data processing needs. In project SwapNN, we investigate a system solution for microcontrollers (MCUs) to execute neural networks (NNs) inference out-of-core without losing accuracy, enabling new use cases and significantly expanding the scope of NN inference on tiny MCUs. </p><br><p>We report the system designs, system implementations, and experimental results. Based on our experience in building above systems, we provide general guidance on designing runtime systems across hardware/software stack for a wider range of new applications on future hardware platforms.</p><div><br></div>

Diploma thesis is concerned with programming of AVR microprocessors. Main task was development of compact environment where user can learn methods necessary for successful programming of microprocessor. It was necessary to make an application enabling interactive simulation of processor to reach this goal. User-friendly control, simplicity and low hardware demands are main advantages of this application. Only computer with internet connection is demanded. Complicated installation, usual for similar products, is avoided.

My work describes design of the universal development board usefull with a various types of microcontrollers and the unified interfaces for the microcontroller's module board. It introduce the design and the interface and list of the Microchip PIC microcontrollers which can be used with development board. It also describes the features of the PIC18F4550 microcontroller and means about an different types of anothers manufactures. There is also describe of the design, creating the schemes of the boards, printed circuit boards and 3D visualization models in my work.