In this research the growth of InN epilayers by high-pressure chemical vapor deposition (HPCVD) and structural, optical properties of HPCVD grown InN layers has been studied. We demonstrated that the HPCVD approach suppresses the thermal decomposition of InN, and therefore extends the processing parameters towards the higher growth temperatures (up to 1100K for reactor pressures of 15 bar, molar ammonia and TMI ratios around 800, and a carrier gas flow of 12 slm). Structural and surface morphology studies of InN thin layers have been performed by X-ray diffraction, low energy electron diffraction (LEED), auger electron spectroscopy (AES), high-resolution electron energy loss spectroscopy (HREELS) and atomic force microscopy (AFM). Raman spectroscopy, infrared reflection, transmission, photoluminescence spectroscopy studies have been carried out to investigate the structural and optical properties of InN films grown on sapphire and GaN/sapphire templates. InN layers grown on a GaN (0002) epilayer exhibit single-phase InN (0002) X-ray diffraction peaks with a full width at half maximum (FWHM) around 200 arcsec. Auger electron spectroscopy confirmed the cleanliness of the surface, and low energy electron diffraction yielded a 1×1 hexagonal pattern indicating a well-ordered surface. The plasmon excitations are shifted to lower energies in HREEL spectra due to the higher carrier concentration at the surface than in the bulk, suggesting a surface electron accumulation. The surface roughness of samples grown on GaN templates is found to be smoother (roughness of 9 nm) compared to the samples grown on sapphire. We found that the deposition sometimes led to the growth of 3 dimensional hexagonal InN pyramids. Results obtained from Raman and IR reflectance measurements are used to estimate the free carrier concentrations, which were found in the range from mid 10^18 cm-3 to low 10^20 cm-3. The optical absorption edge energy calculated from the transmission spectra is 1.2 eV for samples of lower electron concentration. The Raman analysis revealed a high-quality crystalline layer with a FWHM for the E2(high) peak around 6.9 cm^-1. The results presented in our study suggest that the optimum molar ratio might be below 800, which is due to the efficient cracking of the ammonia precursor at the high reactor pressure and high growth temperature.

The objective of this project is to establish a new technology to grow high quality GaN based material by nano selective area growth (NSAG). The motivation is to overcome the limit of the conventional growth method, which yield a high density of dislocation in the epitaxial layer. A low dislocation density in the epitaxial layer is crucial for high performance and high efficiency devices. This project focuses on growth and material characterization of GaN based nanostructures (nanodots and nanostripes) grown using the NSAG method that we developed. NSAG, with a precise control of diameter and position of nanostructures opens the door to new applications such as: 1) single photon source, 2) photonic crystal, 3) coalescence of high quality GaN template, and 4) novel nanodevices.

Recently, active matrix flat-panel displays are widely used in consumer electronic products. With increasing popularity of flat-panel displays, market competition becomes more intense and demands for high performance flat-panel displays are increasing. Low-temperature polysilicon (LTPS) with higher mobility, as well as drive current can integrate electric circuit, such as controllers and memory on glass substrate of display to achieve the purpose of system on panel (SOP). Thus, flat-panel displays can be more compact, while reducing reliability issues and lowering production costs. In this dissertation, we studied the nonvolatile memory for system on panel applications and reducing cost of memory by increasing the memory density or reducing the processing steps. Therefore, we proposed several modes of operation in nonvolatile memory. First, we use channel hot-electron (CHE) to inject electrons into the nitride layer that¡¦s above source or drain sides of SONOS thin film transistor (TFT). Thus, we can increase the memory density by storing two-bit state in a memory cell. In this study, the two-bit memory effect is clearly observed for devices with a shorter gate length after CHE programming; however, the two-bit memory effect is absent in devices with a longer gate length. The gate-length-dependent two-bit memory effect is related to the location of injected electrons in the nitride layer. When electrons are injected into the nitride layer above the channel, they can create an additional energy barrier in the channel thus increasing the threshold voltage of the device to perform the programming operations. However, if electrons are injected into the depletion region at the P-N junction between the drain and the channel, the energy barrier induced by electrons is not significant when exchanging the source and drain electrodes to measure the memory status, and the program effect is not as significant. When the channel length is shorten, the built-in potential between the source and the channel can be decreased, the energy barrier caused by programmed electrons can affect electrons in the channel and increase the threshold voltage. Therefore, the two-bit memory effect can be seen in devices with the shorter gate length after CHE programming. Secondly, we stored charges in the body of the thin film transistor to make the conventional thin-film transistors become a non-volatile memory. This method does not need a floating gate or a tunneling oxide in the memory cell; therefore the memory cost can be reduced. In this study, we used trap-assisted band-to-band thermionic field emission enhanced by self-heating in TFT to produce electron-hole pairs. The hole will be separated by a vertical field under the gate and be injected into the body of TFT to complete the programming operation. The erasing operation is performed by applying a lateral electric field between the source/drain to remove holes in the body of TFT. Thirdly, we proposed an edge-FN tunneling method to allow SONOS TFT possess not only a pixel switch but also a two-bit nonvolatile memory function in a display panel, thus causing the memory density to increase. In this study, we used a channel FN tunneling to program the SONOS TFT. Because the electric field in the gate-to-drain overlap region is larger than that in the channel region, it will cause a smoother electron injection into the nitride layer inside of the gate-to-drain overlap region, which also increases the gate-induced drain leakage (GIDL) current. The edge-FN tunneling method is used to erase electrons in the gate-to-drain overlap region, by doing so, the GIDL current has decreased. The memory status at the source/drain side is determined by the corresponding GIDL current of the SONOS TFT. Fourthly, we stored electrons in the nitride layer at source, channel, and drain regions of SONOS TFT to make sure that TFT possess a three-bit memory effect in a unitary cell, which also allows the memory density to increase significantly. In this study, programming and erasing operations in the source/drain region are performed by channel hot-electron injection and edge-FN tunneling method, while that in the channel region are accomplished by channel FN tunneling. The memory status in the source/drain is determined by the corresponding GIDL current, while that in the channel region by threshold voltage of the device The memory density for the device operated by proposed method can be further increased. In addition, if we store a number of N different types of electrons in those three regions mentioned above, there are N3 status can be stored in a memory cell. The memory density can beyond conventional multi-level-cell (MLC) flash memory. Two-bit memory effect per cell in a MLC flash memory can be achieved by storing four quantitative electrons in the floating gate of the memory device. If we store four quantitative electrons in the nitride layer at source, channel, and drain regions of SONOS TFT, we can obtain 64 memory states or 6-bit memory effect in a memory cell. Thus, the proposed concept is promising to storage the messages in a memory cell beyond four-bit.

Formation of hexagonal boron nitride (h-BN) by carbothermic reduction of B2O3 under nitrogen atmosphere at 1500oC was investigated. Reaction products were subjected to powder X-ray diffraction analysis, chemical analysis and were examined by SEM. B4C was found to exist in the reaction products of the experiments in which h-BN formation was not complete. One of the aims of this study was to investigate the role of B4C in the carbothermic production of h-BN. For this purpose, conversion reaction of B4C into h-BN was studied. B4C used in these experiments was produced in the same conditions that h-BN was formed, but under argon atmosphere. It was found that formation of h-BN from B4C&ndash / B2O3 mixtures was slower than activated C&ndash / B2O3 mixtures. It was concluded that B4C is not a necessary intermediate product in the carbothermic production of h-BN. Some additives are known to catalytically affect the h-BN formation. The second aim of this study was to examine the catalytic effect of some alkaline earth metal oxides and carbonates, some transition metal oxides and cupric nitrate. It was found that addition of 10wt% CaCO3 into the B2O3+C mixture was optimum for increasing the rate and yield of h-BN formation and decreasing the B4C amount in the products and that the reaction was complete in 2 hours. CaCO3 was observed to be effective in increasing the rate and grain size of the formed h-BN. Addition of cupric nitrate together with CaCO3 provided a further increase in the size of the h-BN grains.

Boron nitride is found mainly in two crystal structures / in hexagonal structure (h-BN) which is very much like graphite and in cubic structure (c-BN) with properties very close to those of diamond. h-BN is a natural lubricant due to its layered structure. It is generally used in sliding parts of the moving elements such as rotating element beds in turbine shafts. Since c-BN is the hardest known material after diamond it is used in making hard metal covers. In addition to its possible microelectronics applications (can be used to make p-n junction), its resistance to high temperatures and its high forbidden energy gap are its superiorities over diamond. Recent studies have shown that c-BN can be produced by Physical Vapor Deposition (PVD) and Chemical Vapor Deposition (CVD) in plasma. But these studies have failed to determine how all of the production parameters (boron and nitrogen sources, composition of the gas used, substrate, RF power, bias voltage, substrate temperature) affect the c-BN content, mechanical stress and the deposition rate of the product with a systematic approach. The systematic study was realized in the range of available experimental ability of the present PVD and CVD equipment and accessories. The BN films were produced in the plasma equipment for CVD using RF and MW and magnetron sputtering and were studied with the measurement and testing facilities. It is believed that with this approach it will be possible to collect enough experimental data to optimize production conditions of BN with desired mechanical and optoelectronic properties. h-BN films were successfully deposited in both systems. It was possible to deposit c-BN films with the MW power, however they were weak in cubic content. Deposition at low pressures eliminated the hydrogen contamination of the films. High substrate temperatures led to more chemically and mechanically stable films.

The instability under bias voltage stress and low mobility of hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT), produced by plasma enhanced chemical vapor deposition (PECVD) technique, are the main problems impeding the implementation of active matrix arrays for light emitting diode display panels and their peripheral circuitry. Replacing a-Si:H by hydrogenated nanocrystalline silicon film (nc-Si:H) seems a solution due to its higher mobility and better stability. Therefore nc-Si:H TFT was produced and investigated in this thesis. All TFT layers (doped nc-Si:H, intrinsic nc-Si:H and insulator films) were produced separately, characterized by optical (UV-visible and FTIR spectroscopies, XRD) and electrical (current-voltage, I-V) methods, and optimized for TFT application. Afterwards the non self-aligned bottom-gate TFT structure was fabricated by the photolithographic method using 2-mask set. The n+ nc-Si:H films, used for TFT drain/source ohmic contacts, were produced at high H2 dilution and at several RF power densities (PRF). The change of their lateral resistivity (rho) was measured by reducing the film thickness via reactive ion etching. The rho values rise below a critical film thickness, indicating the presence of the disordered and less conductive incubation layer. The optimum PRF for the lowest incubation layer was determined. Among the deposition parameters only increased NH3/SiH4 flow rate ratio improved the insulating properties of the amorphous silicon nitride (a-SiNx:H) films, chosen as the TFT gate dielectric. The electrical characteristics of two TFTs with a-SiNx:H having low leakage current, fabricated at different NH3/SiH4 ratios (~19 and ~28) were compared and discussed. The properties (such as crystallinity, large area uniformity, etc.) of the nc-Si:H film as TFT channel layer, were found to depend on PRF. For the films deposited at the center of the PECVD electrode the change from an amorphous dominant structure to a nanocrystalline phase took place with increasing PRF, whereas those at the edge had always nanocrystalline nature, independent of PRF. The two different TFTs produced at the center of the electrode with a-Si:H and nc-Si:H grown at low and high PRF, respectively, were compared through their I-V characteristics and electrical stability under the gate bias voltage stress. Finally, nc-Si:H TFT structure, produced and optimized in this work, was analyzed through gate-insulator-drain/source capacitor by capacitance-voltage (C-V) measurements within 106-10-2 Hz frequency (F) range. The inversion regime was detected at low F without any external charge injection. Besides, ac hopping conductivity in the nc-Si:H bulk was extracted from the fitting results of the C-F curves.

The production of low cost, large area display systems requires a light emitting material compatible with the standard silicon (Si) based complementary metal oxide semiconductor (CMOS) technology. The crystalline bulk Si is an indirect band semiconductor with very poor optical properties. On the other hand, hydrogenated amorphous Si (a-Si:H) based wide gap alloys exhibit strong visible photoluminescence (PL) at room temperature, owing to the release of the momentum conservation law. Still, the electroluminescence (EL) intensity from the diodes based on these alloys is weak due to the limitation of the current transport by the localized states. In the frame of this work, first, the luminescent properties of amorphous silicon nitride (a-SiNx:H) thin films grown in a plasma enhanced chemical vapor deposition (PECVD) system were analyzed with respect to the nitrogen content. Then, the doping effciency of p- and n-type hydrogenated nanocrystalline Si (nc-Si:H) films was optimized via adjusting the deposition conditions. Next, the junction quality of these doped layers was checked and further improved in a homojunction pin diode. Heterojunction pin light emitting diodes (LEDs) were fabricated with a-SiNx:H as the luminescent active layer. The EL effciency of the fresh diodes was very low, as expected. As a solution, the diodes were electro-formed under high electric field leading to nanocrystallization accompanied by a strong visible light emission from the whole diode area. The current-voltage (I-V) and EL properties of these transformed diodes were investigated in detail.

This work presents the development of a GaN-based dilute magnetic semiconductor (DMS) by metal organic chemical vapor deposition (MOCVD) that is ferromagnetic at room temperature (RT), electrically conductive, and possesses magnetic properties that can be tuned by n- and p-doping. The transition metal series (TM: Cr, Mn, and Fe) along with the rare earth (RE) element, Gd, was investigated in this work as the magnetic ion source for the DMS. Single- phase and strain-free GaTMN films were obtained. Optical measurements revealed that Mn is a deep acceptor in GaN, while Hall measurements showed that these GaTMN films were semi-insulating, making carrier mediated exchange unlikely. Hysteresis curves were obtained for all the GaTMN films, and by analyzing the effect of n- and p-dopants on the magnetic properties of these films it was determined that the magnetization is due to magnetic clusters. These findings are supported by the investigation of the effect of TM dopants in GaN nanostructures which reveal that TMs enhance nucleation resulting in superparamagnetic nanostructures. Additionally, this work presents the first report on the development of GaGdN by MOCVD providing an alternate route to developing a RT DMS. Room temperature magnetization results revealed that the magnetization strength increases with Gd concentration and can be enhanced by n- and p-doping, with holes being more efficient at stabilizing the ferromagnetic signal. The GaGdN films obtained in this work are single-phase, unstrained, and conductive making them suitable for the development of multifunctional devices that integrate electrical, optical, and magnetic properties.

The overall goal of this research is to improve fundamental understanding of the hydrogen passivation of defects in low-cost silicon and the fabrication of high-efficiency solar cells on thin crystalline silicon through low-cost technology development. A novel method was developed to estimate the flux of hydrogen, released from amorphous silicon nitride film, into the silicon. Rapid-firing-induced higher flux of hydrogen was found to be important for higher defect passivation. This was followed by the fabrication of solar cell efficiencies of ~ 17% on low-cost, planar cast multicrystalline silicon. Solar cell efficiencies and lifetime enhancement in the top, middle, and bottom regions of cast multicrystalline silicon ingots were explained on the basis of impurities and defects generally found in those regions. In an attempt to further reduce the cost, high-efficiency solar cells were fabricated on thin crystalline silicon wafers with full area aluminum-back surface field. In spite of loss in efficiency, wafer thinning reduced the module cost. Device modeling was performed to establish a roadmap towards high-efficiency thin cells and back surface recombination velocity and back surface reflectance were identified as critical parameters for high-efficiency thin cells. Screen-printed solar cells on float zone material, with efficiencies > 19% on 300 μm and > 18% on 140 μm were fabricated using a novel low-cost fabrication sequence that involved dielectric rear passivation along with local contacts and back surface field.

GaN-based light emitting diodes (LEDs) face several challenges if the technology is to make a significant impact on the solid state lighting market. The two most pressing of these challenges are cost and efficiency. The development of alternative substrate technologies shows promise toward addressing both of these challenges, as both GaN-based device technology and the associated metalorganic chemical vapor deposition (MOCVD) technology are already relatively mature. Zinc oxide (ZnO) and silicon (Si) are among the most promising alternative substrates for GaN epitaxy. This work focuses on the development of MOCVD growth processes to yield high quality GaN-based materials and devices on ZnO and Si. ZnO, because of its similar lattice constant and thermal expansion coefficient, is a promising substrate for growth of low defect-density GaN. The major hurdles for GaN growth on ZnO are the instability of ZnO in a hydrogen atmosphere and out-diffusion of zinc and oxygen from the substrate. A process was developed for the MOCVD growth of wurtzite GaN and InxGa1-xN on ZnO, and the structural and optical properties of these films were studied. High zinc and oxygen concentrations remained an issue, however, and the diffusion of zinc and oxygen into the subsequent GaN layer was studied more closely. Silicon is the most promising material for the development of an inexpensive, large-area substrate technology. The challenge in GaN growth on Si is the tensile strain induced by the lattice and thermal mismatch between GaN and Si. A thin atomic layer deposition (ALD)-grown Al2O3 interlayer was employed to relieve strain while also simplifying the growth process. While some strain was still observed, the oxide interlayer leads to an improvement in thin film quality and a reduction in both crack density and screw dislocation density in the GaN films. A comparison of GaN-based LEDs grown on sapphire and Al2O3/Si shows similar performance characteristics for both devices. IQE of the devices on silicon is ~32%, compared to ~37% on sapphire. These results show great promise toward an inexpensive, large-area, silicon-based substrate technology for MOCVD growth of GaN-based optoelectronic devices.