The main topics of the thesis are luminaries based on LED technology and methods for driving them. The aim of theoretical part is to offer basic knowledge about LEDs, their categories, advantages and disadvantages. The basic methods for driving LED modules are also presented. Based on these facts the design of LED switching power supply for street lighting is presented. The aim is to reach high power factor. The function of the devices is presented by examining parts of the power supply.

This graduation thesis is aimed in usage of MERS circuits in high-current electroengineering. The MERS circuit is a serial variable capacitor which capacity is possible to change by the help of switching of semiconductor components. On beginning of the thesis I shall acquaint you with usage of the MERS circuit. It will be sketched out their basic circuitry, the operating method, possibilities of transistors switching and calculation of the capacity capacitors for particular controlling method. On the prepared device we shall accomplish the predefined measurement. Furthermore we shall create the simulation by means of the Matlab programme. In the end we shall compare the results of the simulation with measured values.

Small size, light weight, high efficacy, longer lifetime and controllable output are the main advantages of high-frequency electronic ballasts for gas discharge lamps. However, power line quality and electromagnetic interference (EMI) issues arise when a simple peak rectifying circuit is used. To suppress harmonic currents and improve power factor, input-current-shaping (ICS) or power-factor-correction (PFC) techniques are necessary. This dissertation addresses advanced high-frequency electronic ballasting techniques by using a single-stage PFC approach. The proposed techniques include single-stage boost-derived PFC electronic ballasts with voltage-divider-rectifier front ends, single-stage PFC electronic ballasts with wide range dimming controls, single-stage charge-pump PFC electronic ballasts with lamp voltage feedback, and self-oscillating single-stage PFC electronic ballasts. Single-stage boost-derived PFC electronic ballasts with voltage-divider-rectifier front ends are developed to solve the problem imposed by the high boost conversion ratio required by commonly used boost-derived PFC electronic ballast. Two circuit implementations are proposed, analyzed and verified by experimental results. Due to the interaction between the PFC stage and the inverter stage, extremely high bus-voltage stress may exist during dimming operation. To reduce the bus voltage and achieve a wide-range dimming control, a novel PFC electronic ballast with asymmetrical duty-ratio control is proposed. Experimental results show that wide stable dimming operation is achieved with constant switching frequency. Charge-pump (CP) PFC techniques utilize a high-frequency current source (CS) or voltage source (VS) or both to charge and discharge the so-called charge-pump capacitor in order to achieve PFC. The bulky DCM boost inductor is eliminated so that this family of PFC circuits has the potential for low cost and small size. A family of CPPFC electronic ballasts is investigated. A novel VSCS-CPPFC electronic ballast with lamp-voltage feedback is proposed to reduce the bus-voltage stress. This family of CPPFC electronic ballasts are implemented and evaluated, and verified by experimental results. To further reduce the cost and size, a self-oscillating technique is applied to the CPPFC electronic ballast. Novel winding voltage modulation and current injection concepts are proposed to modulate the switching frequency. Experimental results show that the self-oscillating CS-CPPFC electronic ballast with current injection offers a more cost-effective solution for non-dimming electronic ballast applications. / Ph. D.

The growing demand for high voltage, compact pulsed power supplies has gained great attention. It requires power supplies with high power density, low profile and high efficiency. In this thesis, topologies and techniques are investigated to meet and exceed these challenges. Non-isolation type topologies have been used for this application. Due to the high voltage stress of the output, non-isolation topologies will suffer severe loss problems. Extremely low switching frequency will lead to massive magnetic volume. For non-isolation topologies, PWM converters can achieve soft switching to increase switching frequency. However, for this application, due to the large voltage regulation range and high voltage transformer nonidealities, it is difficult to optimize PWM converters. Secondary diode reverse recovery is another significant issue for PWM techniques. Resonant converters can achieve ZCS or ZVS and result in very low switching loss, thus enabling power supplies to operate at high switching frequency. Furthermore, the PRC and LCC resonant converter can fully absorb the leakage inductance and parasitic capacitance. With a capacitive output filter, the secondary diode will achieve natural turn-off and overcome reverse recovery problems. With a three-level structure, low voltage MOSFETs can be applied for this application. Switching frequency is increased to 200 kHz. In this paper, the power factor concept for resonant converters is proposed and analyzed. Based on this concept, a new methodology to measure the performance of resonant converters is presented. The optimal design guideline is provided. A novel constant power factor control is proposed and studied. Based on this control scheme, the performance of the resonant converter will be improved significantly. Design trade-offs are analyzed and studied. The optimal design aiming to increase the power density is investigated. The parallel resonant converter is proven to be the optimum topology for this application. The power density of 31 W/inch3 can be achieved by using the PRC topology with the constant power factor control. / Master of Science

A novel, zero-current-transition (ZCT) topology of the single-switch three-phase boost PFC rectifier is proposed. The soft transition is achieved with a low-power auxiliary circuit employing an additional switch. The circuit can be used with an IGBT at switching frequencies up to 50. Its operation is analyzed in detail, and design guidelines are provided. The small signal model of the circuit is developed, and voltage mode control is designed. The results are verified on a 4 kW, 50 kHz, experimental ZCT rectifier with an IGBT; total harmonic distortion below 9% and efficiency above 95% were obtained. / Master of Science

Three novel power factor correction (PFC) techniques are developed for both single-phase and three-phase applications. These techniques have advantages over the conventional approaches with regard to the converter efficiency, power density, cost, and reliability for many applications. The single-phase parallel PFC (PPFC) technique was established. Different from the conventional two-cascade-stage scheme, the PPFC technique allows 68% of input power to go to the output through only one time high frequency power conversion, but still achieves both unity power factor and tight output regulation. A family of PPFC converters were proposed for different power levels, which are simpler and more efficient than the conventional two-cascade-stage systems. Since isolated boost converters are adopted as the main power stage in some of the PPFC converters, a device based soft-switching technique was proposed for using IGBTs as the main power switches, which ensures the lower cost and higher efficiency benefits of the PPFC technique. The single-ended boost converter is the most frequently used converter in the single-phase PFC applications. For high power and/or high voltage applications, the major concerns of the conventional boost converter are the inductor volume and weight, and Iosses on the power devices, which will affect converter efficiency, power density, and cost. In this dissertation, a novel three-level boost converter was developed, which can use a much smaller inductor and lower voltage devices than the conventional one, yielding higher power density, higher efficiency, and lower cost. In three-phase applications, the three-phase boost rectifier is the most popular topology for the PFC purpose. A novel high performance boost PFC rectifier was developed, which provides several superior features than the conventional one with nearly no cost increase. lt inherently provides six-step PWM operation, which is the optimal PWM scheme with no circulating energy, minimum input ripple current, and minimum . switching events. It also greatly reduces the bridge diode reverse recovery loss, which is one of the major switching Iosses in the conventional three-phase boost rectifier. Furthermore, it can adopt very simple soft-switching techniques even with three independent analog controllers to further improve the performance. Several simple soft switched three-phase boost rectifiers have been developed. Besides, the bridge shoot-through problem is virtually eliminated. As a result, these new three-phase boost rectifiers have higher efficiency, higher power density, lower cost, and higher reliability compared with the conventional one. / Ph. D.

No description available.

This thesis investigates a novel induction machine topology that uses a rotating power electronic converter. Steady-state and dynamic performance of the topology is studied to understand its operational principle. Furthermore the potential of improving its efficiency and power factor is investigated. The topology is referred to as wound rotor induction machine with rotating power electronic converter (WRIM-RPEC).     The WRIM-RPEC topology offers the possibility to magnetize the induction machine from the rotor side by introducing a reactive voltage in the rotor. Thus, the power factor of the machine can be improved. Constant speed variable load operation can be achieved by setting the frequency of the introduced voltage. Two options of rotor winding and converter configuration in the WRIM-RPEC system are investigated. The wound rotor windings can either be open-ended and fed by a three-phase back-to-back converter or Y-connected and fed by a single three-phase converter. The dc-link in both converter configurations contains only a floating capacitor. These two configurations give different dc-link voltages at the same torque and speed.     Two analytical steady-state models of the topology are developed in this thesis. The first model can be used to analyze the operating condition of the motor at specific speed and torque. Particularly, the operating range of speed and torque of the topology is investigated. The second model is used to analyze variable power factor operation, including unity power factor operation. Analytical calculations and measurements are carried out on a 4-pole, 1.8kW induction machine and the results are compared.      A dynamic mathematic model is then developed for the WRIM-RPEC system for the back-to-back converter configuration. The mathematic model is then applied in Matlab/Simulink to study the dynamic performance of the system including starting, loading and phase-shifting. The simulation results are compared with measurements on the 4-pole, 1.8kW induction machine. Moreover, the simulation model using the existing Simulink blocks are studied to compare with the results obtained from the mathematic model. Furthermore, the dynamic performance of the WRIM-RPEC system with the single converter configuration is investigated. In addition, harmonic spectra analysis is conducted for the stator and rotor currents.     In the last part of the thesis, efficiency improvement is investigated on the 4-pole induction machine when it is assumed to drive a pump load. It is shown that the efficiency can be further improved by decreasing the rotor resistance. Due to space constraints it is however difficult to decrease the rotor resistance in a 4-pole induction machine. An investigation is thus carried out on a standard 12-pole, 17.5kW squirrel-cage induction machine with inherent low power factor. The cage rotor is redesigned to a wound rotor to enable the connection of converter to the rotor windings. An analytical model is developed to design the wound rotor induction machine. The machine performance from calculations is then compared with FEM simulations with good agreement. The analytical model is further used to design several WRIMs with different dimensions and rotor slot numbers. Power factor and efficiency improvement is then explored for these WRIMs. A promising efficiency increase of 6.8% is shown to be achievable. / <p>QC 20161111</p>

Les conditionneurs alternatifs – continu à absorption sinusoïdale (PFC) pour les applications critiques se distinguent par un haut niveau de performances tel que les THD réduits, un haut rendement et une bonne fiabilité. Leur importance est d’autant plus nécessaire qu’une continuité de service des alimentations est requise même en présence d’une défaillance interne de composant. Deux types de structures associées à leur commande sont réalisés à cet effet, les structures à redondance parallèle et les structure à redondance en série. Elles consistent respectivement en l’ajout d’un bras d’interrupteur dans le cas de la redondance parallèle, qui est une option plus compliquée et en une suppression d’une cellule de commutation dans le deuxième cas. L’étude présentée ici, consiste en premier lieu en une exploration et une évaluation de nouvelles familles de topologies multi-niveaux, caractérisée par un partitionnement cellulaire en série. Ces nouvelles topologies, ainsi que leurs variantes, comportent au moins une redondance structurelle avec des cellules mono-transistor à défaut de commande non critique et symétriques à point-milieu. Elles sont donc génériques pour la mise en parallèle et l’extension en triphasé. Cependant, elles sont pour la plupart peu compétitives à cause des composants qui sont souvent surdimensionnés et donc plus onéreuses, en comparaison avec la structure PFC Double-Boost 5 Niveaux à composants standards 600 V (brevetée par l’INPT – LAPLACE –CNRS en 2008) que nous étudions. Cette dernière constitue le meilleur compromis entre un bon rendement et une maîtrise des contraintes en mode dégradé. Sur le plan théorique nous montrons que le seul calcul de fiabilité basé uniquement sur un critère de premier défaut est inadapté pour décrire ce type de topologie. La prise en compte de la tolérance de panne est nécessaire et permet d'évaluer la fiabilité globale sur une panne effective (i.e. au second défaut). L'adaptation de modèles théoriques de fiabilité à taux de défaillance constant mais prenant en compte, au niveau de leurs paramètres, le report de contrainte en tension et l'augmentation de température qui résulte d'un premier défaut, permet de chiffrer en valeur relative, le gain obtenu sur un temps court. Ce résultat est compatible avec les systèmes embarqués et la maintenance conditionnelle. Un prototype monophasé de PFC double-boost 5 niveaux à commande entièrement numérique et à MLI optimisée reconfigurable en temps réelle a été réalisé afin de valider l’étude. Il permet une adaptation automatique de la topologie de 5 à 4 puis 3 niveaux par exemple. Ce prototype a également servi de test d'endurance aux transistors CoolMos et diodes SiC volontairement détruits dans des conditions d'énergie maîtrisée et reproductibles. D’autres campagnes d'endurance en modes dégradés ont été réalisées en laboratoire sur plusieurs centaines d’heures en utilisant ce même prototype. Nous nous sommes axés sur la détection de défauts internes et le diagnostic (localisation) rapide, d'une part par la surveillance directe et le seuillage des tensions internes (tensions flottantes) et d'autre part, par la détection d’harmoniques (amplitude et phase) en temps réel. Ces deux techniques ont été intégrées numériquement et évaluées sur le prototype, en particulier la seconde qui ne requiert qu'un seul capteur. Enfin, nous proposons une nouvelle variante PFC expérimentée en fin de mémoire, utilisant deux fois moins de transistors et de drivers pour les mêmes performances fréquentielles au prix d'un rendement et d'une répartition des pertes légèrement moins favorable que la structure brevetée. / This work is an exploration and an evaluation of new variants of multi-level AC/DC topologies (PFC) considering their global reliability and availability: electrical safety with an internal failure and post-failure operation. They are based on a non-differential AC and centre tap connection that led to symmetrical arrangement cells in series. These topologies permit an intrinsic active redundancy between cells in a same group and a segregation capability between the two symmetrical groups of cells. More again, they are modular and they can be paralleled and derived to any number of levels. Only single low-voltage (600V) transistor pear cell is used avoiding the short-circuit risk due to an unwanted control signal. Comparisons, taking into account losses, distribution losses, rating and stresses (overvoltage and over-temperature) during the post-operation are presented. Results highlight the proposed 5-level Double-Boost Flying Capacitor topology. This one was patented at the beginning of thesis, as a solution with the best compromise. On the theoretical side, we show that the reliability calculation based only on a "first fault occurrence" criterion is inadequate to really describe this type of topology. The inclusion of fault tolerance capability is needed to evaluate the overall reliability law (i.e. including a second failure). The adaptation of theoretical models with constant failure rate including overvoltage and over-temperature dependencies exhibit an increasing of the reliability over a short time. This property is an advantage for embedded systems with monitoring condition. Local detection and rapid diagnosis of an internal failure were also examined in this work. Two methods are proposed firstly, by a direct flying caps monitoring and secondly, by a realtime and digital synchronous demodulation of the input sampled voltage at the switching frequency (magnitude and phase). Both techniques have been integrated on FPGA and DSP frame and evaluated on a AC230V-7kW DC800V – 31kHz lab. set-up. We put forward the interest of the second method which only uses one input voltage sensor. Finally, we propose in this dissertation a new generic X-level PFC Vienna using, in 5-level version, half transistors and drivers for identical input frequency and levels. At the cost of a slight increase of losses and density losses, this topology appears very attractive for the future. A preliminary lab. set-up and test were also realized and presented at the end of the thesis.

This thesis deals with the reactive power compensation, namely the possibility of reactive power compensation in Petrochemie company using a passive power factor correction system instead of synchronous generators, as part of the contract Kompel company. The thesis analyzes problems of definition of power in circuits with sinusoidal and nonsinusoidal voltages and currents. Furthermore, this thesis describes the power factor correction systems used in the low and medium voltage industrial and distribution networks. The last four chapters contain description of the existing state of power plant in Petrochemie company. There are considered the possibility of use of existing power factor correction system owned by company. The new static power factor correction system is suggested and functionality of power factor correction systems is verified through the simulations.