Understanding the pulsed discharge behavior of low-rate lithium coin cells in wireless sensing systems is critical to prolong the operating life and/or reduce the size of battery-powered WSs. This dissertation presents the battery transient analysis for a sensor duty cycle, experimental studies for sustained pulse discharge cycling, and investigation on recharge strategies for a battery/power harvesting hybrid system for WSs. The transient behavior of the lithium coin cells during pulse discharge and subsequent relaxation was investigated with single-pulse experiments and theoretical analysis. The voltage response for a pulsed discharge had two parts: a region of rapid voltage change and a region of slower change. The magnitude of the rapid voltage losses was associated with ohmic and interfacial resistances. Solid phase diffusion in the cathode was found to be the major contributor to the "slow" transient voltage change that occurred during and after a pulse. An analytical model was developed to describe the time-dependent voltage and the corresponding non-uniform concentration distribution for the thick porous electrode. A fit of the analytical model to experimental data permitted an estimate of the solid phase diffusivity. Independent fitting of the pulse data and relaxation data both yielded a diffusivity of D ~ 4×10-11 cm2/s, which agreed well with measured values reported in literature. The interactive effect of battery characteristics and WS operating conditions was investigated during sustained pulsed-discharge cycling. At low standby currents (≤50 μA), the influence of the standby current on the operating voltage and battery capacity was negligible. The pulse current had a significant impact on the lower voltage and determined the maximum capacity that could be extracted from a battery regardless of the duty cycle factor. For each pulse length studied, the battery capacity increased as the standby time increased, until a maximum capacity was reached, which could not be increased by further increase in the standby time. The minimum standby time for full (or near full) relaxation for duty cycles with different pulse length was found to correlate well with ratio ts/tp2. Battery pulse discharge-recharge cycling as would occur in a hybrid power system was investigated, and the recharge strategies were evaluated in terms of capacity loss over cycling and energy efficiency. Results from the cycling tests suggested the importance of a rest period between the discharge and charge step of a cycle. PRCR cycling with a 2 s rest period could lower the capacity loss to 25% or less of that of PC cycling with no rest period over 10,000 cycles. Cycling the battery at 80% SOC rather than at 100% SOC (3.1 V) significantly reduced the capacity loss during cycling.

Since their conception in 1999, CubeSats have come and gone a long way. The first few that went into space were more of a “proof of concept,” and were more focused on sending simple data and photographs back to Earth. Since then, vast improvements have been made by over 40 universities and private firms, and now CubeSats are beginning to look towards interplanetary travel. These small satellites could provide a cost effective means of exploring the galaxy, using off the shelf components and piggy-backing on other launch vehicles with more expensive payloads. However, CubeSats are traditionally launched into Low Earth Orbit (LEO), and if an interplanetary satellite is to go anywhere from there, it will need a propulsion system. This thesis project’s main goal will be to investigate the possibility and capability of an Ion-Spray propulsion system. Several problems are to be tackled in this project: how to take a 9 V supply and boost it to a maximum potential difference of 5,000 V, all while minimizing the noise and testing the feasibility of such a system being flown on board a CubeSat.

No description available.

Due to the superior characteristics compared to its silicon (Si) counterpart, the wide bandgap (WBG) semiconductor enables next-generation power electronics systems with higher efficiency and higher power density. With higher blocking voltage available, WBG devices, especially the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), have been widely explored in various medium-voltage (MV) applications in both industry and academia. However, due to the high di/dt and high dv/dt during the switching transient, potential overcurrent, overvoltage, and gate failure can greatly reduce the reliability of implementing SiC MOSFETs in an MV system. By utilizing the parasitic inductance between the Kelvin- and the power-source terminal, a short-circuit (SC) and overload (OL) dual-protection scheme is proposed for overcurrent protection. A full design procedure and reliability analysis are given for SC circuit design. A novel OL circuit is proposed to protect OL faults at the gate-driver level. The protection procedure can detect an SC fault within 50 nanoseconds and protect the device within 1.1 microsecond. The proposed method is a simple and effective solution for the potential overcurrent problem of the SiC MOSFET. For SiC MOSFETs in series-connection, the unbalanced voltages can result in system failure due to device breakdown or unbalanced thermal stresses. By injecting current during the turn-off transient, an active dv/dt control method is used for voltage balancing. A 6 kV phase-leg using eight 1.7 kV SiC MOSFETs in series-connection has been tested with voltage balanced accurately. Modeling of the stacked SiC MOSFET with active dv/dt control is also done to summarize the design methodology for an effective and stable system. This method provides a low-loss and compact solution for overvoltage problems when MV SiC MOSFETs are connected in series. Furthermore, a scalable auxiliary power network is proposed to prevent gate failure caused by unstable gate voltage or EMI interference. The two-stage auxiliary power network (APN) architecture includes a wireless power transfer (WPT) converter supplied by a grounded low voltage dc bus, a high step-down-ratio (HSD) converter powered from dc-link capacitors, and a battery-based mini-UPS backup power supply. The auxiliary-power-only pre-charge and discharge circuits are also designed for a 6 kV power electronics building block (PEBB). The proposed architecture provides a general solution of a scalable and reliable auxiliary power network for the SiC-MOSFET-based MV converter. For the WPT converter, a multi-objective optimization on efficiency, EMI mitigation, and high voltage insulation capability have been proposed. Specifically, a series-series-CL topology is proposed for the WPT converter. With the optimization and new topology, a 120 W, 48 V to 48 V WPT converter has been tested to be a reliable part of the auxiliary power network. For the HSD converter, a novel unidirectional voltage-balancing circuit is proposed and connected in an interleaved manner, which provides a fully modular and scalable solution. A ``linear regulator + buck" solution is proposed to be an integrated on-board auxiliary power supply. A 6 kV to 45 V, 100 W converter prototype is built and tested to be another critical part of the auxiliary power network. / Doctor of Philosophy / The wide bandgap semiconductor enables next-generation power electronics systems with higher efficiency and higher power density which will reduce the space, weight, and cost for power supply and conversion systems, especially for renewable energy. However, by pushing the system voltage level higher to medium-voltage of tens of kilovolts, although the system has higher efficiency and simpler control, the reliability drops. This dissertation, therefore, focusing on solving the possible overcurrent, overvoltage, and gate failure issues of the power electronics system that is caused by the high voltage and high electromagnetic interference environment. By utilizing the inductance of the device, a dual-protection method is proposed to prevent the overcurrent problem. The overcurrent fault can be detected within tens of nanoseconds so that the device will not be destroyed because of the huge fault current. When multiple devices are connected in series to hold higher voltage, the voltage sharing between different devices becomes another issue. The proposed modeling and control method for series-connected devices can balance the shared voltage, and make the control system stable so that no overvoltage problem will happen due to the non-evenly distributed voltages. Besides the possible overcurrent and overvoltage problems, losing control of the devices due to the unreliable auxiliary power supply is another issue. This dissertation proposed a scalable auxiliary power network with high efficiency, high immunity to electromagnetic interference, and high reliability. In this network, a wireless power transfer converter is designed to provide enough insulation and isolation capability, while a switched capacitor converter is designed to transfer voltage from several kilovolts to tens of volts. With the proposed overcurrent protection method, voltage sharing control, and reliable auxiliary power network, systems utilizing medium-voltage wide-bandgap semiconductor will have higher reliability to be implemented for different applications.

This dissertation proposes a high-power, high-frequency and high-density three-level parallel resonant converter for capacitor charging. DC-DC pulsed power converters are widely used in military and medical systems, where the power density requirement is often stringent. The primary means for reducing the power converter size has been to reduce loss for reduced cooling systems and to increase the frequency for reduced passive components. Three-level resonant converters, which combine the merits of the three-level structure and resonant converters, are an attractive topology for these applications. The three-level configuration allows for the use of lower-voltage-rating and faster devices, while the resonant converter reduces switching loss and enhances switching capability. This dissertation begins with an analysis of the influence of variations in the structure of the resonant tank on the transformer volume, with the aim of achieving a high power density three-level DC-DC converter. As one of the most bulky and expensive components in the power converter, the different positions of the transformer within the resonant tank cause significant differences in the transformer's volume and the voltage and current stress on the resonant elements. While it does not change the resonant converter design or performance, the improper selection of the resonant tank structure in regard to the transformer will offset the benefits gained by increasing the switching frequency, sometimes even making the power density even worse than the power density when using a low switching frequency. A methodology based on different structural variations is proposed for a high-density design, as well as an optimized charging profile for transformer volume reduction. The optimal charging profile cannot be perfectly achieved by a traditional output-voltage based variable switching frequency control, which either needs excess margin to guarantee ZVS, or delivers maximum power with the danger of losing ZVS. Moreover, it cannot work for widely varied input voltages. The PLL is introduced to overcome these issues. With PLL charging control, the power can be improved by 10% with a narrow frequency range. The three-level structure in particular suffers unbalanced voltage stress in some abnormal conditions, and a fault could easily destroy the system due to minimized margin. Based on thoroughly analysis on the three-level behaviors for unbalanced voltage stress phenomena and fault conditions, a novel protection scheme based on monitoring the flying capacitor voltage is proposed for the three-level structure, as well as solutions to some abnormal conditions for unbalanced voltage stresses. A protection circuit is designed to achieve the protection scheme. A final prototype, built with a custom-packed MOSFET module, a SiC Schottky diode, a nanocrystalline core transformer with an integrated resonant inductor, and a custom-designed oil-cooled mica capacitor, achieves a breakthrough power density of 140W/in3 far beyond the highest-end power density reported (<100 W/in3) in power converter applications. / Ph. D.

Auxiliary power supply (APS) plays a key role in ensuring the safe operation of the main circuit elements including gate drivers, sensors, controllers, etc. in medium voltage (MV) silicon carbide (SiC)-based converter systems. Such a converter requires APS to have high insulation capability, low common-mode coupling capacitance (Ccm ), and high-power density. Furthermore, considering the lifetime and simplicity of the auxiliary power supply system design in the MV converter, partial discharge (PD) free and multi-load driving ability are the additional two factors that need to be addressed in the design. However, today’s state-of-the-art products have either low power rating or bulky designs, which does not satisfy the demands. To improve the current designs, this thesis presents a 1 MHz isolated APS design using gallium nitride (GaN) devices with MV insulation reinforcement. By adopting LCCL-LC resonant topology, the proposed APS is able to supply multiple loads simultaneously and realize zero voltage switching (ZVS) at any load conditions. Since high reliability under faulty load conditions is also an important feature for APS in MV converter, the secondary side circuit of APS is designed as a regulated stage. To achieve MV insulation (> 20 kV) as well as low Ccm value (< 5 pF), a current-based transformer with a single turn structure using MV insulation wire is designed. Furthermore, by introducing different insulated materials and shielding structures, the APS is capable to achieve different partial discharge inception voltages (PDIV). In this thesis, the transformer design, resonant converter design, and insulation strategies will be detailly explained and verified by experiment results. Overall, this proposed APS is capable to supply multiple loads simultaneously with a maximum power of 120 W for the sending side and 20 W for each receiving side in a compact form factor. ZVS can be realized regardless of load conditions. Based on different insulation materials, two different receiving sides were built. Both of them can achieve a breakdown voltage of over 20 kV. The air-insulated solution can achieve a PDIV of 6 kV with Ccm of 1.2 pF. The silicone-insulated solution can achieve a PDIV of 17 kV with Ccm of 3.9 pF. / M.S. / Recently, 10 kV silicon carbide (SiC) MOSFET receives strong attention for medium voltage applications. Asit can switch at very high speed, e.g. > 50 V/ns, the converter system can operate at higher switching frequency condition with very small switching losses compared to silicon (Si) IGBT [8]. However, the fast dv/dt noise also creates the common mode current via coupling capacitors distributed inside the converter system, thereby introducing lots of electromagnetic interference (EMI) issues. Such issues typically occur within the gate driver power supplies due to the high dv/dt noises across the input and output of the supply. Therefore, the ultra-small coupling capacitor (<5 pF) of a gate driver power supply is strongly desired.[37] To satisfy the APS demands for high power modular converter system, a solution is proposed in this thesis. This work investigates the design of 1 MHz isolated APS using gallium nitride (GaN) devices with medium voltage insulation reinforcement. By increasing switching frequency, the overall converter size could be reduced dramatically. To achieve a low Ccm value and medium voltage insulation of the system, a current-based transformer with a single turn on the sending side is designed. By adopting LCCL-LC resonant topology, a current source is formed as the output of sending side circuity, so it can drive multiple loads importantly with a maximum of 120 W. At the same time, ZVS can use realized with different load conditions. The receiving side is a regulated stage, so the output voltage can be easily adjusted and it can operate in a load fault condition. Different insulation solutions will be introduced and their effect on Ccm will be discussed. To further reduce Ccm, shielding will be introduced. Overall, this proposed APS can achieve a breakdown voltage of over 20 kV and PDIV up to 16.6 kV with Ccm<5 pF. Besides, multi-load driving ability is able to achieve with a maximum of 120 W. ZVS can be realized. In the end, the experiment results will be provided.

M.S.

In recent years, there is a clear trend toward increasing the demand for electric power in high-power applications. High-power converters are making major impacts on these high-power applications. Recent breakthroughs in Silicon Carbide (SiC) materials and fabrication techniques have led to the development of high-voltage, high-frequency power devices, which are at the heart of high-power converters. SiC metal-oxide semiconductor field-effect transistors (MOSFETs) have advantages over silicon (Si) devices due to their higher breakdown voltage, higher thermal capability, and lower on-state resistance. However, their fast switching frequency and high blocking voltage bring challenges to the gate-drive circuit design. The gate driver of SiC-MOSFETs requires a power supply that provides a high-voltage, high-density design, a low input-output capacitance (CI/O) transformer design, good voltage regulation, as well as good resilience to faults to enable safe and fast operation. In this thesis, a power supply that supplies multiple gate drivers for 10 kV SiC MOSFETs is presented. A transformer design approach with a single turn at the primary side is proposed. A 20 kV insulation is achieved by the primary HV cable insulation across a toroid transformer core. The CI/O is designed less than 2 pF to mitigate the Common-Mode (CM) noise. A circuit topology analysis is performed and the inductor/capacitor/capacitor/inductor (LCCL) – inductor/capacitor (LC) circuit is selected. This circuit allows Zero-Voltage Switching (ZVS) at full operation range. A Resonant-Current-Bus (RCB) is built at the transformer primary side to achieve load-independence. / Master of Science / Wide-bandgap semiconductor devices have attracted widespread attention due to their superior performance compared to their silicon devices counterpart. To utilize its full benefits, this thesis presents a complete design and optimization of a gate-drive power supply that supplies multiple gate drivers for high-voltage, high-speed semiconductor devices. Four objectives, including high density at high voltage, good noise mitigation, fair voltage regulation, resilience to faults have been achieved. During the design procedure, different topology candidates are introduced and compared, after which a resonant topology is selected. The wide-bandgap semiconductor devices are utilized to reduce the size and losses. Hardware assembly is shown and experimental testing results are provided in the end to verify the design.

The effectiveness of an EMI filter is closely related to the impedance of the noise source. Due to the time-varying nature of the noise source impedance of an offline power supply, the measurement of it cannot be done using conventional impedance measuring methods. Two new methods, the insertion loss method and the signal injection method, are proposed to perform such a measurement. The insertion loss method utilizes the EMI emission as a signal source and derives the source impedance by measuring the emission attenuation caused by an inserted impedance. The signal injection method injects a signal to the power supply and measures the response. The insertion loss method is verified experimentally both for common mode and differential mode, The signal injection method for common mode source impedance measurement is experimentally verified. That for differential mode source impedance measurement requires a faster equipment and is not fully verified. An EMI filter is usually characterized in the manufacturer’s catalog by its attenuation in a standard system (50Ω source impedance and 50Ω load impedance). The effectiveness of the filter in a practical system may significantly deviate from the manufacturer’s data. To provide the users with practically useful information, a scheme to characterize the EMI filter, the impedance matrix approach is proposed. This approach takes parasitic effect into consideration and the parameters can be measured relatively easily. The approach is verified experimentally by applying a commercial EMI filter to a power supply and comparing the predicted attenuation with the measured one. / Master of Science

This thesis focuses on the study, implementation and improvement of a digital controller for a power factor correction (PFC) converter. The development of the telecommunications industry and the Internet demands reliable, cost-effective and intelligent power. Nowadays, the telecommunication power systems have output current of up to several kilo amperes, consisting of tens of modules. The high-end server system, which holds over 100 CPUs, consumes tens of kilowatts of power. For mission-critical applications, communication between modules and system controllers is critical for reliability. Information about temperature, current, and the total harmonic distortion (THD) of each module will enable the availability of functions such as dynamic temperature control, fault diagnosis and removal, and adaptive control, and will enhance functions such as current sharing and fault protection. The dominance of analog control at the modular level limits system-module communications. Digital control is well recognized for its communication ability. Digital control will provide the solution to system-module communication for the DC power supply. The PFC converter is an important stage for the distributed power system (DPS). Its controller is among the most complex with its three-loop structure and multiplier/divider. This thesis studies the design method, implementation and cost effectiveness of digital control for both a PFC converter and for an advanced PFC converter. Also discussed is the influence of digital delay on PFC performance. A cost-effective solution that achieves good performance is provided. The effectiveness of the solution is verified by simulation. The three level PFC with range switch is well recognized for its high efficiency. The range switch changes the circuit topology according to the input voltage level. Research literature has discussed the optimal control for both range-switch-off and range-switch-on topologies. Realizing optimal analog control requires a complex structure. Until now optimal control for the three-level PFC with analog control has not been achieved. Another disadvantage of the three-level PFC is the output capacitor voltage imbalance. This thesis proposes an active balancing solution to solve this problem. / Master of Science