Harmonic distortions are inevitably caused by a rectifier and an inverter due to their inherent nonlinearities. An AC-DC-AC converter, configured by the series connection of a rectifier, DC link, and an inverter, induces harmonic distortions at both AC sides and at the DC link. These harmonics can nonlinearly interact or modulate the fundamental frequencies at the AC sides to cause interharmonic distortions. Harmonic and interharmonic distortions can seriously hamper the normal operation of the power system by means of side effects such as excitation of undesirable electrical and/or mechanical resonances, misoperation of control devices, and so forth. This dissertation presents effective methodologies to mitigate harmonic and interharmonic distortions by applying dithered pulse-width modulated (PWM) signals to a voltage-sourced inverter (VSI) type adjustable speed drive (ASD). The proposed methods are also efficient because the dithering applications are performed on control signals without the need for additional devices. By the help of dithering, the rejection bandwidth of a harmonic filter can be relaxed, which enables a lower-order configuration of harmonic filters. First, this dissertation provides a dithering application on gating signals of a sinusoidal PWM (SPWM) inverter in the simulated VSI-ASD model. The dithering is implemented by adding intentional noise into the SPWM process to randomize rising and falling edges of each pulse in a PWM waveform. As a result of the randomized edges, the periodicity of each pulse is varied, which result in mitigated harmonic tones. This mitigation of PWM harmonics also reduces associated interharmonic distortions at the source side of the ASD. The spectral densities at harmonic and interharmonic frequencies are quanti fied by Fourier analysis. It demonstrates approximately up to 10 dB mitigation of harmonic and interharmonic distortions. The nonlinear relationship between the mitigated interharmonics and harmonics is confirmed by cross bicoherence analysis of source- and DC-side current signals. Second, this dissertation proposes a dithered sigma-delta modulation (SDM) technique as an alternative to the PWM method. The dithering method spreads harmonic tones of the SD M bitstream into the noise level. The noise-shaping property of SDM induces lower noise density near the fundamental frequency. The SDM bitstream is then converted into SDM waveform after zero-order interpolation by which the noise-shaping property repeats at every sampling frequency of the bitstream. The advantages of SDM are assessed by comparing harmonic densities and the number of switching events with those of SPWMs. The dithered SD M waveform bounds harmonic and noise densities below approximately -30 dB with respect to the fundamental spectral density without increasing the number of switching events. Third, this dissertation provides additional validity of the proposed method via hardware experiments. For harmonic assessment, a commercial three-phase inverter module is supplied by a DC voltage source. Simulated PWM signals are converted into voltage waveforms to control the inverter. To evaluate interharmonic distortions, the experimental configuration is extended to a VSI-ASD model by connecting a three-phase rectifier to the inverter module via a DC link. The measured voltage and current waveforms are analyzed to demonstrate coincident properties with the simulation results in mitigating harmonics and interharmonics. The experimental results also provide the efficacy of the proposed methods; the dithered SPWM method effectively mitigates the fundamental frequency harmonics and associated interharmonics, and the dithered SDM reduces harmonics with the desired noise-shaping property. / text

The trend in power electronics converters is to be highly efficient, compact, reliable, and cost-effective. Conventionally, power converters supply or consume power from the low-voltage utility, which impacts the size and efficiency of the system. For example, the recent proliferation of electric vehicles has demanded the rapid installation of dc fast chargers (DCFC) across the country. However, most of the commercial DCFCs operate at 480 V transferring hundreds of kilowatts, resulting in large line currents which could hinder the size, cost, and efficiency of conventional DCFCs. Conversely, modular multilevel power topologies can be directly tied to the medium-voltage (MV) grid, eliminating the line-frequency transformer and the bulky line cable requirements. Among these topologies, the cascaded H-bridge (CHB) has been extensively used in the industry for MV-high-power applications because of its cost and efficiency in this operation range. Thus, it is one of the prevalent topologies for MV solid-state transformers (SSTs) The asymmetrical hybrid binary CHB (HBCHB) allows increased output voltage levels at the expense of modularity. Based on the HBCHB, a converter new modular topology regarded as the pseudo-binary CHB (PBCHB) is proposed for the ac-dc front-end stage SSTs. To operate the PBCHB, a new hybrid modulator is developed to operate the three modular structures of the PBCHB with step-like sinusoidal waveforms at near-line-frequency commutations while an asymmetrical floating capacitor (FC) module operates at high-frequency PWM commutation. The FC module does not transfer active power but serves only as a power quality enhancer of the PBCHB. However, the modular structures symmetrically transfer all the power from the MV grid to the load. With the SST structure of the PBCHB, the dc-link voltages of the H-bridges are naturally balanced; yet the proposed hybrid modulator enables equal power transfer in the three modular structures. In addition, a controller for the FC voltage is designed, analyzed, and implemented in the proposed hybrid modulator The effectiveness of the proposed front-end SST with the proposed modulation and control technique is verified in a 1.2 kV/3 kW single-phase prototype, where each module was able to transfer 1kW each. Electromagnetic interference (EMI) also impacts the cost, size, and reliability of three-phase systems because they may require bulky EMI filters to avoid self-pollution and polluting the grid. The common-mode voltage (CMV) is one important factor of EMI emissions. Thus, reducing or eliminating it could improve the cost and size of the system. Space vector pulsewidth modulation (SVWPM) can directly design the CMV output and the switching sequence of three-phase converters. However, its implementation can become complex in converters with many levels such as MV grid-tied SST converters. This dissertation uses the digital gh coordinate and proposes a set of computations to easily retrieve the converter states with a reduced CMV and generate a symmetrical switching sequence with reduced number of commutations. To do this, a single vector among the nearest three vectors (NTVs) is sufficient to implement the switching sequence for the reduced commutation and reduced CMV SVPWM. Additionally, the dc bus can be fully utilized. Unlike conventional approaches, the developed technique is easily scalable because its computational complexity does not depend on the number of levels of the converter. The proposed reduced CMV technique was verified in a three-phase 15-level 311 V/600 W unit. Moving forward in the objective of CMV reduction, a new jk-coordinate system for multilevel converters is proposed for SVPWM with eliminated CMV. With the jk coordinates, the converter states that yield zero CMV (ZCMV) can be directly computed. In addition, a single jk vector is sufficient to generate the switching sequences of NTVs. Moreover, the switching sequences feature reduced losses for high-power-factor applications in the phase that naturally commutes twice during a sampling period. Similarly, the computation burden of the ZCMV SVPWM technique presented in this dissertation is not affected by the number of levels of the converter, thus, it is scalable. The three-phase 15-level 311 V/600 W prototype was utilized to verify this technique. / Doctor of Philosophy / The recent demands for fast chargers for electric vehicles (EV), photovoltaic (PV) energy integration, and data centers for artificial intelligence (AI) have driven the research and development of efficient, compact, and cost-effective power electronic solutions. Under these motivations, the solid-state transformer (SST) is a power electronics configuration that can benefit the EV, PV, AI, and several other applications. By eliminating the requirement of a line-frequency transformer, SSTs can be directly connected to the medium-voltage (MV) grid, reducing the weight and volume, and improving efficiency. The main reason for these advantageous attributes is the utilization of multilevel ac/dc or dc/ac converters. Among these, the cascaded H-bridge (CHB) converter has been extensively used in the industry for MV-high-power applications because of its cost, fault tolerance, and efficiency, making it a favorable converter for MV SSTs. Symmetrical modules in the CHB must commutate at the same pulsewidth modulation (PWM) when operating in an SST. An asymmetrical configuration such as the hybrid binary CHB (HBCHB) allows increased output voltage levels and low-frequency commutation at the expense of modularity. This dissertation proposes a pseudo-binary CHB (PBCHB) inspired by the HBCHB to obtain low-frequency commutations, thus, negligible switching losses in the SST. The PBCHB has symmetrical modules that transfer balanced active power with negligible switching losses while an asymmetrically smaller module enhances the power quality with PWM operation. To do this, a new hybrid modulator and controller were designed, analyzed, and verified in this dissertation. The effectiveness of the proposed front-end PBCHB-based SST with the developed modulation and control techniques is verified in an MV 1.2 kV/3 kW single-phase prototype. Electromagnetic interference (EMI) filters can impact the cost, size, and reliability of SSTs. The common-mode voltage (CMV) that power converters generate is one type of EMI emissions that could impact the cost and size of the system. The modulation technique called space vector pulsewidth modulation (SVWPM) has the freedom to design a switching sequence able to reduce or eliminate the CMV. However, implementing the SVPWM can become complex in MV grid-tied SST converters (PBCHB, CHB, HBCHB) with many voltage levels. This dissertation uses the digital gh coordinate system and a new jk coordinate system to reduce and eliminate the CMV, respectively. These coordinates systems have the advantage of reduced computational complexity in multilevel converters with large number of output voltage levels increases. The proposed techniques can retrieve back the abc signals for the PWM drivers without repetitive iterations. Moreover, the proposed techniques can generate symmetrical switching sequences with reduced number of commutations and switching losses in the converter. To do this, the computation of a single vector among the nearest three vectors is sufficient to implement the switching sequences of SVPWM. As a result, the computational complexity of the SVPWM techniques in this dissertation is constant and does not vary with the number of output voltage levels, making them easily scalable solutions compared to previous solutions in the literature. The proposed reduced and eliminated CMV SVPWM techniques were verified in a three-phase 15-level 311 V/600 W HBCHB unit in inverting mode.

In high power induction motor drives, the switching frequency of the inverter is quite low due to the high losses in the power devices. Real-time PWM strategies, which result in reduced harmonic distortion under low switching frequencies and have maximum possible DC bus utilisation, are developed for such drives in the present work. The space vector approach is taken up for the generation of synchronised PWM waveforms with 3-Phase Symmetry, Half Wave Symmetry and Quarter Wave Symmetry, required for high-power drives. Rules for synchronisation and the waveform symmetries are brought out. These rules are applied to the conventional and modified forms of space vector modulation, leading to the synchronised conventional space vector strategy and the Basic Bus Clamping Strategy-I, respectively. Further, four new synchronised, bus-clamping PWM strategies, namely Asymmetric Zero-Changing Strategy, Boundary Sampling Strategy-I, Basic Bus Clamping Strategy-II and Boundary Sampling Strategy-II, are proposed. These strategies exploit the flexibilities offered by the space vector approach like double-switching of a phase within a subcycle, clamping of two phases within a subcycle etc. It is shown that the PWM waveforms generated by these strategies cannot be generated by comparing suitable 3-phase modulating waves with a triangular carrier wave. A modified two-zone approach to overmodulation is proposed. This is applied to the six synchronised PWM strategies, dealt with in the present work, to extend the operation of these strategies upto the six-step mode. Linearity is ensured between the magnitude of the reference and the fundamental voltage generated in the whole range of modulation upto the six-step mode. This is verified experimentally. A suitable combination of these strategies leads to a significant reduction in the harmonic distortion of the drive at medium and high speed ranges over the conventional space vector strategy. This reduction in harmonic distortion is demonstrated, theoretically as well as experimentally, on a constant V/F drive of base frequency 50Hz for three values of maximum switching frequency of the inverter, namely 450Hz, 350Hz and 250Hz. Based on the notion of stator flux ripple, analytical closed-form expressions are derived for the harmonic distortion due to the different PWM strategies. The values of harmonic distortion, computed based on these analytical expressions, compare well with those calculated based on Fourier analysis and those measured experimentally.

Cette thèse de doctorat s'inscrit dans un projet pour le développement du transport ferroviaire piloté par la société ALSTOM Transport. Il répond aux prévisions de quadruplement des déplacements interurbains et régionaux en France à l'horizon 2020 en respectant les contraintes environnementales très sévères, dont les normes restrictives du niveau de bruit émis par les trains. Une réduction importante du bruit émis par le moteur est donc nécessaire. Notre mission dans ce projet a été de développer un outil capable de prédire le bruit d'origine électromagnétique produit par les moteurs synchrones à aimants permanents, équipés d'un bobinage distribué ou concentré, et alimentés par des tensions MLI. Pour cela, un modèle multi-physique a été développé.Un couplage numérique - analytique a été mis en place pour calculer les forces magnétiques dans l'entrefer. La perméance globale d'entrefer et les inductances synchrones sont ainsi calculées grâce à des simulations éléments finis en statique, et très rapides. Un niveau de précision et de rapidité de résolution inégalé est obtenu pour le calcul des forces magnétiques. L'alimentation MLI, la perméabilité des clavettes, la saillance du rotor et l'asymétrie des dents du stator sont pris en compte. La rapidité de l'outil permet un couplage avec un superviseur d'optimisation. Deux prototypes ont été dimensionnés et fabriqués dans le but de valider le modèle multi-physique / This thesis is part of a project for the development of rail transportation piloted by ALSTOM TRANSPORT. It meets the forecasts of fourfold increase of the interurban and regional travels in France before 2020, by respecting very severe environmental requirements, among which the restrictive standards of noise level emitted by trains. An important reduction of the noise radiated by motors is required. Our mission in this project was to develop a tool capable of predicting the electromagnetic noise produced by permanent magnet synchronous motors equipped with distributed or concentrated windings, and fed by a PWM converter. For that purpose, a multi-physics model was developed.A numerical - analytical coupling was set up to calculate the airgap magnetic pressures. Global airgap permeance and synchronous inductances are thus calculated thanks to statics finite element simulations. An unequalled level of precision and speed of resolution is obtained for the computation of airgap magnetic pressures. The PWM supply, the wedge permeability, the rotor shape and the asymmetry of stator teeth are taken into account. The quickness of the resolution allows coupling our tool with an optimization supervisor. Two prototypes were designed and built in order to validate the multi-physics model