The rise in demand for specialized medical services in the U.S has been recognized as one of the contributors to increased health care costs. Nuclear medicine is a specialized service that uses relatively new technologies and radiopharmaceuticals with a short half-life for diagnosis and treatment of patients. Nuclear medicine procedures are multi-step and have to be performed under restrictive time constraints. Consequently, managing patients in nuclear medicine clinics is a challenging problem with little research attention. In this work we present simulation and optimization models for improving patient and resource scheduling in health care specialty clinics such as nuclear medicine departments. We rst derive a discrete event system speci cation (DEVS) simulation model for nuclear medicine patient service management that considers both patient and management perspectives. DEVS is a formal modeling and simulation framework based on dynamical systems theory and provides well de ned concepts for coupling components, hierarchical and modular model construction, and an object-oriented substrate supporting repository reuse. Secondly, we derive algorithms for scheduling nuclear medicine patients and resources and validate our algorithms using the simulation model. We obtain computational results that provide useful insights into patient service management in nuclear medicine. For example, the number of patients seen at the clinic during a year increases when a group of stations are reserved to serve procedures with higher demand. Finally, we derive a stochastic online scheduling (SOS) algorithm for patient and resource management in nuclear medicine clinics. The algorithm performs scheduling decisions by taking into account stochastic information about patient future arrivals. We compare the results obtained using the SOS algorithm with the algorithms that do not take into consideration stochastic information. The SOS algorithm provides a balanced utilization of resources and a 10% improvement in the number of patients served.

The goal of this dissertation is to extend the state of the art in real-time scheduling algorithms to achieve energy efficiency. Currently, Pfair scheduling is one of the few scheduling frameworks which can optimally schedule a periodic real-time taskset on a multiprocessor platform. Despite the theoretical optimality, there exist large concerns about efficiency and applicability of Pfair scheduling in practical situations. This dissertation studies and proposes solutions to such efficiency and applicability concerns. This dissertation also explores temperature aware energy management in the domain of real-time scheduling. The thesis of this dissertation is: the implementation efficiency of Pfair scheduling algorithms can be improved. Further, temperature awareness of a real-time system can be improved while considering variation of task execution times to reduce energy consumption. This thesis is established through research in a number of directions. First, we explore the applicability of Dynamic Voltage and Frequency Scaling (DVFS) feature in the underlying platform, within Pfair scheduled systems. We propose techniques to reduce energy consumption in Pfair scheduling by using DVFS. Next, we explore the problem of quantum size selection in Pfair scheduled system so that runtime overheads are minimized. We also propose a hardware design for a central Pfair scheduler core in a multiprocessor system to minimized the overheads and energy consumption of Pfair scheduling. Finally, we propose a temperature aware energy management scheme for tasks with varying execution times.

Along with the development of VLSI technology and the trend of system-on-chip design, traditional high-level synthesis can not deal with relatively complexity of system-on-chip design. In order to achieve optimal resource allocation, meet its performance and power requirements, and reduce its design time, we need a high-level synthesis software dealing system-level behavior. In consideration of system complexity, we have proposed a high-level synthesis method that synthesis for the task-level grains in a system behavior. This method performs efficient task-level resource allocation, task binding and task scheduling to reach a system design that meets the low performance and power requirements with low implementation cost. We utilize simulated annealing technique to achieve its overall system optimization. We designed and implemented the software design of the task-level high-level synthesis method. In this research, the design consists of three modules: the initial synthesis module, the heuristic movement module and the performance evaluation module. We will use the software to carry out the experiments of the task-level high-level synthesis method on application systems to verify its capability in designing systematic chips.

As streaming video and audio over the Internet become popular, the deployment of a large-scale multimedia streaming application requires an enormous amount of server and network resources. In a video-on-demand environment, batching of video requests are often used to reduced I/O demand and improve throughput. Since users may leave if they experience long waits, a good video scheduling policy needs to consider not only the batch size but also the user defection probabilities and wait times. The common scheduling policies are the first-come-first-served (FCFS), the maximum queue length (MQL), and the maximum factored queue length (MFQL). But these schemes may choose the same video and serve the same video requests. Users choosing other video can not receive the video segment and may leave after waiting a long time. In this paper, we propose a batching policy that schedules the video with the concept of the bandwidth balancing scheme in DQDB networks. We refer to this as the SPBB policy. Our goal is to make sure that users can get the video segment and don¡¦t leave the video-on-demand system.

The Internet has become popular and many traditional services have changed into web service stage by stage. The web server with single architecture is no longer satisfying a large number of user requests and the cluster-based web server architecture becomes another suitable solution. Dispatch mechanism play an important role in web server cluster and there are many load balancing policies have been proposed recently. But, these research has only simulation, performance of these policies operate in a real system is unknown. In these simulation all has an assumption that web traffic is heavy-tailed distribution. However, in our experience, the assumption has changed. Web content has become large because network bandwidth increasing and more and more large files like video¡Baudio and tail software, etc. coming in. We defined this web traffic is a data-intensive workload. In this study, we use a real and data-intensive web site to measure and compare these scheduling policies.

Power consumption is gradually becoming an important issue of designing computing systems. Most of the researches of low power issues have focused on semiconductor techniques or hardware architecture designs, but less utilized the techniques of software optimization. This paper presents a new scheduling methodology in source code level for Intelligent Memory System, which reduces the energy consumption by means of code compilation techniques. The scheduling kernel provides two options for users: performance-oriented low power scheduling and energy-oriented low power scheduling, to achieve the objective of considering high performance and low power issues. The experimental results are also presented and discussed.

Bluetooth is an emerging technology to build a solution for providing short range, low power, low cost, and ubiquitous wireless environments. In this paper we propose a algorithm for asynchronous data traffic at the Medium Access Control (MAC) layer to meet Bluetooth characteristic and compare with other scheduling algorithms. The algorithm, named Efficient Utilization Polling (EUP), uses a single bit of the payload packet header as supplied knowledge of queues of slaves to the master to dynamically adapt the polling intervals. We also propose a differentiation mechanism, named Shifting Polling Window (SPW), which is based on EUP and differentiates throughput between different classes and still keeps the link utilization almost the same.

In order to reduce the performance gap between the processor and the memory subsystem, many researchers attempt to integrate the processor and memory on a single chip in recent years. Therefore a new class of computer architecture: PIM (Processor-in-Memory) are investigated. For this class of architecture, we propose a new transformation and parallelizing system, SAGE, to achieve the benefits of PIM architectures by fully utilizing the capabilities of the host processor and memory processors in the PIM system. In this thesis, we focus on the weight evaluation mechanism and 1H-nM scheduling mechanism. The weight evaluation mechanism is used to evaluate the weights of P.Host and P.Mem for each task. The 1H-nM scheduling mechanism takes two different weights into account to exploit the advantages of two kinds of processors in the PIM system. The experimental results of above mechanisms are also discussed.

PIM ¡]Processor-in-Memory¡^ architectures have been proposed in recent years for the purpose of reducing performance gap between processor and memory. This new class of computer architectures attempts to integrate processor and memory on a single one chip¡CWe proposed a new transformation and parallelizing system named SAGE ¡]Statement Analysis Group Evaluation¡^to fully utilize the host processor and memory processors in PIM systems. In this thesis, we focus on designing a load-balance optimization mechanism for the job scheduling. The experimental results of this mechanism are also discussed.

Power consumption is gradually becoming an important issue in designing computing systems. Most of the low power researches focused on semiconductor technique and hardware architecture design but less utilized the techniques of software optimization. In this thesis, list scheduling is employed to reduce the energy cost for the Processor-in-Memory system not at the sacrifice of execution performance. In our list-based low power scheduling algorithm, a priority list will be maintained for each scheduling step. The scheduling kernel utilizes the priority of mobility to determine which task will be scheduled to the suitable processor based on the energy cost model of energy-delay product. The experimental results are presented and discussed.