In this thesis, characterization of a 6W GaN HEMT power amplifier for optimal operating conditions through load pull simulations and measurements is investigated.The purpose is to find source and load impedances to achieve for instance maximum efficiency and maximum output power, and investigate whether thesimulated results can be replicated in a measurement setup. Simulations show that when matching for maximum output power, a peak output power of 13W is achieved, while in 1 dB compression, an output powerof 11.40W together with a power added efficiency of nearly 67% is obtained, a remarkable for a 6W device. Matching for maximum efficiency yields a peak power added efficiency of 78% and a peak drain efficiency of 90 %, however, in 1 dB compressionthese levels are 71% and 74 %, respectively. Load pull measurements are performed with a prototype design, however, due to problems with the softwarecontrolling the measurement equipment, the tuning process had to be done manually, which effectively limited the possibility of replicating the simulated results.With manual tuning in coarse steps, two sets for semi–optimal operating conditions are found. For the first set of impedances, a peak output power greaterthan 11 W, with a peak power added efficiency of 68% is obtained, while for the second set of impedances, an output power of 7.40W with a peak power addedefficiency of 70% is achieved. The measured performance indicate that the simulated results can be replicated once the measurement setup is working optimally.In addition, the topics of black–box characterization and digital predistortion linearization of microwave power amplifiers are investigated. Microwave power amplifiersobtain maximum operational performance when operated close to the saturation point. However, due to the nonlinear behavior of the device when operated inthis region, the output signal will be distorted and cause interference with neighboring channels. Thus, in order to maintain the high operational performanceand avoid adjacent channel interference, it is of great importance to characterize the nonlinear behavior of the device, and compensate for the introduced distortionterms. Digital predistortion linearization is considered to be among the most cost–effective linearization schemes as of today, providing flexibility and good performance.The design of a digital predistortion unit amounts to three main steps: deriving a behavioral model of the microwave power amplifier, estimating themodel parameters for the inverse characteristic, and the implementation of the preinverse filter. For behavioral modeling, well–known nonlinear models, such asthe Volterra series are investigated, and used with an indirect learning architecture to estimate the parameters of the inverse system.Simulations of the different linearization algorithms show that in an ideal environment, the adjacent channel power ratio can be reduced with up to 25 dB, almostindependent of the model used for the predistorter design. However, when used in a real measurement setup, a maximum reduction in adjacent channel power ratioof only 15 dB is obtained. The relatively large difference in performance is most likely caused by a combination of long term memory effects due to semiconductortrapping phenomena, noise, and modeling errors.

In this thesis different aspects of general low power design and LNA-design have been studied. A new architecture for an ultra low power LNA is proposed and simple simulation results are presented. Simulations show that there should be possible to design a 2.4 GHz LNA that works sufficiently at 200 µA. The proposed architecture achieved a voltage gain over 20 dB from 2.32 to 2.5 GHz, a noise figure of 4.65 dB, IIP3 of -15.45 dBm and a input match of -9.5 dB. There is still a lot of work do and many simulations to perform before one can inconclusively conclude that the proposed architecture is a feasible solution, although the results generated in this thesis seem promising.

In this master thesis there has been implemented an embedded demonstrator for video presentation and manipulation, based on the specification presented in the project thesis written last semester. The demonstrator was created with the intention of being used by Department of Electronics and Telecommunication in situations where the department needed good examples of electronic systems. These systems can be used to motivate, educate and possibly recruit new students. By combining the use of video as a motivational medium with a practical approach to the theory, the demonstrator is designed to emphasize the importance of hardware/software codesign in electronic systems. The demonstrator is designed with a combination of dedicated hardware modules and the Nios II/f embedded soft processor from Altera. Video is processed in both hardware and software to demonstrate the difference in obtainable video quality. A measured frame rate of 25 fps in hardware and less than 1 fps in software is considered to be a good demonstration of the difference in processing power. An additional color processing demonstration is also created to visually demonstrate the performance differences when processing colors using software versus using custom floating-point instructions. It is concluded that an average performance increase of 300% is archived when using custom instructions, which is concidered to be noticeable visually. A poster with the necessary theory, usage guidelines and results has been created to support the demonstration together with a plan of how the demonstration should be performed based on the age and educational background of the observer.The embedded demonstrator was implemented using the Altera DE2 platform in combination with the TRDB D5M camera and hardware description from Terasic.

Demonstration of embedded systems is a good way to motivate and recruit students to a future career in electronics. For Department of Electronics and Telecommunication at the Norwegian University of Science and Technology (NTNU), it is thus desirable to have an embedded demonstrator that gives the pupils an insight in what is actually possible when studying electronics at the university, a system that the department may present at different occasions. A good embedded demonstrator provides an interesting presentation of one or more topics related to electronics, and should be presented together with relevant theory in order to provide a level of education to the user.This report covers the implementation of an embedded demonstrator for audio manipulation on Altera's DE2 development and education board. The system is specified to demonstrate signal processing subjects like sampling and filtering through manipulation of analog audio signals. The main modules in the system are the Cyclone II 2C35 FPGA from Altera, running a Nios II soft-CPU, and a Wolfson WM8731 audio-codec. The specification of their operation is made with background in pedagogics theory in order to make the most interesting demonstration. To realize this specification, the system incorporates several design features for both activation and motivation of the user.The audio manipulator provides possibilities for comparison between different sample rates and filter characteristics in real-time operation. This makes the system well suited for practical demonstration of signal processing theory. Due to the presentation of perceivable results, in addition to the implementation of a user interface for interaction, the implemented audio demonstrator is considered to be a well suited platform for demonstration of topics related to electronics.

Embedded systems are ideal as electronic demonstrators because they provides the designer with wide possibilities for optimization through codesign. In many situations, like school visits at the Norwegian University of Science and Technology (NTNU), ”Forskningstorget” and ”Elektronikk- & Telekommunikasjonsdagen”, it is desirable for the Department of Electronics and Telecommunication to both motivate and recruit new students to a future career in electronics. Thus, a demonstrator with an interesting presentation may give students an insight in what is possible when studying electronics at NTNU, in addition to a good examples of an electronic system. A good demonstrator for the department include one or more electronic topics and presents the relevant theory in different educational levelsThis master thesis includes the implementation of an embedded system used for demonstrating basic electronics. The Embedded System for Electronic Circuit Education is a platform for easy implementation of several scenarios with different topics within electronics. The system is designed with respect to a pedagogical view, and is implemented on both the Altera DE2 and the Atmel AVR STK600. In addition the embedded demonstrator includes a monitor for user interface and demonstration materiel. The main modules in the demonstrator is the Cyclone II 2C35 FPGA and the AVR AT90USB1287 microcontroller used to control the system behavior and the user interface. The demonstrator already includes two example scenarios, namely the ”Automatic Adjustment of Light” and ”How to Count in Binary, Hexadecimal and Decimal” with the topics Electronic Components and Numerical Systems respectively.With both existing and future scenarios, the embedded demonstrator has the possibility to both motivate and activate students with an interactive interface. In addition, the demonstrator may individualize educational levels to the different target groups with the demonstration material displayed on the monitor. Thus, the Embedded System for Electronic Circuit Education is a well suited demonstrator to recruit and motivate students to a future carrier in electronics.

In this thesis different aspects of general low power design and LNA-design have been studied. A new architecture for an ultra low power LNA is proposed and simple simulation results are presented. Simulations show that there should be possible to design a 2.4 GHz LNA that works sufficiently at 200 µA. The proposed architecture achieved a voltage gain over 20 dB from 2.32 to 2.5 GHz, a noise figure of 4.65 dB, IIP3 of -15.45 dBm and a input match of -9.5 dB. There is still a lot of work do and many simulations to perform before one can inconclusively conclude that the proposed architecture is a feasible solution, although the results generated in this thesis seem promising.

In this master thesis there has been implemented an embedded demonstrator for video presentation and manipulation, based on the specification presented in the project thesis written last semester. The demonstrator was created with the intention of being used by Department of Electronics and Telecommunication in situations where the department needed good examples of electronic systems. These systems can be used to motivate, educate and possibly recruit new students. By combining the use of video as a motivational medium with a practical approach to the theory, the demonstrator is designed to emphasize the importance of hardware/software codesign in electronic systems. The demonstrator is designed with a combination of dedicated hardware modules and the Nios II/f embedded soft processor from Altera. Video is processed in both hardware and software to demonstrate the difference in obtainable video quality. A measured frame rate of 25 fps in hardware and less than 1 fps in software is considered to be a good demonstration of the difference in processing power. An additional color processing demonstration is also created to visually demonstrate the performance differences when processing colors using software versus using custom floating-point instructions. It is concluded that an average performance increase of 300% is archived when using custom instructions, which is concidered to be noticeable visually. A poster with the necessary theory, usage guidelines and results has been created to support the demonstration together with a plan of how the demonstration should be performed based on the age and educational background of the observer.The embedded demonstrator was implemented using the Altera DE2 platform in combination with the TRDB D5M camera and hardware description from Terasic.

Demonstration of embedded systems is a good way to motivate and recruit students to a future career in electronics. For Department of Electronics and Telecommunication at the Norwegian University of Science and Technology (NTNU), it is thus desirable to have an embedded demonstrator that gives the pupils an insight in what is actually possible when studying electronics at the university, a system that the department may present at different occasions. A good embedded demonstrator provides an interesting presentation of one or more topics related to electronics, and should be presented together with relevant theory in order to provide a level of education to the user.This report covers the implementation of an embedded demonstrator for audio manipulation on Altera's DE2 development and education board. The system is specified to demonstrate signal processing subjects like sampling and filtering through manipulation of analog audio signals. The main modules in the system are the Cyclone II 2C35 FPGA from Altera, running a Nios II soft-CPU, and a Wolfson WM8731 audio-codec. The specification of their operation is made with background in pedagogics theory in order to make the most interesting demonstration. To realize this specification, the system incorporates several design features for both activation and motivation of the user.The audio manipulator provides possibilities for comparison between different sample rates and filter characteristics in real-time operation. This makes the system well suited for practical demonstration of signal processing theory. Due to the presentation of perceivable results, in addition to the implementation of a user interface for interaction, the implemented audio demonstrator is considered to be a well suited platform for demonstration of topics related to electronics.

Embedded systems are ideal as electronic demonstrators because they provides the designer with wide possibilities for optimization through codesign. In many situations, like school visits at the Norwegian University of Science and Technology (NTNU), ”Forskningstorget” and ”Elektronikk- & Telekommunikasjonsdagen”, it is desirable for the Department of Electronics and Telecommunication to both motivate and recruit new students to a future career in electronics. Thus, a demonstrator with an interesting presentation may give students an insight in what is possible when studying electronics at NTNU, in addition to a good examples of an electronic system. A good demonstrator for the department include one or more electronic topics and presents the relevant theory in different educational levelsThis master thesis includes the implementation of an embedded system used for demonstrating basic electronics. The Embedded System for Electronic Circuit Education is a platform for easy implementation of several scenarios with different topics within electronics. The system is designed with respect to a pedagogical view, and is implemented on both the Altera DE2 and the Atmel AVR STK600. In addition the embedded demonstrator includes a monitor for user interface and demonstration materiel. The main modules in the demonstrator is the Cyclone II 2C35 FPGA and the AVR AT90USB1287 microcontroller used to control the system behavior and the user interface. The demonstrator already includes two example scenarios, namely the ”Automatic Adjustment of Light” and ”How to Count in Binary, Hexadecimal and Decimal” with the topics Electronic Components and Numerical Systems respectively.With both existing and future scenarios, the embedded demonstrator has the possibility to both motivate and activate students with an interactive interface. In addition, the demonstrator may individualize educational levels to the different target groups with the demonstration material displayed on the monitor. Thus, the Embedded System for Electronic Circuit Education is a well suited demonstrator to recruit and motivate students to a future carrier in electronics.

This report aims to provide a complete specification of an IEEE-754 1985 compliantdesign, as well as a working, synthesizable implementation in Verilog HDL. Thereport is based on a preliminary project, which analyzed the IEEE-754 standardand suggested a set of algorithms suitable for a compact realization.Through traditional methods of both algorithmic analysis and dataanalysis,requirements of functional units are derived, and operations are scheduled.A set of functional simulations assert the correctness of the design, while areaand performance analysis provides information on the speedup gained, versus thehardware cost.Finally, the results obtained are compared to existing implementations, bothhardware and software.