A modified space vector modulation algorithm for a zero-voltage transition three-phase voltage source inverter/boost rectifier is presented. The converter is intended for high performance medium power applications requiring bi-directional power flow. The proposed modified space vector modulation allows the main switches to be operated with constant frequency and soft switching for any phase shift between the three-phase currents and voltages. The modulation algorithm also eliminates any low frequency distortion caused by the zero-voltage transition and can be extended to other soft-switching PWM three-phase converters. Experimental verification of the proposed algorithm is also presented as well as a comparison to the hard switched PWM converter. / Master of Science

The use of Insulated Gate Bipolar Transistors (IGBT) have enabled better switching performance than the Metal Oxide Semiconductor Field effect Transistor (MOSFET) in medium to high power applications due to their lower on-state power loss and higher current densities. The power ratings of IGBTs are slowly increasing and are envisaged to replace thyristors in medium power applications such as High Voltage Direct Current (HVDC) inverter systems and traction drive controls. Devices such as the MOS Controlled Thyristor (MCT) and Emitter Switched Thyristor (EST) were developed in an effort to further simplify drive requirements of thyristors by incorporating a voltage controlled MOS gate into the thyristor structure. However, the MCT is unable to achieve controlled current saturation which is a desirable characteristic of power switching devices while the EST has only limited control. The IGBT can achieve current saturation, however, due to the transistor based structure it exhibits a larger on-state voltage in high power applications compared with thyristor based devices. MOS Gated Thyristor (MGT) devices are a promising alternative to transistor based devices as they exhibit a lower forward voltage drop and improved current densities. This current research focuses on the Clustered Insulated Gate Bipolar Transistor (CIGBT) whilst being operated under soft-switching regimes. The CIGBT is a MOS gated thyristor device that exhibits a unique self-clamping feature that protects cathode cells from high anode voltages under all operating conditions. The self-clamping feature also enables current saturation at high gate biases and provides low switching losses. Its low on-state voltage and high voltage blocking capabilities make the CIGBT suitable as a contender to the IGBT in medium to high power switching applications. For the first time, the CIGBT has been operated under soft-switching regimes and transient over-voltages at turn-on have been witnessed which have been found to be associated with a number of factors. The internal dynamics of the CIGBT have been analysed using 2D numerical simulations and it has been shown that a major influence on the peak voltage is the P well spacing within the CIGBT structure. For example, Small adjacent P well spacings within the device results in an inability for the CIGBT to switch iv on correctly. Further to this, implant concentrations of the n well region during device fabrication can also affect the turn-on transients. Despite this, the CIGBT has been experimental analysed under soft-switching conditions and found to outperform the IGBT by 12% and 27% for on-state voltage drop and total energy losses respectively. Turn off current bumps have been seen whilst switching the device in zero voltage and zero current switching mode of operation and the internal dynamics have been analysed to show the influence upon the current at turn off. Preliminary results on the Trench CIGBT (TCIGBT) under soft switching conditions has also been analysed for the first time and was found to have a reduced peak over-voltage and better switching performance than the planer CIGBT. Through optimisation of the CIGBT structure and fabrication process, it is seen that the device will become a suitable replacement to IGBT in medium power application.

¡@¡@We consider output voltage regulation of a novel twin-buck switching power converters with so-called zero voltage switching (ZVS) and zero current switching (ZCS). In order to observe the constraints imposed by ZVS and ZCS, it is necessary to adopt the pulse frequency modulation (PFM) technique, which lead to a switching system with aperiodic operating cycles. The control design is based on a sampled data model of the original switching dynamics and a linear quadratic criterion that takes the at-sampling behaviour into account. The applicability of the proposed controller is validated via numerical simulations written in MATLAB and SIMULINK. The controller is realized using Field Programmable Gate Array (FPGA). The experimental results indicate that the feedback system have good transient response and adequate robustness margin against source and load variation, which verify the applicability of the proposed control design approach.

Variable frequency drives typically have employed dc voltage or current links for power distribution between the input and output converters and as a means to temporarily store energy. The dc link based power conversion systems have several inherent limitations. One of the important limitations is the high switching loss and high device stress which occur during switching intervals. This severely reduces the practical switching frequencies. Additionally, while the cost, size, and weight of the basic voltage sourced PWM drive is attractive, difficulties with input harmonics, output dV/dt and over-voltage, EMI/RFI, tripping with voltage sags, and other problems significantly diminish the economic competiveness of these drives. Add-ons are available to mitigate these problems, but may result in doubling or tripling the total costs and losses, with accompanying large increases in volume and weight. This research investigates the design, control, operation and efficiency calculation of a new power converter topology for medium and high power ac-ac, ac-dc and dc-ac applications. An ac-link formed by an inductor-capacitor pair replaces the conventional dc-link. Each leg of the converter is formed by two bidirectional switches. Power transfer from input to output is accomplished via a link inductor which is first charged from the input phases, then discharged to the output phases with a precisely controllable current PWM technique. Capacitance in parallel with the link inductor produces low turn-off losses. Turn-on is always at zero voltage as each switch swings from reverse to forward bias. Reverse recovery is with low dI/dt and also is buffered due to the link capacitance.

abstract: Presently, hard-switching buck/boost converters are dominantly used for automotive applications. Automotive applications have stringent system requirements for dc-dc converters, such as wide input voltage range and limited EMI noise emission. High switching frequency of the dc-dc converters is much desired in automotive applications for avoiding AM band interference and for compact size. However, hard switching buck converter is not suitable at high frequency operation because of its low efficiency. In addition, buck converter has high EMI noise due to its hard-switching. Therefore, soft-switching topologies are considered in this thesis work to improve the performance of the dc-dc converters. Many soft-switching topologies are reviewed but none of them is well suited for the given automotive applications. Two soft-switching PWM converters are proposed in this work. For low power automotive POL applications, a new active-clamp buck converter is proposed. Comprehensive analysis of this converter is presented. A 2.2 MHz, 25 W active-clamp buck converter prototype with Si MOSFETs was designed and built. The experimental results verify the operation of the converter. For 12 V to 5 V conversion, the Si based prototype achieves a peak efficiency of 89.7%. To further improve the efficiency, GaN FETs are used and an optimized SR turn-off delay is employed. Then, a peak efficiency of 93.22% is achieved. The EMI test result shows significantly improved EMI performance of the proposed active-clamp buck converter. Last, large- and small-signal models of the proposed converter are derived and verified by simulation. For automotive dual voltage system, a new bidirectional zero-voltage-transition (ZVT) converter with coupled-inductor is proposed in this work. With the coupled-inductor, the current to realize zero-voltage-switching (ZVS) of main switches is much reduced and the core loss is minimized. Detailed analysis and design considerations for the proposed converter are presented. A 1 MHz, 250 W prototype is designed and constructed. The experimental results verify the operation. Peak efficiencies of 93.98% and 92.99% are achieved in buck mode and boost mode, respectively. Significant efficiency improvement is achieved from the efficiency comparison between the hard-switching buck converter and the proposed ZVT converter with coupled-inductor. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2016

Electromagnetic interference (EMI) is a major concern in inverter motor drive systems. The sources of EMI have been commonly identified as high switching dv/dt and di/dt rates interacting with inverter parasitic components. The reduction of parasitic components relies on highly integrated circuit layout and packaging. This is the way to deal with noise path. On the other hand, switching dv/dt and di/dt can be potentially reduced by soft-switching techniques; thus the intensity of noise source is reduced. In this paper, the relation between the dv/dt di/dt and the EMI generation are discussed. The EMI sources of a hard-switching single-phase PWM inverter are identified and measured with separation of common-mode and differential-mode noises. The noise reduction in an auxiliary resonant snubber inverter (RSI) is presented. The observation of voltage ringing and current ringing and the methods to suppress these ringing in the implementation of RSI are also discussed. The test condition and circuit layout are described as the basis of the study. And the experimental EMI spectra of both hard- and soft-switching inverter are compared. The effectiveness and limitation of the EMI reduction of the ZVT-RSI are also discussed and concluded. The control interface circuit and gate driver design are described in the appendix. The implementation of variable charging time control of the resonant inductor current is also explained in the appendix. / Master of Science

Advanced power semiconductor devices have consistently proven to be a major force in pushing the progressive development of power conversion technology. The emerging wide-band-gap (WBG) material based power semiconductor devices are considered as gaming changing devices which can exceed the limit of silicon (Si) and be used to pursue groundbreaking high-frequency, high-efficiency, and high-power-density power conversion. The switching performance of cascode GaN HEMT is studied at first. An accurate behavior-level simulation model is developed with comprehensive consideration of the impacts of parasitics. Then based on the simulation model, detailed loss breakdown and loss mechanism analysis are studied. The cascode GaN HEMT has high turn-on loss due to the reverse recovery charge and junction capacitor charge, and the common source inductance (CSI) of the package; while the turn-off loss is extremely small attributing to unique current source turn off mechanism of the cascode structure. With this unique feature, the critical conduction mode (CRM) soft switching technique is applied to reduce the dominant turn on loss and significantly increase converter efficiency. The switching frequency is successfully pushed to 5MHz while maintaining high efficiency and good thermal performance. Traditional packaging method is becoming a bottle neck to fully utilize the advantages of GaN HEMT. So an investigation of the package influence on the cascode GaN HEMT is also conducted. Several critical parasitic inductance are identified, which cause high turn on loss and high parasitic ringing that may lead to device failure. To solve the issue, the stack-die package is proposed to eliminate all critical parasitic inductance, and as a result, reducing turn on loss by half and avoiding potential failure mode of the cascode GaN device effectively. Utilizing soft switching and enhanced packaging, a GaN-based MHz totem-pole PFC rectifier is demonstrated with 99% peak efficiency and 700 W/in3 power density. The switching frequency of the PFC is more than ten times higher than the state-of-the-art industry product while it achieves best possible efficiency and power density. Integrated power module and integrated PCB winding coupled inductor are all studied and applied in this PFC. Furthermore, the technology of soft switching totem-pole PFC is extended to a bidirectional rectifier/inverter design. By using SiC MOSFETs, both operating voltage and power are dramatically increased so that it is successfully applied into a bidirectional on-board charger (OBC) which achieves significantly improved efficiency and power density comparing to the best of industrial practice. In addition, a novel 2-stage system architecture and control strategy are proposed and demonstrated in the OBC system. As a continued extension, the critical mode based soft switching rectifier/inverter technology is applied to three-phase AC/DC converter. The inherent drawback of critical mode due to variable frequency operation is overcome by the proposed new modulation method with the idea of frequency synchronization. It is the first time that a critical mode based modulation is demonstrated in the most conventional three phase H-bridge AC/DC converter, and with 99% plus efficiency at above 300 kHz switching frequency. / Ph. D.

With the rise in demand for renewable energy sources, photovoltaics have become increasingly popular as a means of reducing household dependence on the utility grid for power. But solar panels generate dc electricity, a dc to ac inverter is required to allow the energy to be used by the existing ac electrical distribution. Traditional full bridge inverters are able to accomplish this, but they suffer from many problems such as low efficiency, large size, high cost, and generation of electrical noise, especially common mode noise. Efforts to solve these issues have resulted in improved solutions, but they do not eliminate all of the problems and even exaggerate some of them. Soft switching inverters are able to achieve high efficiency by eliminating the switching losses of the power stage switches. Since this action requires additional components that are large and have additional losses associated with them, these topologies have traditionally been limited to higher power levels. The resonant snubber inverter is a soft switching topology that eliminates many of these problems by taking advantage of the bipolar switching action of the power stage switches. This allows for a significant size reduction in the additional parts and elimination of common mode noise, making it an ideal candidate for lower power levels. Previous attempts to implement the resonant snubber inverter have been hampered by low efficiency due to parasitics of the silicon devices used, but, with recent developments in new semiconductor technologies such as silicon carbide and gallium nitride, these problems can be minimized and possibly eliminated. The goal of this thesis is to design and experimentally verify a design of a resonant snubber inverter that takes advantage of new semiconductor materials to improve efficiency while maintaining minimal additional, parts, simple control, and elimination of common mode noise. A 600 W prototype is built. The performance improvements over previous designs are verified and compared to alternative high efficiency solutions along with a novel control technique for the auxiliary resonant snubber. A standalone and grid tie controller are developed to verify that the auxiliary resonant snubber and new auxiliary control technique does not complicate the closed loop control. / Master of Science

Power density has become increasingly important for applications where weight and space are limited. Power density is a unique challenge requiring the latest transistor technology to push switching frequency to shrink passive filter size. Furthermore, while high efficiency is an important thermal handling strategy, it must be weighed against increases in component size. Google's Little Box Challenge shone light on these challenges in pushing the power density of a 2kW inverter. The rise in electric vehicle infrastructure and demand represents a unique application for power electronics: pushing the power handling capability and functionality of bi-directional, on-board electric vehicle chargers for faster charging while simultaneously shrinking them in size. New wide-bandgap (WBG) devices, combined with soft-switching, now allow inverters to shrink in size by pushing to higher switching frequencies while maintaining efficiency. Classic H-Bridge topologies have limited switching frequency due to hard switching. Soft switching allows inverters to operate at higher frequency while minimizing switching loss. Concurrently, interleaving can reduce current handling stress and conduction loss better than simply paralleling two transistors. A novel interleaved auxiliary resonant snubber for high-frequency soft-switching is introduced. The design of an auxiliary resonant snubber is discussed; this allows the main GaN MOSFETs to achieve zero voltage switching (ZVS). The auxiliary switches and SiC diodes achieve zero current switching (ZCS). This soft-switching strategy can be applied to any modulation scheme. Here, it is applied to an asymmetrical unipolar H-bridge with two high frequency legs interleaved. While soft-switching minimizes switching loss, conduction loss is simultaneously reduced for high-power applications by interleaving two high frequency legs. This topology is chosen for its conduction loss reduction and bi-directional capability. / Master of Science

The development of a fully automated tool that is used to optimize the design of a hybrid switch soft-switching inverter using a library of dynamic electro-thermal component models parameterized in terms of electrical, structural and material properties is presented. A multi-scale electro-thermal simulation approach is developed allowing for a large number of parametric studies involving multiple design variables to be considered, drastically reducing simulation time. Traditionally, electro-thermal simulation and analysis has been used to predict the behavior of pre-existing designs. While the traditional approach to electro-thermal analysis can help shape cooling requirements and heat sink designs to maintain certain junction temperatures, there is no guarantee that the design under study is the most optimal. This dissertation uses electro-thermal simulation to guarantee an optimal design and thus truly minimizing cooling requirements and improving device reliability. The proposed optimization tool is used to provide a step-by-step design optimization of a two-coupled magnetic hybrid soft-switching inverter. The soft-switching inverter uses a two-coupled magnetic approach for transformer reset condition [1], a variable timing control for achieving ZVS over the entire load range [2], and utilizes a hybrid switch approach for the main device [3]. Design parameters such as device chip area, gate drive timing control and external resonant capacitor and inductor are used to minimize device loss subject to design constraints such as converter minimum on-time, maximum device chip area, and transformer reset condition. Since the amount of heat that is dissipated has been minimized, the optimal cooling requirements can be determined by reducing the cooling convection coefficients until desired junction temperatures are achieved. The optimized design is then compared and contrasted with an already existing design from the Virginia Tech freedom car project using the generation II module. It will be shown that the proposed tool improves the baseline design by 16% in loss and reduces the cooling requirements by 42%. Validation of the device model against measured data along with the procedures for device parameter extraction is also provided. Validation of the thermal model against measured data is also provided. / Ph. D.