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京都大学 / 新制・課程博士 / 博士(理学) / 甲第23722号 / 理博第4812号 / 新制||理||1689(附属図書館) / 京都大学大学院理学研究科化学専攻 / (主査)教授 小野 輝男, 教授 寺西 利治, 教授 島川 祐一 / 学位規則第4条第1項該当 / Doctor of Science / Kyoto University / DGAM

Imposing dimensional restrictions on graphene sheets and adding impurities can give rise to carbon nanostructures with magnetic properties. In this work, zigzag graphene nanoribbons, zGNRs, with nitrogen and fluorine adatoms are investigated for magnetic properties of interest for spin devices. Geometry optimizations were done determining which position along a zGNR electrode that N and F would favorably attach to. Edge positions were determined as the most stable attachment site. M-cell zGNR electrodes (M = 1-3) edge-functionalized by N and F adatoms were investigated with respect to their band structures and spin densities in antiferromagnetic and ferromagnetic, AFM and FM, configurations. Focus was placed on band structures showing spin gaps, indicating potential for magnetoresistive devices. Devices were modeled for 2-cell and 3-cell electrodes with nitrogen adatoms, and the respective transmission spectra were compared. Attaching N adatoms to zGNRs turned out to be a mode of controlled manipulation of their spin configurations. Spin gaps were identified in units based on 3-cell-zGNR electrodes.

The direct growth of graphene by scalable methods on magnetic insulators is important for industrial development of graphene-based spintronic devices, and a route towards substrate-induced spin polarization in graphene without spin injection. X-ray photoelectron spectroscopy (XPS), low energy electron diffraction LEED, electron energy loss spectroscopy (EELS) and Auger electron spectroscopy (AES) demonstrate the growth of Co3O4(111) and CoO(111) to thicknesses greater than 100 Å on Ru(0001) surfaces, by molecular beam epitaxy (MBE). The results obtained show that the formation of the different cobalt oxide phases is O2 partial pressure dependent under same temperature and vacuum conditions and that the films are stoichiometric. Electrical I-V measurement of the Co3O4(111) show characteristic hysteresis indicative of resistive switching and thus suitable for advanced device applications. In addition, the growth of Co0.5Fe0.5O(111) was also achieved by MBE and these films were observed to be OH-stabilized. C MBE yielded azimuthally oriented few layer graphene on the OH-terminated CoO(111), Co0.5Fe0.5O(111) and Co3O4(111). AES confirms the growth of (111)-ordered sp2 C layers. EELS data demonstrate significant graphene-to-oxide charge transfer with Raman spectroscopy showing the formation of a graphene-oxide buffer layer, in excellent agreement with previous theoretical predictions. XPS data show the formation of C-O covalent bonding between the oxide layer and the first monolayer (ML) of C. LEED data reveal that the graphene overlayers on all substrates exhibit C3V. The reduction of graphene symmetry to C3V – correlated with C-O bond formation – enables spin-orbit coupling in graphene. Consequences may include a significant band gap and room temperature spin Hall effect – important for spintronic device applications. The results suggest a general pattern of graphene/graphene oxide growth and symmetry lowering for graphene formation on the (111) surfaces of rocksalt-structured oxides.

京都大学 / 新制・課程博士 / 博士(工学) / 甲第24904号 / 工博第5184号 / 新制||工||1990(附属図書館) / 京都大学大学院工学研究科分子工学専攻 / (主査)教授 関 修平, 准教授 須田 理行, 教授 生越 友樹, 教授 水落 憲和 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

La miniaturisation du nœud technologique de CMOS en dessous de 90 nm conduit à une forte consommation statique pour les mémoires et les circuits logiques, due aux courants de fuite de plus en plus importants. La spintronique, une technologie émergente, est d’un grand intérêt pour remédier à ce problème grâce à sa non-volatilité, sa grande vitesse d’accès et son intégration facile avec les procédés CMOS. Comparé à la commutation induite par le champ magnétique, le transfert de spin (STT), une approche de commutation induite par le courant, non seulement simplifie le processus de commutation mais aussi permet un fonctionnement sans précédent en termes de consommation et de vitesse. Cette thèse est consacrée à la modélisation compacte et la conception de circuit hybride pour les dispositifs spintroniques basés sur la commutation induite par le courant. La jonction tunnel magnétique (JTM), élément fondamental de la mémoire magnétique (MRAM), et la mémoire racetrack, nouveau concept fondé sur la propagation des parois de domaine induites par le courant, sont particulièrement étudiés. Ces dispositifs et circuits spintroniques sont basés sur les matériaux à anisotropie magnétique perpendiculaire (AMP) qui ouvrent la perspective d’une miniaturisation submicronique tout en conservant une grande stabilité thermique. De nombreux modèles physiques et paramètres réalistes sont intégrés dans la modélisation compacte pour obtenir une bonne cohérence avec les mesures expérimentales. En utilisant ces modèles compacts précis, certaines applications pour la logique et les mémoires magnétiques, tels que l’additionneur complet magnétique (ACM) et la mémoire adressable par contenu (CAM), sont conçues et simulées. Nous analysons et évaluons leur potentiel de performance en termes de surface, vitesse et consommation d’énergie par rapport aux circuits classiques. Enfin, afin de lutter contre la limitation de capacité entravant la large application, nous proposons deux optimisations de conception : la mémoire multivaluée (MLC) pour la STT-MRAM et l’assistance par champ magnétique pour la mémoire racetrack. Ce concept de MLC utilise le comportement stochastique des STT pour atteindre une haute vitesse tout en augmentant la densité de STT-MRAM. La mémoire racetrack assistée par champ magnétique est fondée sur l’observation d’une propagation des parois de domaine en dessous du courant critique, propagation est attribué à l’effet « Walker breakdown ». Ceci ouvre une nouvelle voie pour réduire le courant de propagation et augmenter la capacité des mémoires racetrack au-delà des améliorations des circuits périphériques et des matériaux. / The shrinking of complementary metal oxide semiconductor (CMOS) fabrication node below 90 nm leads to high static power in memories and logic circuits due to the increasing leakage currents. Emerging spintronic technology is of great interest to overcome this issue thanks to its non-volatility, high access speed and easy integration with CMOS process. Spin transfer torque (STT), a current-induced switching approach, not only simplifies the switching process but also provides an unprecedented speed and power performances, compared with the field-induced switching. This thesis is dedicated to the compact modelling and hybrid circuit design for current-induced switching spintronic devices. Magnetic tunnel junction (MTJ), the basic element of magnetic random access memory (MRAM), and racetrack memory, a novel concept based on current-induced domain wall (CIDW) motion, are particularly investigated. These spintronic devices and circuits are based on the materials with perpendicular-magnetic-anisotropy (PMA) that promises the deep submicron miniaturization while keeping a high thermal stability. Numbers of physical models and realistic parameters are integrated in the compact modeling to achieve a good agreement with experimental measurements. By using these accurate compact models of PMA STT MTJ and PMA racetrack memory, some magnetic logic and memory applications, such as magnetic full adder (MFA) and content addressable memory (CAM), are designed and simulated. We analyze and assess their performance potential in terms of speed, area and power consumption compared with the conventional circuits. Finally, in order to tackle the capacity bottleneck hindering the wide application, we propose two design optimizations: MLC for MRAM and magnetic field assistance for racetrack memory. This MLC design benefits from the STT stochastic behavior to achieve an ultra-high speed while increasing the density. The racetrack memory with magnetic field assistance is based on the observation that CIDW motion can be triggered below the critical current due to “Walker breakdown” effect. This opens a new route to reduce the propagation current and increase the capacity of racetrack memory beyond the improvements of peripheral circuits or materials.