Ultra-broadband Monolithic Microwave Integrated Circuit (MMIC) amplifiers find applications in multi-gigabit communication systems for 5G and millimeter wave measurement instrumentation systems. The aim of the research was to achieve maximum bandwidth of operation of the amplifier from the foundry process used and high reverse isolation ( < -25.0 dB) across the whole bandwidth. To achieve this, several design variations of DC - 110 GHzMMIC Cascode TravellingWave Amplifier (TWA) on 100 nm AlGaAs/GaAs pHEMT process were done for application in next generation instrumentation and high data transfer rate (100 Gb/s) optical modulator systems. The foundry service and device models used for the design are of the WINPP10-10 process from WIN Semiconductor Corp., Taiwan, a commercial and highly stable process. The cut-off frequency ft and maximum frequency of oscillation fmax for this process are 135 GHz and 185 GHz respectively. Thus, the design was aimed at pushing the ultimate limits of operation for this process. The design specifications were targeted to have S21 = 9.0 to 10.0 ± 1.0 dB, S11 & S22 ≤ -10.0 dB and S12 ≤ -25.0 dB in the whole frequency range. In order to achieve the targeted RF performance, it is imperative to have accurate transistor models over the frequency range of operation, transistor configuration mode and operating bias points. Using smaller periphery transistors results in lower extrinsic & intrinsic input and output capacitances that lead to achieving very wide band performance. Thus, device sizes as small as 2x10 μm were used for the design. A cascode topology, which is a series connection of a common-source and common-gate field effect transistor (FET), was used to achieve large bandwidth of operation, high reverse isolation and high input and output impedance. Using very small periphery devices at cascode bias points posed limitation in the design in terms of accuracy of transistor models under these conditions, specifically at high frequencies i.e., above 50 GHz. One of the major systemrequirements for the application of MMIC ultra-broadband amplifiers in instrumentation is to achieve and maintain high reverse isolation (≤ -25.0 dB) over the whole frequency range of operation which cannot be achieved alone by the cascode topology and new design techniques have to be devised. These twomajor challenges, namely high frequency small periphery FET model modification & development and design technique to achieve high reverse isolation in ultra-broadband frequency range have been addressed in this research.

Recent advancements in silicon technology have paved the way for the development of integrated transceivers operating well inside the mm-wave frequency range (30 - 300 GHz). This band offers opportunities for new applications such as remote sensing, short range radar, active imaging and multi-Gb/s radios. This thesis presents new ideas at the circuit and system level for a variety of such applications, up to 145 GHz and in both state-of-the-art nanoscale CMOS and SiGe BiCMOS technologies. After reviewing the theory of operation behind linear and power amplifiers, a purely digital, scalable solution for power amplification that takes advantage of the significant ft/fmax improvement in pFETs as a result of strain engineering in nanoscale CMOS is presented. The proposed Class-D power amplifier, features a stacked, cascode CMOS inverter output stage, which facilitates high voltage operation while employing only thin-oxide devices in a 45 nm SOI CMOS process. Next, a single-chip, 70-80 GHz wireless transceiver for last-mile point-to-point links is described. The transceiver was fabricated in a 130 nm SiGe BiCMOS technology and can operate at data rates in excess of 18 Gbps. The high bitrate is accomplished by taking advantage of the ample bandwidth available at the W-band frequency range, as well as by employing a direct QPSK modulator, which eliminates the need for separate upconversion and power amplification. Lastly, the system and circuit level implementation of a mm-wave precision distance and velocity sensor at 122 and 145 GHz is presented. Both systems feature a heterodyne architecture to mitigate the receiver 1/f noise, as well as self-test and calibration capabilities along with simple packaging techniques to reduce the overall system cost.

Recent advancements in silicon technology have paved the way for the development of integrated transceivers operating well inside the mm-wave frequency range (30 - 300 GHz). This band offers opportunities for new applications such as remote sensing, short range radar, active imaging and multi-Gb/s radios. This thesis presents new ideas at the circuit and system level for a variety of such applications, up to 145 GHz and in both state-of-the-art nanoscale CMOS and SiGe BiCMOS technologies. After reviewing the theory of operation behind linear and power amplifiers, a purely digital, scalable solution for power amplification that takes advantage of the significant ft/fmax improvement in pFETs as a result of strain engineering in nanoscale CMOS is presented. The proposed Class-D power amplifier, features a stacked, cascode CMOS inverter output stage, which facilitates high voltage operation while employing only thin-oxide devices in a 45 nm SOI CMOS process. Next, a single-chip, 70-80 GHz wireless transceiver for last-mile point-to-point links is described. The transceiver was fabricated in a 130 nm SiGe BiCMOS technology and can operate at data rates in excess of 18 Gbps. The high bitrate is accomplished by taking advantage of the ample bandwidth available at the W-band frequency range, as well as by employing a direct QPSK modulator, which eliminates the need for separate upconversion and power amplification. Lastly, the system and circuit level implementation of a mm-wave precision distance and velocity sensor at 122 and 145 GHz is presented. Both systems feature a heterodyne architecture to mitigate the receiver 1/f noise, as well as self-test and calibration capabilities along with simple packaging techniques to reduce the overall system cost.