Global ETD Search

1	Digital Circuit Wear-Out Due to Electromigration in Semiconductor Metal Lines Wilkinson, Gregory Ross 01 November 2009 (has links) (PDF) With the constant scaling of semiconductor devices, reliability of these devices is a huge concern. One of the biggest reliability issues is a phenomenon known as electromigration (EM) [1] [2]. Electromigration is the transport of material caused by the gradual movement of the ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms [27]. The damage induced by electromigration appears as the formation of voids and hillocks, resulting in electrical discontinuity. Based on previous Electromigration research [15], I have created a tool chain that identifies where electromigration is likely to occur in large-scale integrated circuits. Using this tool chain, it is possible to identify the mean-time to failure (MTTF) of several common and high priority circuits such as complex adders and memories. Furthermore, this tool chain allows designers to isolate weak-points in these circuits to improve the overall MTTF of the circuit. The result is that with a few simple changes, circuits can be redesigned to increase the MTTF, at minimal cost to the system. electromigration reliability wear-out metal lines
2	Online Nbti Wear-out Estimation Dabhoiwala, Mehernosh H 01 January 2013 (has links) (PDF) CMOS feature size scaling has been a source of dramatic performance gains, but it has come at a cost of on-chip wear-out. Negative Bias Temperature Instability (NBTI) is one of the main on-chip wear-out problems which questions the reliability of a chip. To check the accuracy of Reaction-Diffusion (RD) model, this work first proposes to compare the NBTI wear-out data from the RD wear-out model and the reliability simulator - Ultrasim RelXpert, by monitoring the activity of the register file on a Leon3 processor. The simulator wear-out data obtained is considered to be the baseline data and is used to tune the RD model using a novel technique time slicing. It turns out that the tuned RD model NBTI degradation is on an average 80% accurate with respect to RelXpert simulator and its calculation is approximately 8 times faster than the simulator. We come up with a waveform compression technique, for the activity waveforms from the Leon3 register file, which consumes 131KB compared to 256MB required without compression, and also provides 91% accuracy in NBTI degradation, compared to the same obtained without compression. We also propose a NBTI ΔVth estimation/prediction technique to reduce the time consumption of the tuned RD model threshold voltage calculation by an order of with one day degradation being 93% within the same of the tuned RD model. This work further proposes to a novel NBTI Degradation Predictor (NDP), to predict the future NBTI degradation, in a DE2 FPGA for WCET benchmarks. Also we measure the ΔVth variation across the 4 corners of the DE2 FPGA running a single Leon3, which varies from 0.08% to 0.11% of the base Vth. Online NBTI wear-out estimation Computer Engineering Electrical and Computer Engineering
3	Capacitorless Power Electronics Converters Using Integrated Planar Electro-Magnetics Haitham M Kanakri (18928150) 03 September 2024 (has links) <p dir="ltr">The short lifespan of capacitors in power electronics converters is a significant challenge. These capacitors, often electrolytic, are vital for voltage smoothing and frequency filtering. However, their susceptibility to heat, ripple current, and aging can lead to premature faults. This can cause issues like output voltage instability and short circuits, ultimately resulting in catastrophic failure and system shutdown. Capacitors are responsible for 30% of power electronics failures.</p><p dir="ltr">To tackle this challenge, scientists, researchers, and engineers are exploring various approaches detailed in technical literature. These include exploring alternative capacitor technologies, implementing active and passive cooling solutions, and developing advanced monitoring techniques to predict and prevent failures. However, these solutions often come with drawbacks such as increased complexity, reduced efficiency, or higher upfront costs. Additionally, research in material science is ongoing to develop corrosion-resistant capacitors, but such devices are not readily available.</p><p dir="ltr">This dissertation presents a capacitorless solution for dc-dc and dc-ac converters. The proposed solution involves harnessing parasitic elements and integrating them as intrinsic components in power converter technology. This approach holds the promise of enhancing power electronics reliability ratings, thereby facilitating breakthroughs in electric vehicles, compact power processing units, and renewable energy systems. The central scientific premise of this proposal is that the capacitance requirement in a power converter can be met by deliberately augmenting parasitic components.</p><p dir="ltr">Our research hypothesis that incorporating high dielectric material-based thin-films, fabricated using nanotechnology, into planar magnetics will enable the development of a family of capacitorless electronic converters that do not rely on discrete capacitors. This innovative approach represents a departure from the traditional power converter schemes employed in industry.</p><p dir="ltr">The first family of converters introduces a novel capacitorless solid-state power filter (SSPF) for single-phase dc-ac converters. The proposed configuration, comprising a planar transformer and an H-bridge converter operating at high frequency, generates sinusoidal ac voltage without relying on capacitors. Another innovative dc-ac inverter design is the twelve step six-level inverter, which does not incorporate capacitors in its structure.</p><p dir="ltr">The second family of capacitorless topologies consists of non-isolated dc-dc converters, namely the buck converter and the buck-boost converter. These converters utilize alternative materials with high dielectric constants, such as calcium copper titanate (CCTO), to intentionally enhance specific parasitic components, notably inter capacitance. This innovative approach reduces reliance on external discrete capacitors and facilitates the development of highly reliable converters.</p><p dir="ltr">The study also includes detailed discussions on the necessary design specifications for these parasitic capacitors. Furthermore, comprehensive finite element analysis solutions and detailed circuit models are provided. A design example is presented to demonstrate the practical application of the proposed concept in electric vehicle (EV) low voltage side dc-dc power converters used to supply EVs low voltage loads.</p> Circuits and systems Electrical circuits and systems Electrical machines and drives Engineering electromagnetics Solid-state power filter (SSPF) capacitorless topology active output power filter planar transformer electrolytic capacitor lifetime wear-out mechanisms notch resonant filter LLC-resonant converter calcium copper titanate (CCTO) intra capacitance Miniaturizing EV Chargers Multilevel inverters twelve-step inverter three-phase inverter six-level output voltage planar transform design Finite Element Analysis (FEA) Ansys Maxwell Ansys PEmag Ansys PExpert Ansys Simplorer Ansys Twin Builder planar electromagnetic buck-boost converter integrated magnetic hybrid LC filter high-power density converters CaCu3Ti4O12 electric vehicle chargers Nano graphene layer heat sink IGBT thermal response composite substrate planar transformer circuit models h-parameter voltage gradient dual transformer LLC resonant converter DC-DC Buck converter fundamental harmonic analysis power quality Total harmonic distortion (THD)

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