Lithuania has one of the highest suicide rates for men in the world (81.7 per 100,000 men). 21.7% of the population feels depressed. A salutogenic model of health developed by Antonovsky provides new knowledge for betterunderstanding of the behaviour of individuals and explains why some individuals fall ill under stress and why some do not. The study is focussed on the analysis of sense of coherence (SOC) on the population sample of Lithuania (n=3390) using a simplified way of measuring SOC developed by Lundberg and Nyström Peck at the Swedish Institute for Social Research of Stockholm University. The data of the study showed that people with low SOC (60.1%) predominate among the Lithuanian population. A strong correlation between low SOC, depression and stress was found. Additional studies, preferably longitudinal, are needed to identify possible relationshipsbetween cognitive processes (SOC) and biological mechanisms, causing adverse effects on mental health / <p>ISBN 91-7997-106-7</p>

Bakgrund: Inom hälso- och sjukvården kan personal råka ut för olika arbetsrelaterade besvär. Sjuksköterskan kommer i kontakt med många olika typer av läkemedel. Alla läkemedel är inte harmlösa för dem som iordningställer och administrerar dem. Då företagssköterskan ska arbeta hälsofrämjande och preventivt är det intressant att belysa sjuksköterskors arbete med intravenös antibiotika. KASAM kan vara till hjälp, på en arbetsplats, för att ta reda på vad som krävs för att kunna bevara men också förbättra hälsan hos medarbetarna.  Syfte: Att beskriva sjuksköterskors uppfattningar om risker vid arbete med intravenös antibiotika. Metod: Vald metod var kvalitativ metod. Fenomenografisk ansats användes vid analys av nio intervjuer. Resultat: Resultatet sammanfattades i tre beskrivningskategorier: Påverkan på kroppen, Utrustningens betydelse och Synliggöra risker. Slutsatser: Studiens resultat visar att sjuksköterskor är i behov av information om risker vid arbete med intravenös antibiotika. En ökad medvetenhet om riskerna kan bidra till att minska utvecklingen av både känd och icke känd överkänslighet samt minska resistensutvecklingen.

Övervikt och fetma är ett snabbt växande folkhälsoproblem som medför ökad risk för psykosocialt lidande och många allvarliga sjukdomar. Särskilt oroande är att övervikt och fetma allt oftare drabbar barn och ungdomar. Syftet med denna studie är att undersöka om det finns ett samband mellan Body Mass Index (BMI) och Känsla Av SAMmanhang (KASAM) hos elever i skolår 9, samt att analysera kön och psykosociala faktorers (familje- och kamratrelationer) eventuella inverkan på relationen BMI och KASAM. Det statistiska materialet är hämtat från undersökningen ”Liv och hälsa - Ung 2004 Västmanland” där KASAM- skalan med 13 frågor används. Analysmetoden är en multipel regression. Resultaten indikerar svaga samband mellan variablerna. Starkast är sambandet mellan BMI/KASAM och kön, där pojkarna uppvisar högre BMI än flickorna. Mer familjeregler relaterar till lägre BMI. Bättre kommunikation, förtrolighet och sammanhållning relaterar till högre BMI. Variationer i BMI är betydligt mer mångfasetterat eller grundläggande än vad denna studie kunnat belysa. Förklaringar till detta kan vara att variablerna inte har så stort förklaringsvärde, metodvalet är fel och/eller att KASAM-frågorna är svårförståeliga. / Overweight and obesity is a fast growing public health issue that leads to increased risk of psychosocial suffering and many serious illnesses. Especially worrying is that overweight and obesity more often affect children and adolescents. The aim of this study is to examine if there is a relation between Body Mass Index (BMI) and Sense of Coherence (SOC) among pupils in grade 9 and also analyse sex and psychosocial elements (family relations and friendship) possible influence on the relation BMI and KASAM. The statistical material is taken from the survey “Liv och hälsa - Ung 2004 Västmanland” where the 13-item SOC-scale is used. The method of analysis is a multiple regression. The results imply weak relations between the variables. The strongest relation is between sex and BMI/KASAM, where boys show a higher BMI than girls. More family rules relate to lower BMI. Better communication, familiarity and connectedness relates to higher BMI. The variations in BMI are considerably more nuanced or fundamental than this study has been able to illustrate. Explanations can be that the variables do not have a great explanatory value, the choice of method is wrong and/or the questions concerning SOC are difficult to comprehend.

This dissertation presents the system architecture and implementation of two wireless systems-on-chip (SoCs) for diagnostics and treatment of neurological disorders. It also validates the SoCs as an electronic implant for preoperative monitoring and treatment of intractable epilepsy. The first prototype SoC is a neural recording interface intended for wireless monitoring of intractable epilepsy. The 0.13um CMOS SoC has 64 recording channels, 64 programmable FIR filters and an integrated 915MHz FSK PLL-based wireless transmitter. Each channel contains a low-noise amplifier and a modified 8-bit SAR ADC that and can provide analog-digital multiplication by modifying the ADC sampling phase. It is used in conjunction with 12-bit digital adders and registers to implement 64 16-tap FIR filters with a minimal area and power overhead. In vivo measurement results from freely moving rodents demonstrate its utility in preoperative monitoring epileptic seizures. Treatment of intractable epilepsy by responsive neurostimulation requires seizure detection capabilities. Next, a low-power VLSI processor architecture for early seizure detection is described. It the magnitude, phase and phase synchronization of two neural signals - all precursors of a seizure. The processor is utilized in an implantable responsive neural stimulator application. The architecture uses three CORDIC processing cores that require shift-and-add operations but no multiplication. The efficacy of the processor in epileptic seizure detection is validated on human EEG data and yields comparable performance to software-based algorithms. The second prototype SoC is a closed-loop 64-channel neural stimulator that includes the aforementioned seizure detector processor and is used for preventive seizure abortion. It constitutes a neural vector analyzer that monitors the magnitude, phase and phase synchronization of neural signals to enable seizure detection. In a closed loop, abnormal phase synchrony triggers the programmable-waveform biphasic neural stimulator. To implement these functionalities, the 0.13um CMOS SoC integrates 64 amplifiers with switched-capacitor (SC) bandpass filters, 64 MADCs, 64 16-tap FIR filters, a processor, 64 biphasic stimulators and a wireless transmitter. The SoC is validated in the detection and abortion of seizures in freely moving rodents on-line and in early seizure detection in humans off-line. The results demonstrate its utility in treatment of intractable epilepsy.

This dissertation presents the system architecture and implementation of two wireless systems-on-chip (SoCs) for diagnostics and treatment of neurological disorders. It also validates the SoCs as an electronic implant for preoperative monitoring and treatment of intractable epilepsy. The first prototype SoC is a neural recording interface intended for wireless monitoring of intractable epilepsy. The 0.13um CMOS SoC has 64 recording channels, 64 programmable FIR filters and an integrated 915MHz FSK PLL-based wireless transmitter. Each channel contains a low-noise amplifier and a modified 8-bit SAR ADC that and can provide analog-digital multiplication by modifying the ADC sampling phase. It is used in conjunction with 12-bit digital adders and registers to implement 64 16-tap FIR filters with a minimal area and power overhead. In vivo measurement results from freely moving rodents demonstrate its utility in preoperative monitoring epileptic seizures. Treatment of intractable epilepsy by responsive neurostimulation requires seizure detection capabilities. Next, a low-power VLSI processor architecture for early seizure detection is described. It the magnitude, phase and phase synchronization of two neural signals - all precursors of a seizure. The processor is utilized in an implantable responsive neural stimulator application. The architecture uses three CORDIC processing cores that require shift-and-add operations but no multiplication. The efficacy of the processor in epileptic seizure detection is validated on human EEG data and yields comparable performance to software-based algorithms. The second prototype SoC is a closed-loop 64-channel neural stimulator that includes the aforementioned seizure detector processor and is used for preventive seizure abortion. It constitutes a neural vector analyzer that monitors the magnitude, phase and phase synchronization of neural signals to enable seizure detection. In a closed loop, abnormal phase synchrony triggers the programmable-waveform biphasic neural stimulator. To implement these functionalities, the 0.13um CMOS SoC integrates 64 amplifiers with switched-capacitor (SC) bandpass filters, 64 MADCs, 64 16-tap FIR filters, a processor, 64 biphasic stimulators and a wireless transmitter. The SoC is validated in the detection and abortion of seizures in freely moving rodents on-line and in early seizure detection in humans off-line. The results demonstrate its utility in treatment of intractable epilepsy.

The sick building syndrome (SBS) comprises eye, nose, skin, and throat symptoms, headache and fatigue. Gender, personality aspects, and psychosocial factors at work have lately been at focus in health research. The main aim of this thesis was to investigate the relationships between SBS and personal factors, personality traits, and psychosocial work stress. Two different populations were studied: a cohort of 195 subjects working in suspected “sick buildings” followed 1988-1999, and a random sample of 695 subjects from the Swedish population, 20-65 y. Two personality scales were used; the Karolinska Scales of Personality (KSP) and the Sense of Coherence (SOC). Two stress questionnaires were used: the 3-dimensional demands-control-support model (DCS) and the Assessment of Perceived Psychosocial Work Environment (PPWE). SBS and personal factors were assessed by a postal symptoms questionnaire and a symptom score (SC) was calculated. Personality was assessed by means of two verbal personality scales, the KSP and the SOC. Females in problem buildings had more SBS than men, and females had a lower SOC and more anxiety and aggressivity in the KSP. Females and males in the general working population reported differences in psychosocial work environment. Moreover, the associations between personality traits and SBS, and between DCS and SBS, differed between males and females. Over all, the investigated occupants of suspected sick-buildings were within the normal range for both KSP and SOC norms. However, those with symptoms showed prominent personality vulnerability, especially in anxiety, aggressivity, and lower SOC, compared to those that were not reporting symptoms. Female gender, low age, asthma, and a history of atopy were related to SBS in the general working population. A combination of low social support and either passive, strained, or active work situation, as well as a combination of high social support and active work situation, were associated with SBS. In conclusion, measurements of personality and psychosocial work environment could be of value in future studies on environmental syndromes. Moreover, the demans-control-support model can predict SBS, but in a more complex way than indicated by earlier research.

Bakgrund: Stress är ett vanligt förekommande i dagens samhälle, inte minst för sjuksköterskor då den ökade arbetsbelastningen gör att tid för återhämtning och reflektion får allt mindre utrymme. Stressen medför såväl fysiska som psykiska besvär, vilket påverkar sjuksköterskan både yrkesmässigt och privat. Syfte: Syftet med studien är att belysa vilka faktorer i sjuksköterskans arbete som orsakar stress. Metod: En litteraturstudie som baseras på totalt tio vetenskapliga artiklar, varav tre kvalitativa och sju kvantitativa. Resultatartiklarna valdes ut efter en systematisk litteratursökning i databaserna CINAHL och Academic Search Premier. Resultat: I resultatet visas olika faktorer som orsakar stress i sjuksköterskans arbete och dessa struktureras upp i två huvudteman; (1)Bristande socialt stöd och (2)Arbetsbelastning och krav. Till huvudtema (1) tillkommer ett undertema; Relation och kommunikation med kollegor och chefer. Till huvudtema (2) tillkommer tre underteman; (1)Omorganiseringar, tidsbrist och för lite resurser, (2)Ålder och erfarenhet samt (3)Bristande kontroll och delaktighet. Diskussion: Det sociala stödet är av stor betydelse i sjuksköterskans arbete då känslan av att vara en enhet ökar arbetsglädjen samt gör att stressen blir lättare att hantera. För att öka upplevelsen av meningsfullhet i sitt arbete är det även viktigt för sjuksköterskor att känna att de är delaktiga i olika beslut på arbetsplatsen, men många sjuksköterskor menar att det är svårt att få sin röst hörd. Den omfattande yrkesrollen kan göra att känslan av begriplighet försämras men samtidigt kan oförutsägbarheten vara stimulerande. På grund av de olika stressfaktorerna kan det vara svårt att helt följa de kompetenser som krävs av sjuksköterskan. / Background: Stress is a common occurrence in today's society, especially for nurses when the increased workload decreases the space for recovery and reflection. Stress causes both physical and psychological disorders, which affect nurses both professionally and privately. Aim: The aim of this study is to elucidate the factors in the nurse's work that causes stress. Methods: A literature review based on a total of ten scientific articles, three of which qualitative and seven quantitative. Results articles were selected by a systematic literature search in the databases CINAHL and Academic Search Premier. Results: The result shows various factors that cause stress to the nursing profession and these are structured into two main themes: (1)Lack of social support and (2)Workload and requirements. Main theme (1) has one sub-theme: Relationships and communication with colleagues and managers. Main theme (2) has three sub-themes: (1)Organisational Change, lack of time and lack of resources, (2)Age and experience, and (3)Lack of control and participation. Discussion: Social support is of great importance to the nursing profession as the feeling of being a team increases job satisfaction and makes the stress easier to handle. To enhance the experience of meaningfulness in their work, it is important for nurses to feel that they are involved in various decisions in the workplace, but many nurses believe that it is difficult to get their voices heard. The extensive professional role can deteriorate the sense of comprehensibility, but the unpredictability can at the same time be stimulating. Because of the different stress factors it can be difficult to fully comply with the competencies needed by the nurse.

This is the main report for Mattias Larsson’s degree project for the Master’s programin System-on-Chip. The main part of this project has been to design a modularMPSoC-unit (Multi Processor System on Chip) for reuse in different typesof projects. A SoC includes and interconnects a processor and FPGA in one chip.MPSoC is an extension of SoC including more than one processor. Zynq Ultra-Scale MPSoC has been used in this design which comes in three different versionsCG, EG and EV. In this project the EG version has been used, this versionhas a quad-core ARM Cortex-A53 platform, two Cortex-R5 real-time processorand Mali-400 MP2 graphics processing unit.The modular MPSoC-unit is designed to be used in a project as the main computingunit. A modular unit has to be general enough to fit almost all demandsbut as small as possible. The area usage is always an important question butsince the modular MPSoC-unit will be designed once and have a certain size andshape its overall area coverage determines how usable it will be. It is thereforhighly important to keep the area as small as possible.This project has been focused on the design of a modular SoC-unit with focuson a schematic-level. This report raises and answers question as too which extentsit is worth using certain types of DC/DC regulators, on-chip functionalityetc. A big part of the design work has been dedicated towards the DC/DC regulationand generation of voltages to supply the circuits. The MPSoC requires anumber of voltage levels of which some supplies can be tied together while othersare analog and sensitive to digital switching noise on the supply. This reportinvestigates the possibilities to use a simple ferrite bead filter for sensitive loadssharing the same supply. Extra work has gone into trying to reduce the numberof regulators. In order to design a safe and general power supply an estimation ofthe power consumption has to be done. This report shows how to find, use and estimatethe power consumption for the main power consumer in the system. Withthis information a generic modular SoC-design approach can be found.

Nesse trabalho é apresentada uma arquitetura que habilita a geração de MPSoCs (Multiprocessors Systems-on-Chip) heterogêneos escaláveis, baseados em barramento, suportando ainda o uso de diferentes organizações de memória. A comunicação entre as tarefas é especificada por meio de uma estrutura de memória compartilhada, que evita colisões e promove ganhos energéticos através do disparo dinâmico de clock gating. Também é introduzida a técnica DCF (Dynamic Core Freezing), que incrementa a eficiência energética do MPSoC tirando proveito dos ciclos ociosos dos processadores durante os acessos à memória. Mais, a combinação das organizações de memória propostas habilita a exploração de migração de tarefas na arquitetura proposta, por meio da troca de contexto das tarefas na memória compartilhada. Além disso, é mostrado o simulador de alto-nível, baseado na arquitetura proposta, criado com o propósito de extrair os ganhos energéticos propiciados com o uso do clock gating e da técnica DCF. O simulador aceita como entrada arquivos de trace de execução de aplicações Java, com os quais ele gera um novo arquivo contendo o mapeamento das instruções encontradas nos arquivos de trace para diferentes classes de instrução. Dessa forma, podem ser modeladas diferentes arquiteturas de processadores, usando o arquivo com o mapeamento para simular o MPSoC. Mais, o simulador habilita ainda a exploração das diferentes organizações de memória da arquitetura proposta, de maneira que se pode estimar o seu impacto no número de instruções executadas, contenções no barramento, e consumo energético. Experimentos baseados em uma aplicação sintética, executando em um MPSoC composto por diferentes versões de um processador Java mostram um grande aumento na eficiência energética com um custo mínimo em área. Além disso, também são apresentados experimentos baseados em aplicações do benchmark SPECjvm98, que mostram o impacto causado na eficiência energética quando o tipo de aplicação é alterado. Mais, os experimentos mostram drásticos ganhos energéticos obtidos com a aplicação da técnica DCF sobre as memórias do MPSoC. / In this work we present an architecture that enables the generation of bus-based, scalable heterogeneous Multiprocessor Systems-on-Chip (MPSoCs), supporting different memory organizations. Intertask communication is specified by means of a shared memory structure that assures collision avoidance and promotes energy savings through a dynamic clock gating triggering. We also introduce a Dynamic Core Freezing (DCF) technique, which boosts energy savings taking advantage of processor idle cycles during memory accesses. Moreover, the combination of the memory organizations enables the architecture to exploit easy task migration by means of the task context saving in the shared data memory. Moreover, we show the high-level simulator, based on the proposed architecture, created in order to extract the energy savings enabled with the clock gating and the DCF techniques. The simulator accepts as input execution trace files of Java applications, from which it generates a new file that contains the mapping of the instructions found in the trace file for different instruction classes. This way, we can model different processor architectures, using the mapping file to simulate the MPSoC. Also, the simulator enables us to experiment with different memory organizations to estimate their impact on the executed instructions, bus contention, and energy consumption. As case study we have modeled different versions of a Java processor in order to experiment with different execution patterns over different memory organizations. Experiments based on a synthetic application running on an MPSoC containing different versions of a Java processor show a large improvement in energy efficiency with a minimal area cost. Besides that, we also present experiments based on applications of the SPECjvm98 benchmark, which show the impact on the energy efficiency when we change the application type. Moreover, the experiments show a huge improvement in the energy efficiency when applying the DCF technique to the MPSoC memories.

O crescente avanço nas mais diversas áreas da eletrônica, desde instrumentação em baixa freqüência até telecomunicações operando em freqüências muito elevadas, e a necessidade de soluções baratas em curto espaço de tempo que acompanhem a demanda de mercado, torna a procura por circuitos programáveis, tanto digitais como analógicos, um ponto comum em diversas pesquisas. Os dispositivos digitais programáveis, que têm como grande representante os Field Programmable Gate Arrays (FPGAs), vêm apresentando um elevado e contínuo crescimento em termos de complexidade, desempenho e número de transistores integrados, já há várias décadas. O desenvolvimento de dispositivos analógicos programáveis (Field Programmable Analog Arrays – FPAAs), entretanto, esbarra em dois pontos fundamentais que tornam sua evolução um tanto latente: a estreita largura de banda alcançada, conseqüência da necessidade de um grande número de chaves de programação e reconfiguração, e a elevada área consumida por componentes analógicos como resistores e capacitores, quando integrados em processos VLSI Este trabalho apresenta uma proposta para aumentar a faixa de freqüências das aplicações passíveis de serem utilizadas tanto em FPAAs comerciais quanto em outros FPAAs, através da utilização de uma interface de translação e seleção de sinais, mantendo características de programabilidade do FPAA em questão, sem aumentar em muito sua potência consumida. A proposta, a simulação e a implementação da interface são apresentadas ao longo desta dissertação. Resultados de simulação e resultados práticos obtidos comprovam a eficácia da proposta. / The increasing advance in several areas of electronics, from low frequency instrumentation to telecommunications operating in very high frequencies, and the necessity of low cost solutions in a short space of time, following the demand of the market, makes the search for digital and analog programmable circuits a common point in many researches. Digital programmable devices, which have as a great representant Field Programmable Gate Arrays (FPGAs) devices, have shown a high and continuous increase in terms of complexity, performance and number of integrated transistors for many decades. The development of analog programmable devices (Field Programmable Analog Arrays – FPAAs), however, stops in two fundamental points that make their evolution slow: the narrow bandwidth reached, consequence of the necessity of a great number of programming and configuration switches, and the huge area occupied for analog components as resistors and capacitors, when integrated in a VLSI process. This work presents a proposal to increase the frequency range of the applications that can be used also with commercials FPAAs and others FPAAs, through the use of an interface to translate and select signals, keeping the programmability characteristics of the FPAA, without increasing so much the dissipated power. The proposal, simulation and implementation of the interface are presented in this dissertation. The simulations and practical results obtained show the proposal efficiency.