No description available.

Nucleic-based acid technology (NAT) is a reliable and well-established method in molecular diagnosis for the detection of bacterial infection. Specifically, PCR (polymerase chain reaction) is the most popular technique to amplify the number of DNA or RNA copies in the sample. However, due to the thermal cycles in the PCR method, advanced equipment and technologies are required to precisely control the temperature during the cycles. To overcome this limitation, isothermal amplification methods have been developed which function at constant temperatures and help reduce the need for state-of-the-art machines to perform the amplification. Among isothermal amplification methods, LAMP (loop mediated isothermal amplification) has demonstrated robustness and sensitivity compared to PCR. Additionally, microfluidic lab-on-a-chip (LOC) technology can facilitate the intensive processes which have been used traditionally in laboratories by automating the required procedures, reducing the volume of the reagents and minimizing the cost and the time of experiments. Although many microfluidic LOC devices have been developed in order to be used in resource poor settings, there is still a need for a simple setup which is inexpensive, accurate and can be performed without the need for a trained technician. In this thesis, a disposable microfluidic device was developed which is capable of performing high-throughput DNA amplification by using a simple segmentation method in order to digitize the sample into multiple micro-wells. Moreover, design and fabrication of a disposable, inexpensive flexible heater which is an inevitable part of the setup using a direct write process was introduced in order to provide the required energy for the LAMP reaction. Parallel real-time DNA amplification with limit of detection down to few copies per micro-well in less than an hour was illustrated. Using E. coli 0157, it was demonstrated that the detection time of E.coli can be as quick as 11 to 55 minutes with sample concentrations varying from 700,000 copies/micro-well (11 minutes), 70,000 copies/micro-well (18 minutes), 700 copies/micro-well (31 minutes), 7 copies/micro-well (40 minutes) and 0.07 copies/micro-well (55 minutes). Finally, the capability of the device for on chip reagent storage up to 3 days without using any coating methods was illustrated. / Thesis / Master of Applied Science (MASc)

An investigation of the dynamic lift on the central tube in square tube arrays is conducted. Three array spacing ratios with P/ D = 3.37, 2.18 and 1.58, corresponding to large, intermediate and small spacing ratios are investigated. These three classes exhibit specific flow characteristics and distinct behavior during acoustic resonance. The aim of the present investigation is to determine the effect of the acoustic pressure field and its contribution to dynamic lift during acoustic resonance. During acoustic resonance there are two sources of dynamic lift. One source is provided by the sound field. The standing wave excited during resonance causes dynamic lift from the acoustic pressure distribution on the surface of the cylinder. In the absence of flow, loud speakers are used to excite the first transverse acoustic mode over a range of sound pressure levels, effectively determining the relationship between the resultant dynamic lift and sound pressure level of the acoustic standing wave. The dynamic lift due to the sound field is well predicted by numerical simulation of the acoustic pressure distribution in the tube array. Using the validated numerical simulation it is possible to extend the results to a large range of cylinder diameter to wavelength ratios. The other source of dynamic lift is provided by the periodic flow though the tube array, known as vortex shedding, which is enhanced during resonance. The total dynamic lift is dependant on the phase shift between the sound field and aerodynamic lift components. For small and intermediate tube arrays, acoustic resonance occurs before coincidence of the natural vortex shedding frequency and the acoustic mode. For the large tube array, frequency coincidence occurs within the resonance range. The phase shift between the dynamic lift due to sound and that due to the aerodynamic lift is small for the pre-coincidence resonance range observed for small and intermediate tube arrays and therefore the total dynamic lift is well predicted by the sum of the magnitudes of the dynamic lift due to the sound field and aerodynamic lift components caused by vortex shedding. Past the frequency of coincidence, a phase jump occurs in the aerodynamic lift causing a large phase shift between the sound field and aerodynamic lift components in the large spacing ratio array. The summation of the aerodynamic lift and the lift due to the sound field over predicts the total dynamic lift measured during acoustic resonance in this case. The present results are used to develop a conservative guideline for estimating the total dynamic lift during acoustic resonance. / Thesis / Master of Applied Science (MASc)

No / In this study, a planar 4×4 phased array including modified E-shaped radiation elements is designed and fabricated to be incorporated in a Relay Station (RS) for realizing the communication with the super-ordinate Base Station. The proposed array provides 12.4% bandwidth at the 3.5GHz frequency band and gain of 21.2dB. Moreover a beamforming module is designed and simulated, aimed to be connected to the proposed array and realizing beamforming applications. This module provides 650 MHz bandwidth around 3.5GHz frequency band and is used for proper power division and controlling the amplitude/phase of the excitation currents.

Turbulent flow over a rough surface produces sound that radiates outside the near wall region. This noise source is often at a lower level than the noise created by edges and bluff body flows, but for applications with large surface area to perimeter ratios at low Mach number, this noise source can have considerable levels. In the first part of this dissertation, a detailed study is made of the ability of the Glegg & Devenport (2009) scattering theory to predict roughness noise. To this end, comparisons are made with measurements from cuboidal and hemispherical roughness with roughness Reynolds numbers, hu_Ï /ν, ranging from 24 to 197 and roughness height to boundary layer thickness ratios of 5 to 18. Their theory is shown to work very accurately to predict the noise from surfaces with large roughness Reynolds numbers, but for cases with highly inhomogeneous wall pressure fields, differences grow between estimation and measurement. For these surfaces, the absolute levels were underpredicted but the spectral shape of the measurement was correctly determined indicating that the relationship of the radiated noise with the wavenumber wall pressure spectrum and roughness geometry appears to remain relatively unchanged. In the second part of this dissertation, delay and sum beamforming and least-squares analyses were used to examine roughness noise recorded by a 36-sensor linear microphone array. These methods were employed to estimate the variation of source strengths through short fetches of large hemispherical and cuboidal element roughness. The analyses show that the lead rows of the fetches produced the greatest streamwise and spanwise noise radiation. The least-squares analysis confirmed the presence of streamwise and spanwise aligned dipoles emanating from each roughness element as suggested by the LES of Yang & Wang (2011). The least-squares calculated source strengths show that the streamwise aligned dipole is always stronger than that of the spanwise dipole, but the relative magnitude of the difference varies with frequency. / Ph. D.

The Long Wavelength Array (LWA) is a large multi-purpose radio telescope, operating in frequencies between 10 and 88 MHz, designed for both long-wavelength astrophysics and ionospheric science. The LWA will eventually consist of 53 "stations", each consisting of 256 pairs of crossed-dipole antennas whose signals are formed into beams. The Monitoring and Control System (MCS), a subsystem of each LWA station, controls the station's subsystems and also monitors their status. This thesis addresses the interface-related features of MCS. The physical interface of the MCS with each subsystem is a Gigabit Ethernet connection and the interface protocol is User Datagram Protocol (UDP). An analysis of the throughput obtained through the interface using UDP is compared to that achieved using Transmission Control Protocol (TCP). It is seen that the throughput with UDP is 15\% better than with TCP, and that UDP is a better choice for the given requirements. Implementation of a new ionospheric calibration scheme requires that the MCS be capable of repointing between astronomical sources on a 5 ms time scale. The rate at which beams can be repointed is analyzed. It is confirmed that MCS is at least 2 orders of magnitude faster than necessary, and is limited by the ethernet network throughput. Python software that facilitates the development and testing of MCS and other subsystems have been developed, and are described. / Master of Science

High computing power and flexibility are important design factors for multimedia and wireless communication applications due to the demand for high quality services and frequent evolution of standards. The ASIC (Application Specific Integrated Circuit) approach provides an area efficient, high performance solution, but is inflexible. In contrast, the general purpose processor approach is flexible, but often fails to provide sufficient computing power. Reconfigurable architectures, which have been introduced as a compromise between the two extreme solutions, have been applied successfully for multimedia and wireless communication applications. In this thesis, we investigated a new coarse-grained reconfigurable architecture called FleXilicon which is designed to execute critical loops efficiently, and is embedded in an SOC with a host processor. FleXilicon improves resource utilization and achieves a high degree of loop level parallelism (LLP). The proposed architecture aims to mitigate major shortcomings with existing architectures through adoption of three schemes, (i) wider memory bandwidth, (ii) adoption of a reconfigurable controller, and (iii) flexible wordlength support. Increased memory bandwidth satisfies memory access requirement in LLP execution. New design of reconfigurable controller minimizes overhead in reconfiguration and improves area efficiency and reconfiguration overhead. Flexible word-length support improves LLP by increasing the number of processing elements executable. The simulation results indicate that FleXilicon reduces the number of clock cycles and increases the speed for all five applications simulated. The speedup ratios compared with conventional architectures are as large as two orders of magnitude for some applications. VLSI implementation of FleXilicon in 65 nm CMOS process indicates that the proposed architecture can operate at a high frequency up to 1 GHz with moderate silicon area. / Ph. D.

Use of traditional gate level test generation techniques is prohibitively expensive and time consuming for VLSI chips. High level approaches to test generation have been proposed to improve the efficiency of test generation, e.g., the Behavioral Test Generator developed at Virginia Tech generates test vectors from high level Behavioral VHDL descriptions. To validate the utility of these test vectors, it needs to be established that they provide adequate coverage at the gate level. This thesis shows that test vectors obtained from the Behavioral Test Generator provide adequate coverage for the equivalent gate level circuit. A system that was developed to effectively evaluate the test vectors is presented. The implementation of Heuristic Test Generator to improve the coverage of the Behavioral Test Generator is explained. / Master of Science

A reconfiguration is developed for 2-dimensional mesh architectures and applied to a fault T tolerant cellular architecture. The reconfiguration is accomplished by adding communications paths to each cell which can be enabled by means of transistor switches controlled by decoding the contents of a register containing the relative position of faulty cells. This enables faulty cells to be bypassed and operations of cells in the same row east of the faulty cell to be shifted one cell to the east and a spare cell included in the active pattern. A modified s-value algorithm is also developed which enables a cell to determine the size of a square pattern that may be centered on that cell. / Master of Science

Cellular arrays of processors are suitable for implementing algorithms that have a substantial amount of inherent parallelism. This thesis describes an algorithm for growing interconnection paths between processors in order to map a pattern on a fault tolerant multiprocessor array. The array uses an eight port routing switch whose hardware design and simulation is discussed in the research. The time taken to grow the paths using the proposed algorithm is evaluated with the help of timing equations derived in this thesis. Finally the effect of reducing switch hardware is investigated at both the switch level and the system level. The effect at the system level is evaluated by mapping seven different array patterns on the array and doing a probability analysis to estimate the number of switch failures required to cause array reconfiguration. It is shown that although reduction in switch hardware increases the individual switch reliability, it has a detrimental effect on the system reliability. It is also seen that the probability of array reconfiguration increases with time and pattern size. / Master of Science