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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
531

Voltage interactions and commutation failure phenomena in multi-infeed HVDC systems

Rahimi, Ebrahim 27 September 2011 (has links)
This research attempts to quantify the complex interactions between HVDC transmission schemes in a multi-infeed configuration, particularly with regard to the voltage interactions and the commutation failure phenomena. The in-depth analysis of multi-infeed HVDC systems discussed in this research shows the application of several indices such as the MIIF, MIESCR, and CFII, that can provide researchers and planning engineers in the area of HVDC transmission with the necessary tools for their system studies. It shows that these indices are applicable in a multi-infeed system comprising HVDC schemes with different ratings. The Multi-Infeed Interaction Factor (MIIF) quantifies the level of voltage interactions between converter ac buses. The Multi-Infeed Effective Short Circuit Ratio (MIESCR) index is an indicator of ac system strengths with regard to the assessment of the transient overvoltage (TOV) and the power-voltage stability of multi-infeed HVDC systems. The Commutation Failure Immunity Index (CFII) utilizes electromagnetic transient simulation programs to evaluate the immunity of an HVDC converter to commutation failures. The CFII takes into account the ac system strength and the HVDC controls and evaluates their impact on the commutation process. The immunity of both single-infeed and multi-infeed systems to commutation failure phenomena are accurately evaluated and quantified by the CFII. Using the CFII, it is shown that the current commutation in multi-infeed HVDC schemes could fail under circumstances in which the probability of failure had been perceived to be low. The causes of, the effects of, and the remedial actions needed to deal with such anomalous commutation failures are discussed in this thesis. The capability of the new indices to provide an insight into the interactions phenomena in multi-infeed systems are clearly demonstrated by examples that show their application in the analysis of an actual multi-infeed HVDC system that is in the planning phase in the province of Alberta in Canada.
532

The feasibility of the manufacturing of a printed circuit type heat exchanger produced from graphite / Izak Jacobus Venter de Kock

De Kock, Izak Jacobus Venter January 2009 (has links)
The development of high temperature heat exchangers will play a vital part in the success of High Temperature Nuclear Reactors (HTRs). Manufacturing such heat exchangers from metals is becoming increasingly difficult as the operating temperatures keep rising. Above 1000'C most metals loose their strength and have high creep rates, while certain ceramic materials (including graphite, in the absence of oxygen) are able to operate at these temperatures. A literature study was done in order to identify the major problems regarding the use of graphite for heat exchanger construction as well as to investigate to what extent graphite has been used for heat exchanger construction in the past. Following from the literature survey, it was decided to design and manufacture a Printed Circuit Heat Exchanger (PCHE) from isotropic graphite to gain experience regarding the use of graphite as a heat exchanger material. This heat exchanger was then tested in order to learn about the operation of a graphite heat exchanger and to determine its effectiveness. A model ofthe heat exchanger was also constructed in order to determine what the performance of such a heat exchanger should theoretically be. It was found that the single greatest hurdle standing in the way ofgraphite being used as a heat exchanger material is its high gas permeability. This causes mixing between the two fluid streams as well as leakages to the environment, which have a negative effect on the heat exchanger's heat transfer capability. The methods used to establish a seal between the consecutive plates of the PCHE are also affected by the permeability of the graphite. Coatings on the surface of the graphite might be able to reduce its permeability and can also inhibit the high temperature degradation of graphite in the presence of oxygen. Manufacturing very small flow channels for the PCHE is limited by the availability of small enough end mills. Alternative manufucturing techniques is needed to economically construct a graphite PCHE. It was also found that the heat transfer effectiveness of the heat exchanger is influenced negatively by heat losses to the environment through the outer surface ofthe heat exchanger. Effective insulation around the heat exchanger or a graphite material :vith higher heat conductivity perpendicular to the flow direction might solve this problem. This study concluded that if diffusion bonding techniques, effective coatings and a graphite material with increased heat conductivity perpendicular to the flow direction are used, manufacturing a printed circuit heat exchanger from graphite is feasible. / Thesis (M.Ing. (Nuclear Engineering))--North-West University, Potchefstroom Campus, 2010
533

Effects of Curing Agents and Drilling Methods on CAF Formation in Halogen-Free Laminates

Chan, Lok Si January 2012 (has links)
Increasing demands for more reliability and functionalities in electronic devices have pushed the electronics industry to adopt newly developed materials and reduce interconnect sizes and spacing. These adaptations have led to concerns of reliability failures caused by conductive anodic filament formation (CAF). CAF is a conductive copper-containing salt that forms via an electrochemical process. It is initiated at the anode and grows along the epoxy/glass interface to the cathode, and once CAF reaches the cathode a short circuit will occur. The objective of this research is to evaluate and compare the effects of curing agents (DICY vs. phenolic-cured epoxy) and drilling methods (laser vs. mechanical drilling) on CAF formation using an insulation resistance test at 85 ºC, relative humidity of 85%, and a voltage gradient of 0.4V/µm. Time-to-failure for DICY-cured and phenolic-cured epoxy with laser drilled microvias and mechanically drilled vias were determined using the insulation resistance test. The failed coupons were cross-sectioned and examined using a Scanning Electron Microscope equipped with Energy-dispersive X-ray spectroscopy to verify the existence of CAF. Weibull analysis was used to compare the reliability and identify the failure modes of the failed coupons. Test results show that DICY-cured epoxy is a better CAF resistant material than phenolic-cured epoxy. It is believed that the brittleness of phenolic-cured material might enhance the damage to the epoxy/glass fiber interface during drilling; and hence, facilitate subsequent CAF formation. The study also shows that laser drilled microvias are less prone to CAF formation than mechanically drilled vias, because there is less mechanical damage and lower glass fiber content. Finally, using Weibull analysis, it is determined that laser drilled microvias experienced infant-mortality failure, whereas mechanically drilled vias exhibited a wear-out type failure.
534

Surface Micromachined Capacitive Accelerometers Using Mems Technology

Yazicioglu, Refet Firat 01 January 2003 (has links) (PDF)
Micromachined accelerometers have found large attention in recent years due to their low-cost and small size. There are extensive studies with different approaches to implement accelerometers with increased performance for a number of military and industrial applications, such as guidance control of missiles, active suspension control in automobiles, and various consumer electronics devices. This thesis reports the development of various capacitive micromachined accelerometers and various integrated CMOS readout circuits that can be hybrid-connected to accelerometers to implement low-cost accelerometer systems. Various micromachined accelerometer prototypes are designed and optimized with the finite element (FEM) simulation program, COVENTORWARE, considering a simple 3-mask surface micromachining process, where electroplated nickel is used as the structural layer. There are 8 different accelerometer prototypes with a total of 65 different structures that are fabricated and tested. These accelerometer structures occupy areas ranging from 0.2 mm2 to 0.9 mm2 and provide sensitivities in the range of 1-69 fF/g. Various capacitive readout circuits for micromachined accelerometers are designed and fabricated using the AMS 0.8 &micro / m n-well CMOS process, including a single-ended and a fully-differential switched-capacitor readout circuits that can operate in both open-loop and close-loop. Using the same process, a buffer circuit with 2.26fF input capacitance is also implemented to be used with micromachined gyroscopes. A single-ended readout circuit is hybrid connected to a fabricated accelerometer to implement an open-loop accelerometer system, which occupies an area less than 1 cm2 and weighs less than 5 gr. The system operation is verified with various tests, which show that the system has a voltage sensitivity of 15.7 mV/g, a nonlinearity of 0.29 %, a noise floor of 487 Hz &micro / g , and a bias instability of 13.9 mg, while dissipating less than 20 mW power from a 5 V supply. The system presented in this research is the first accelerometer system developed in Turkey, and this research is a part of the study to implement a national inertial measurement unit composed of low-cost micromachined accelerometers and gyroscopes.
535

Signal to power coupling and noise induced jitter in differential signaling

Chandrasekhar, Janani 16 June 2008 (has links)
Differential interconnects are extensively used in high-speed digital circuits at fast data rates and in environments of high noise like backplanes. For such applications they are preferred over single-ended lines owing to their ability to reject common-mode noise. Differential schemes like Low Voltage Differential Signaling (LVDS) are used for wireless base stations and ATM switches in telecommunication applications, flat panel displays and servers and for system-level clock distribution. LVDS applications use data rates from 100 Mbps to about 1.5 Gbps and are expected to be highly immune to noise. However, noise will also be injected into differential signals at these high data rates, if there are irregularities in the interconnect setup. These anomalies may be via transitions from differential lines through power planes in power distribution systems, via stubs, asymmetric lengths of differential lines, different transition points for each of the differential vias etc. The differential setup is expected to be immune to such imbalances; however, investigation of these discontinuities indicate that sufficient signal energy can be leaked to power distribution networks (PDN) of packages and boards. The effect of this energy loss was examined in time-domain and was found to cause signal integrity effects like jitter. Irregular differential structures were compared with the equivalent single-ended configuration and symmetrical perfect differential lines. This thesis work quantifies signal to power coupling caused by irregular differential structures in the presence of PDN planes in frequency domain. Presence of noise in differential signaling is verified through a set of test vehicles. The jitter induced as a result of signal to power coupling from differential lines was also investigated.
536

Optimal signal, power, clock and thermal interconnect networks for high-performance 2d and 3d integrated circuits

Sekar, Deepak Chandra 20 August 2008 (has links)
A high-performance 2D or 3D integrated circuit typically has (i) ratio of delay of a 1mm wire to delay of a nMOS transistor > 500, (ii) target impedence of power delivery network < 1mΩ, (iii) clock frequency > 2GHz, and (iv) thermal resistance requirement of heat removal path < 0.6 degree C/W. This data illustrates the difficulty of obtaining high-quality signal, power, clock and thermal interconnect networks for gigascale 2D and 3D integrated circuits. Specific material, process, circuit, packaging, and architecture solutions to enhance these four types of interconnect networks are proposed and quantitatively evaluated. A microchannel-cooled 3D integrated circuit technology is developed to deal with thermal interconnect problems inherent to stacked dice. The benefits of carbon nanotube technology, improved repeater insertion techniques and parallel processing architectures for signal interconnect networks are evaluated. A circuit technique to periodically reverse current direction in power interconnect networks is proposed. It provides several orders of magnitude improvement in electromigration lifetimes. Methods to control power supply noise and reduce its impact on clock interconnect networks are investigated. Finally, a CAD tool to co-design signal, power, clock and thermal interconnect networks in high-performance 2D and 3D integrated circuits is developed.
537

Aspects of stochastic control and switching: from Parrondo’s games to electrical circuits.

Allison, Andrew Gordon January 2009 (has links)
The first half of this thesis deals with the line of thought that leads to the development of discrete games of chance as models in statistical physics, with an emphasis on analysis of Parrondo’s games. The second half of the thesis is concerned with applying discrete games of chance to the modelling of other phenomena in the discipline of electrical engineering. The important features being the element of switching that is implicit in discrete games of chance and the element of uncertainty, introduced by the random aspect of discrete games of chance. / http://proxy.library.adelaide.edu.au/login?url= http://library.adelaide.edu.au/cgi-bin/Pwebrecon.cgi?BBID=1474722 / Thesis (Ph.D.) - University of Adelaide, School of Electrical and Electronic Engineering, 2009
538

A design quality and cost model for printed circuit board assembly /

Shina, Sammy G. January 1998 (has links)
Thesis (Ph.D.)--Tufts University, 1998. / Adviser: Anil Saigal. Submitted to the Dept. of Mechanical Engineering. Includes bibliographical references. Access restricted to members of the Tufts University community. Also available via the World Wide Web;
539

A networked embedded design for an automated exercise system

Morris, Janna L. Gravagne, Ian A. January 2007 (has links)
Thesis (M.S.E.C.E.)--Baylor University, 2007. / Includes bibliographical references (p. 141).
540

Thermal stress induced voids in nanoscale Cu interconnects by in-situ TEM heating

An, Jin Ho, January 1900 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.

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